2015-08-01 16:42:27 -04:00
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/*
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* Copyright (C) 2014 Jared Boone, ShareBrained Technology, Inc.
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*
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* This file is part of PortaPack.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "portapack.hpp"
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#include "portapack_hal.hpp"
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2017-05-24 18:42:44 -04:00
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#include "portapack_dma.hpp"
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2017-06-01 01:28:07 -04:00
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#include "portapack_cpld_data.hpp"
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2015-08-24 15:10:39 -04:00
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#include "portapack_persistent_memory.hpp"
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2015-08-01 16:42:27 -04:00
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#include "hackrf_hal.hpp"
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#include "hackrf_gpio.hpp"
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using namespace hackrf::one;
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#include "clock_manager.hpp"
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2017-07-19 00:29:32 -04:00
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#include "backlight.hpp"
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2015-08-01 16:42:27 -04:00
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#include "touch_adc.hpp"
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2016-02-05 18:22:28 -05:00
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#include "audio.hpp"
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2015-08-01 16:42:27 -04:00
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2017-05-31 14:42:12 -04:00
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#include "wm8731.hpp"
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using wolfson::wm8731::WM8731;
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2017-05-31 14:48:03 -04:00
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#include "ak4951.hpp"
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using asahi_kasei::ak4951::AK4951;
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2016-07-18 14:30:45 -04:00
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#include "cpld_update.hpp"
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2017-05-31 14:47:13 -04:00
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#include "optional.hpp"
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2015-08-01 16:42:27 -04:00
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namespace portapack {
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portapack::IO io {
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portapack::gpio_dir,
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2017-07-20 19:33:55 -04:00
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portapack::gpio_lcd_rdx,
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portapack::gpio_lcd_wrx,
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2015-08-01 16:42:27 -04:00
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portapack::gpio_io_stbx,
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portapack::gpio_addr,
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portapack::gpio_lcd_te,
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portapack::gpio_unused,
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};
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2017-07-19 00:29:32 -04:00
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portapack::BacklightCAT4004 backlight_cat4004;
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portapack::BacklightOnOff backlight_on_off;
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2015-08-01 17:31:51 -04:00
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lcd::ILI9341 display;
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2015-08-01 16:42:27 -04:00
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I2C i2c0(&I2CD0);
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SPI ssp1(&SPID2);
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si5351::Si5351 clock_generator {
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i2c0, hackrf::one::si5351_i2c_address
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};
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ClockManager clock_manager {
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i2c0, clock_generator
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};
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2017-05-31 14:42:12 -04:00
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WM8731 audio_codec_wm8731 { i2c0, 0x1a };
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2017-05-31 14:48:03 -04:00
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AK4951 audio_codec_ak4951 { i2c0, 0x12 };
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2017-05-31 14:42:12 -04:00
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2016-01-29 18:21:33 -05:00
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ReceiverModel receiver_model;
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2015-08-01 16:42:27 -04:00
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2015-12-17 01:36:51 -05:00
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TemperatureLogger temperature_logger;
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2015-08-01 16:42:27 -04:00
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class Power {
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public:
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void init() {
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/* VAA powers:
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* MAX5864 analog section.
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* MAX2837 registers and other functions.
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* RFFC5072 analog section.
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*
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* Beware that power applied to pins of the MAX2837 may
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* show up on VAA and start powering other components on the
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* VAA net. So turn on VAA before driving pins from MCU to
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* MAX2837.
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*/
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/* Turn on VAA */
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gpio_vaa_disable.clear();
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gpio_vaa_disable.output();
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/* 1V8 powers CPLD internals.
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*/
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/* Turn on 1V8 */
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gpio_1v8_enable.set();
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gpio_1v8_enable.output();
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/* Set VREGMODE for switching regulator on HackRF One */
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gpio_vregmode.set();
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gpio_vregmode.output();
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}
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void shutdown() {
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gpio_1v8_enable.clear();
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gpio_vaa_disable.set();
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}
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private:
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};
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static Power power;
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2017-05-31 14:47:13 -04:00
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enum class PortaPackModel {
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R1_20150901,
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R2_20170522,
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};
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static PortaPackModel portapack_model() {
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static Optional<PortaPackModel> model;
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if( !model.is_valid() ) {
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if( audio_codec_wm8731.detected() ) {
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model = PortaPackModel::R1_20150901;
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} else {
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model = PortaPackModel::R2_20170522;
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}
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}
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return model.value();
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}
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2017-06-03 01:24:15 -04:00
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static audio::Codec* portapack_audio_codec() {
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return (portapack_model() == PortaPackModel::R2_20170522)
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? static_cast<audio::Codec*>(&audio_codec_ak4951)
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: static_cast<audio::Codec*>(&audio_codec_wm8731)
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;
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}
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2017-06-02 20:05:41 -04:00
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static const portapack::cpld::Config& portapack_cpld_config() {
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return (portapack_model() == PortaPackModel::R2_20170522)
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? portapack::cpld::rev_20170522::config
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: portapack::cpld::rev_20150901::config
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;
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}
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2017-07-19 00:29:32 -04:00
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Backlight* backlight() {
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return (portapack_model() == PortaPackModel::R2_20170522)
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? static_cast<portapack::Backlight*>(&backlight_cat4004)
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: static_cast<portapack::Backlight*>(&backlight_on_off);
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}
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2017-07-19 00:47:04 -04:00
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static void configure_unused_mcu_peripherals(const bool enabled) {
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/* Disabling these peripherals reduces "idle" (PortaPack at main
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* menu) current by 42mA.
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*/
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/* Some surprising peripherals in use by PortaPack firmware:
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*
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* RITIMER: M0 SysTick substitute (because M0 has no SysTick)
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* TIMER3: M0 cycle/PCLK counter
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*/
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const uint32_t clock_run_state = enabled ? 1 : 0;
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LPC_CCU1->CLK_APB3_I2C1_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_APB3_DAC_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_APB3_CAN0_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_APB1_MOTOCON_PWM_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_APB1_CAN1_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_LCD_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_ETHERNET_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_USB0_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_EMC_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_SCT_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_USB1_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_EMCDIV_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_WWDT_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_USART0_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_UART1_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_SSP0_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_TIMER1_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_USART2_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_USART3_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_TIMER2_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_M4_QEI_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_USB1_CFG.RUN = clock_run_state;
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LPC_CCU1->CLK_SPI_CFG.RUN = clock_run_state;
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LPC_CCU2->CLK_APB2_USART3_CFG.RUN = clock_run_state;
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LPC_CCU2->CLK_APB2_USART2_CFG.RUN = clock_run_state;
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LPC_CCU2->CLK_APB0_UART1_CFG.RUN = clock_run_state;
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LPC_CCU2->CLK_APB0_USART0_CFG.RUN = clock_run_state;
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LPC_CCU2->CLK_APB0_SSP0_CFG.RUN = clock_run_state;
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}
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static void disable_unused_mcu_peripheral_clocks() {
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configure_unused_mcu_peripherals(false);
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}
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static void enable_unused_mcu_peripheral_clocks() {
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configure_unused_mcu_peripherals(true);
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}
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2017-06-14 01:16:00 -04:00
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static void shutdown_base() {
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clock_manager.shutdown();
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power.shutdown();
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// TODO: Wait a bit for supplies to discharge?
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chSysDisable();
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systick_stop();
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2017-07-19 00:47:04 -04:00
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enable_unused_mcu_peripheral_clocks();
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2017-07-18 20:04:04 -04:00
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2017-07-19 00:47:04 -04:00
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hackrf::one::reset();
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2017-07-18 20:04:04 -04:00
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}
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2017-06-14 01:16:00 -04:00
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bool init() {
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2015-08-01 16:42:27 -04:00
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for(const auto& pin : pins) {
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pin.init();
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}
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/* Configure other pins */
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2016-04-26 16:06:46 -04:00
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/* Glitch filter operates at 3ns instead of 50ns due to the WM8731
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* returning an ACK very fast (170ns) and confusing the I2C state
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* machine into thinking there was a bus error. It looks like the
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* MCU sees SDA fall before SCL falls, indicating a START at the
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* point an ACK is expected. With the glitch filter off or set to
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* 3ns, it's probably still a bit tight timing-wise, but improves
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* reliability on some problem units.
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*/
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2015-08-01 16:42:27 -04:00
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LPC_SCU->SFSI2C0 =
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2016-04-26 16:06:46 -04:00
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(1U << 0) // SCL: 3ns glitch
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| (0U << 2) // SCL: Standard/Fast mode
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| (1U << 3) // SCL: Input enabled
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| (0U << 7) // SCL: Enable input glitch filter
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| (1U << 8) // SDA: 3ns glitch
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| (0U << 10) // SDA: Standard/Fast mode
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| (1U << 11) // SDA: Input enabled
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| (0U << 15) // SDA: Enable input glitch filter
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2015-08-01 16:42:27 -04:00
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;
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2017-07-19 00:47:04 -04:00
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disable_unused_mcu_peripheral_clocks();
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LPC_CREG->CREG0 |= (1 << 5); // Disable USB0 PHY
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2017-07-18 20:04:04 -04:00
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2015-08-01 16:42:27 -04:00
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power.init();
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gpio_max5864_select.set();
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gpio_max5864_select.output();
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gpio_max2837_select.set();
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gpio_max2837_select.output();
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led_usb.setup();
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led_rx.setup();
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led_tx.setup();
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clock_manager.init();
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2015-08-24 15:10:39 -04:00
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clock_manager.set_reference_ppb(persistent_memory::correction_ppb());
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2015-08-01 16:42:27 -04:00
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clock_manager.run_at_full_speed();
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2017-06-03 00:57:13 -04:00
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if( !portapack::cpld::update_if_necessary(portapack_cpld_config()) ) {
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2017-06-14 01:16:00 -04:00
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shutdown_base();
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return false;
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2017-05-02 01:44:50 -04:00
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}
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2017-06-03 00:57:13 -04:00
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if( !hackrf::cpld::load_sram() ) {
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2017-05-02 01:44:50 -04:00
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chSysHalt();
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}
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2017-05-02 01:45:23 -04:00
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portapack::io.init();
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2017-06-03 01:24:15 -04:00
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audio::init(portapack_audio_codec());
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2016-02-05 19:25:43 -05:00
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2015-08-01 16:42:27 -04:00
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clock_manager.enable_first_if_clock();
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clock_manager.enable_second_if_clock();
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clock_manager.enable_codec_clocks();
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radio::init();
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touch::adc::init();
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2017-05-24 18:42:44 -04:00
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LPC_CREG->DMAMUX = portapack::gpdma_mux;
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gpdma::controller.enable();
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2017-06-14 01:16:00 -04:00
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return true;
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2015-08-01 16:42:27 -04:00
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}
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void shutdown() {
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2017-05-24 18:42:44 -04:00
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gpdma::controller.disable();
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2017-07-19 00:29:32 -04:00
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backlight()->off();
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2015-08-01 17:40:05 -04:00
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display.shutdown();
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2015-08-01 16:42:27 -04:00
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radio::disable();
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2016-02-05 19:25:43 -05:00
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audio::shutdown();
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2016-07-18 14:32:14 -04:00
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2017-06-03 00:57:13 -04:00
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hackrf::cpld::init_from_eeprom();
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2016-07-18 14:32:14 -04:00
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2017-06-14 01:16:00 -04:00
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shutdown_base();
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2015-08-01 16:42:27 -04:00
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}
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extern "C" {
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void __late_init(void) {
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reset();
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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/* After this call, scheduler, systick, heap, etc. are available. */
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/* By doing chSysInit() here, it runs before C++ constructors, which may
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* require the heap.
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*/
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chSysInit();
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}
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}
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} /* namespace portapack */
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