mirror of
https://github.com/eried/portapack-mayhem.git
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227 lines
7.3 KiB
C
227 lines
7.3 KiB
C
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for STMicroelectronics STM3220G-EVAL board.
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_ST_STM3220G_EVAL
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#define BOARD_NAME "ST STM3220G-EVAL"
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/*
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* Board frequencies.
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* NOTE: The HSE crystal is not fitted by default on the board.
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*/
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#define STM32_LSECLK 32768
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#define STM32_HSECLK 25000000
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/*
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* MCU type as defined in the ST header file stm32f2xx.h.
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*/
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#define STM32F2XX
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/*
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* IO pins assignments.
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*/
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#define GPIOA_WAKEUP_BUTTON 0
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#define GPIOB_ETHER_INT 14
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#define GPIOB_NAND_INT 15
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#define GPIOC_TAMPER_BUTTON 0
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#define GPIOC_LED4 7
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#define GPIOF_POT 9
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#define GPIOG_LED1 6
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#define GPIOG_LED2 8
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#define GPIOG_USER_BUTTON 15
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#define GPIOH_EXPANDER_INT 12
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#define GPIOH_SD_DETECT 13
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#define GPIOI_LED3 9
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0 << ((n) * 2))
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#define PIN_MODE_OUTPUT(n) (1 << ((n) * 2))
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#define PIN_MODE_ALTERNATE(n) (2 << ((n) * 2))
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#define PIN_MODE_ANALOG(n) (3 << ((n) * 2))
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#define PIN_OTYPE_PUSHPULL(n) (0 << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1 << (n))
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#define PIN_OSPEED_2M(n) (0 << ((n) * 2))
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#define PIN_OSPEED_25M(n) (1 << ((n) * 2))
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#define PIN_OSPEED_50M(n) (2 << ((n) * 2))
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#define PIN_OSPEED_100M(n) (3 << ((n) * 2))
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#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2))
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#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2))
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#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2))
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#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
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/*
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* Port A setup.
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* All input with pull-up except:
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* PA8 - MCO 1 (alternate 0).
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* PA13 - JTMS/SWDAT (alternate 0).
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* PA14 - JTCK/SWCLK (alternate 0).
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* PA15 - JTDI (alternate 0).
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_ALTERNATE(8) | \
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PIN_MODE_ALTERNATE(13) | \
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PIN_MODE_ALTERNATE(14) | \
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PIN_MODE_ALTERNATE(15))
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#define VAL_GPIOA_OTYPER 0x00000000
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#define VAL_GPIOA_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOA_PUPDR (PIN_PUDR_FLOATING(13) | \
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PIN_PUDR_FLOATING(14) | \
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PIN_PUDR_FLOATING(15))
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#define VAL_GPIOA_ODR 0xFFFFFFFF
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#define VAL_GPIOA_AFRL 0x00000000
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#define VAL_GPIOA_AFRH 0x00000000
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/*
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* Port B setup.
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* All input with pull-up except:
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* PB3 - JTDO (alternate 0).
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* PB4 - JNTRST (alternate 0).
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_ALTERNATE(3) | \
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PIN_MODE_ALTERNATE(4))
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#define VAL_GPIOB_OTYPER 0x00000000
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#define VAL_GPIOB_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOB_PUPDR (~(PIN_PUDR_FLOATING(3) | \
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PIN_PUDR_FLOATING(4)))
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#define VAL_GPIOB_ODR 0xFFFFFFFF
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#define VAL_GPIOB_AFRL 0x00000000
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#define VAL_GPIOB_AFRH 0x00000000
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/*
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* Port C setup.
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* All input with pull-up except:
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* PC9 - MCO2 (alternate 0).
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* PC10 - USART3_TX (alternate 7).
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* PC11 - USART3_RX (alternate 7).
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* PC14 - OSC32_INT (input floating).
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* PC15 - OSC32_OUT (input floating).
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*/
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#define VAL_GPIOC_MODER (PIN_MODE_ALTERNATE(9) | \
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PIN_MODE_ALTERNATE(10) | \
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PIN_MODE_ALTERNATE(11))
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#define VAL_GPIOC_OTYPER 0x00000000
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#define VAL_GPIOC_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOC_PUPDR (~(PIN_PUDR_PULLUP(11) | \
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PIN_PUDR_FLOATING(14) | \
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PIN_PUDR_FLOATING(15)))
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#define VAL_GPIOC_ODR 0xFFFFFFFF
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#define VAL_GPIOC_AFRL 0x00000000
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#define VAL_GPIOC_AFRH (PIN_AFIO_AF(7, 10) | \
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PIN_AFIO_AF(7, 11))
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/*
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* Port D setup.
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* All input with pull-up.
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*/
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#define VAL_GPIOD_MODER 0x00000000
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#define VAL_GPIOD_OTYPER 0x00000000
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#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOD_PUPDR 0xFFFFFFFF
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#define VAL_GPIOD_ODR 0xFFFFFFFF
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#define VAL_GPIOD_AFRL 0x00000000
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#define VAL_GPIOD_AFRH 0x00000000
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/*
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* Port E setup.
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* All input with pull-up.
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*/
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#define VAL_GPIOE_MODER 0x00000000
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#define VAL_GPIOE_OTYPER 0x00000000
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#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOE_PUPDR 0xFFFFFFFF
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#define VAL_GPIOE_ODR 0xFFFFFFFF
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#define VAL_GPIOE_AFRL 0x00000000
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#define VAL_GPIOE_AFRH 0x00000000
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/*
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* Port F setup.
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* All input with pull-up.
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*/
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#define VAL_GPIOF_MODER 0x00000000
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#define VAL_GPIOF_OTYPER 0x00000000
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#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOF_PUPDR 0xFFFFFFFF
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#define VAL_GPIOF_ODR 0xFFFFFFFF
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#define VAL_GPIOF_AFRL 0x00000000
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#define VAL_GPIOF_AFRH 0x00000000
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/*
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* Port G setup.
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* All input with pull-up.
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*/
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#define VAL_GPIOG_MODER (PIN_MODE_OUTPUT(GPIOG_LED1))
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#define VAL_GPIOG_OTYPER 0x00000000
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#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOG_PUPDR (~(PIN_PUDR_FLOATING(GPIOG_LED1)))
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#define VAL_GPIOG_ODR 0xFFFFFFBF
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#define VAL_GPIOG_AFRL 0x00000000
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#define VAL_GPIOG_AFRH 0x00000000
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/*
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* Port H setup.
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* All input with pull-up.
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*/
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#define VAL_GPIOH_MODER 0x00000000
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#define VAL_GPIOH_OTYPER 0x00000000
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#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOH_PUPDR 0xFFFFFFFF
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#define VAL_GPIOH_ODR 0xFFFFFFFF
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#define VAL_GPIOH_AFRL 0x00000000
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#define VAL_GPIOH_AFRH 0x00000000
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/*
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* Port I setup.
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* All input with pull-up.
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*/
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#define VAL_GPIOI_MODER 0x00000000
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#define VAL_GPIOI_OTYPER 0x00000000
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#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF
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#define VAL_GPIOI_PUPDR 0xFFFFFFFF
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#define VAL_GPIOI_ODR 0xFFFFFFFF
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#define VAL_GPIOI_AFRL 0x00000000
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#define VAL_GPIOI_AFRH 0x00000000
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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