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5fd83c13fb
Contains two modifications to improve ASIC resistance: shuffle and integer math. Shuffle makes use of the whole 64-byte cache line instead of 16 bytes only, making Cryptonight 4 times more demanding for memory bandwidth. Integer math adds 64:32 bit integer division followed by 64 bit integer square root, adding large and unavoidable computational latency to the main loop. More details and performance numbers: https://github.com/SChernykh/xmr-stak-cpu/blob/master/README.md
11 lines
1.6 KiB
Plaintext
11 lines
1.6 KiB
Plaintext
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