RNode_Firmware_CE/sx128x.h

145 lines
3.5 KiB
C
Raw Normal View History

2018-04-05 12:10:42 -04:00
// Copyright (c) Sandeep Mistry. All rights reserved.
2020-05-21 06:41:39 -04:00
// Licensed under the MIT license.
2023-01-13 18:11:02 -05:00
// Modifications and additions copyright 2023 by Mark Qvist
2020-05-21 06:41:39 -04:00
// Obviously still under the MIT license.
2018-04-05 12:10:42 -04:00
#ifndef SX128X_H
#define SX128X_H
2018-04-05 12:10:42 -04:00
#include <Arduino.h>
#include <SPI.h>
2024-01-19 05:08:55 -05:00
#include "Modem.h"
2018-04-05 12:10:42 -04:00
#define LORA_DEFAULT_SS_PIN 10
#define LORA_DEFAULT_RESET_PIN 9
#define LORA_DEFAULT_DIO0_PIN 2
2024-01-19 05:08:55 -05:00
#define LORA_DEFAULT_RXEN_PIN -1
#define LORA_DEFAULT_TXEN_PIN -1
2024-01-19 05:08:55 -05:00
#define LORA_DEFAULT_BUSY_PIN -1
2018-04-05 12:10:42 -04:00
#define PA_OUTPUT_RFO_PIN 0
#define PA_OUTPUT_PA_BOOST_PIN 1
#define RSSI_OFFSET 157
class sx128x : public Stream {
2018-04-05 12:10:42 -04:00
public:
sx128x();
2018-04-05 12:10:42 -04:00
int begin(unsigned long frequency);
2018-04-05 12:10:42 -04:00
void end();
int beginPacket(int implicitHeader = false);
int endPacket();
int parsePacket(int size = 0);
int packetRssi();
int currentRssi();
2018-06-27 08:08:16 -04:00
uint8_t packetRssiRaw();
uint8_t currentRssiRaw();
2020-05-21 06:41:39 -04:00
uint8_t packetSnrRaw();
2018-04-05 12:10:42 -04:00
float packetSnr();
long packetFrequencyError();
// from Print
virtual size_t write(uint8_t byte);
virtual size_t write(const uint8_t *buffer, size_t size);
// from Stream
virtual int available();
virtual int read();
virtual int peek();
virtual void flush();
void onReceive(void(*callback)(int));
void receive(int size = 0);
void idle();
void sleep();
2023-01-07 10:35:07 -05:00
bool preInit();
uint8_t getTxPower();
2018-04-05 12:10:42 -04:00
void setTxPower(int level, int outputPin = PA_OUTPUT_PA_BOOST_PIN);
2018-06-20 10:32:30 -04:00
uint32_t getFrequency();
void setFrequency(unsigned long frequency);
2018-04-05 12:10:42 -04:00
void setSpreadingFactor(int sf);
long getSignalBandwidth();
void setSignalBandwidth(long sbw);
void setCodingRate4(int denominator);
void setPreambleLength(long length);
void setSyncWord(int sw);
2018-04-26 09:52:43 -04:00
uint8_t modemStatus();
2018-04-05 12:10:42 -04:00
void enableCrc();
void disableCrc();
2023-06-07 14:49:26 -04:00
void enableTCXO();
void disableTCXO();
2018-04-05 12:10:42 -04:00
void txAntEnable();
void rxAntEnable();
void loraMode();
void waitOnBusy();
void executeOpcode(uint8_t opcode, uint8_t *buffer, uint8_t size);
void executeOpcodeRead(uint8_t opcode, uint8_t *buffer, uint8_t size);
void writeBuffer(const uint8_t* buffer, size_t size);
void readBuffer(uint8_t* buffer, size_t size);
void setPacketParams(uint32_t preamble, uint8_t headermode, uint8_t length, uint8_t crc);
void setModulationParams(uint8_t sf, uint8_t bw, uint8_t cr);
2024-01-19 05:08:55 -05:00
2018-04-05 12:10:42 -04:00
// deprecated
void crc() { enableCrc(); }
void noCrc() { disableCrc(); }
byte random();
void setPins(int ss = LORA_DEFAULT_SS_PIN, int reset = LORA_DEFAULT_RESET_PIN, int dio0 = LORA_DEFAULT_DIO0_PIN, int busy = LORA_DEFAULT_BUSY_PIN, int rxen = LORA_DEFAULT_RXEN_PIN, int txen = LORA_DEFAULT_TXEN_PIN);
2018-04-05 12:10:42 -04:00
void setSPIFrequency(uint32_t frequency);
void dumpRegisters(Stream& out);
private:
void explicitHeaderMode();
void implicitHeaderMode();
void handleDio0Rise();
uint8_t readRegister(uint16_t address);
void writeRegister(uint16_t address, uint8_t value);
uint8_t singleTransfer(uint8_t opcode, uint16_t address, uint8_t value);
2018-04-05 12:10:42 -04:00
static void onDio0Rise();
void handleLowDataRate();
void optimizeModemSensitivity();
2018-04-05 12:10:42 -04:00
private:
SPISettings _spiSettings;
int _ss;
int _reset;
int _dio0;
2024-01-19 05:08:55 -05:00
int _rxen;
int _txen;
2024-01-19 05:08:55 -05:00
int _busy;
int _modem;
unsigned long _frequency;
2024-01-19 05:08:55 -05:00
int _txp;
uint8_t _sf;
uint8_t _bw;
uint8_t _cr;
2018-04-05 12:10:42 -04:00
int _packetIndex;
uint32_t _preambleLength;
2018-04-05 12:10:42 -04:00
int _implicitHeaderMode;
2024-01-19 05:08:55 -05:00
int _payloadLength;
int _crcMode;
int _fifo_tx_addr_ptr;
int _fifo_rx_addr_ptr;
uint8_t _packet[256];
bool _preinit_done;
int _rxPacketLength;
2018-04-05 12:10:42 -04:00
void (*_onReceive)(int);
};
extern sx128x sx128x_modem;
2018-04-05 12:10:42 -04:00
2024-01-19 05:08:55 -05:00
#endif