From c3e57753ffd7a43b30fc527fc9ea0701e0d7a13b Mon Sep 17 00:00:00 2001 From: Adam Novak Date: Mon, 21 Feb 2022 22:04:39 +0000 Subject: [PATCH] Get tncattach packets visible from loramon --- LoRa.cpp | 8 ++++---- RNode_Firmware.ino | 11 +++++++++++ 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/LoRa.cpp b/LoRa.cpp index 4219aba..e39e506 100644 --- a/LoRa.cpp +++ b/LoRa.cpp @@ -219,7 +219,7 @@ int LoRaClass::endPacket() std::cerr << "Entering transmit mode" << std::endl; for (uint8_t i = REG_OP_MODE ; i <= REG_PA_DAC; i++) { uint8_t val = readRegister(i); - std::cerr << std::hex << "0x" << i << " 0x" << val << std::dec << std::endl; + std::cerr << std::hex << "0x" << (int)i << " 0x" << (int)val << std::dec << std::endl; } #endif // put in TX mode @@ -712,9 +712,9 @@ bool LoRaClass::resetModem() REG_HOP_PERIOD, 0x00, REG_MODEM_CONFIG_3, 0x04, REG_PPM_CORRECTION, 0x00, - REG_DETECTION_OPTIMIZE, 0xc3, // Errata says this needs to be set before REG_IF_FREQ_1 and REG_IF_FREQ_2 - REG_IF_FREQ_2, 0x45, // Datasheet says this defaults to 0x20, but dumping says 0x45. - REG_IF_FREQ_1, 0x55, // Datasheet says this defaults to 0x00, but dumping says 0x55. + //REG_DETECTION_OPTIMIZE, 0xc3, // Errata says this needs to be set before REG_IF_FREQ_1 and REG_IF_FREQ_2 + //REG_IF_FREQ_2, 0x45, // Datasheet says this defaults to 0x20, but dumping says 0x45. + //REG_IF_FREQ_1, 0x55, // Datasheet says this defaults to 0x00, but dumping says 0x55. REG_INVERT_IQ, 0x27, REG_HIGH_BW_OPTIMIZE_1, 0x03, REG_DETECTION_THRESHOLD, 0x0a, diff --git a/RNode_Firmware.ino b/RNode_Firmware.ino index aca87b4..cac4d1a 100644 --- a/RNode_Firmware.ino +++ b/RNode_Firmware.ino @@ -792,10 +792,21 @@ void validateStatus() { } } +bool started = false; + void loop() { if (radio_online) { checkModemStatus(); + if (!started) { + started = true; + //promisc = true; + tbuf[0] = 'R'; + tbuf[1] = 'N'; + transmit(2); + //promisc = false; + } + #if MCU_VARIANT == MCU_ESP32 if (packet_ready) { portENTER_CRITICAL(&update_lock);