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RNMnetwork/es.telecomlobby.com/radio_aficion/PCB/XCircuit_Libraries/analoglib2.lps
Riccardo Giuntoli c23538d292
s
2022-02-03 15:29:33 +01:00

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%! PostScript set of library objects for XCircuit
% Version: 2.3
% Library name is: analoglib2
% Author: R. Timothy Edwards <tim@stravinsky.jhuapl.edu>
%
% XCircuitLib library objects
/Capacitor {
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(1.0) (p) (?) 3 beginparm
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(sim:c %p1 %p2) {/Times-Roman cf} 2 4 0 1.00 -208 -208 infolabel
mark (F) v2 {hS} v1 {/Times-Roman cf} ctmk 20 0 1.00 48 0 label
sce
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} def
/Polarized {
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(1.0) (p) (?) 3 beginparm
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(sim:e %p1 %p2) {/Times-Roman cf} 2 4 0 1.00 -208 -208 infolabel
mark (F) v2 {hS} v1 {/Times-Roman cf} ctmk 20 0 1.00 48 0 label
sce
mark v3 (pcb:C) {/Times-Roman cf} ctmk 20 0 1.00 -208 -256 infolabel
endgate
} def
/Resistor {
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(1.0) (k) (?) 3 beginparm
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(1) {/Times-Roman cf} 2 9 0 1.00 0 64 pinlabel
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sce
mark v2 v1 ( %p1 %p2 ) v3 (spice:R) {/Times-Roman cf} ctmk 4 0 1.00 -208 -160
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sce
(sim:R %p1 %p2) {/Times-Roman cf} 2 4 0 1.00 -208 -208 infolabel
mark (W) {/Symbol cf} v2 {hS} v1 {/Times-Roman cf} ctmk 20 0 1.00 32 0 label
sce
mark v3 (pcb:R) {/Times-Roman cf} ctmk 20 0 1.00 -208 -256 infolabel
endgate
} def
/Inductor {
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(1.0) (m) (?) 3 beginparm
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1 1.00 20 12 20 -4 0 -8 0 16 spline
1 1.00 20 -8 20 -24 0 -28 0 -4 spline
1 1.00 -20 20 -20 8 0 12 0 16 spline
1 1.00 -20 0 -20 -12 0 -8 0 -4 spline
1 1.00 0 -48 0 -64 2 polygon
1 1.00 0 36 0 48 2 polygon
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mark v2 v1 ( %p1 %p2 ) v3 (spice:L) {/Times-Roman cf} ctmk 4 0 1.00 -208 -160
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sce
(sim:l %p1 %p2) {/Times-Roman cf} 2 4 0 1.00 -208 -208 infolabel
mark (H) v2 {hS} v1 {/Times-Roman cf} ctmk 20 0 1.00 32 0 label
sce
mark v3 (pcb:L) {/Times-Roman cf} ctmk 20 0 1.00 -208 -256 infolabel
endgate
} def
/inductor {
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begingate
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1 1.00 -20 -20 -20 -32 0 -28 0 -24 spline
1 1.00 20 32 20 16 0 12 0 36 spline
1 1.00 20 12 20 -4 0 -8 0 16 spline
1 1.00 20 -8 20 -24 0 -28 0 -4 spline
1 1.00 -20 20 -20 8 0 12 0 16 spline
1 1.00 -20 0 -20 -12 0 -8 0 -4 spline
1 1.00 0 -48 0 -64 2 polygon
1 1.00 0 36 0 48 2 polygon
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(l.1) {/Times-Roman cf} 2 9 0 1.00 0 48 pinlabel
(l.2) {/Times-Roman cf} 2 13 0 1.00 0 -64 pinlabel
sce
(spice:L%i %pl.1 %pl.2 1.0U) {/Times-Roman cf} 2 0 0 1.00 -208 -160 infolabel
sce
(sim:l %pl.1 %pl.2) {/Times-Roman cf} 2 0 0 1.00 -208 -208 infolabel
endgate
} def
/Transformer {
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(?) 1 beginparm
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(3) {/Helvetica cf} 2 25 0 1.00 32 48 pinlabel
(4) {/Helvetica cf} 2 29 0 1.00 32 -64 pinlabel
sce
mark v1 (pcb:T) {/Times-Roman cf} ctmk 20 0 1.00 -96 -160 infolabel
endgate
} def
/source {
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% hidden
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1 1.00 0 -32 0 -64 2 polygon
endgate
} def
/Vsource {
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endgate
} def
/arrowhead {
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% trivial
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endgate
} def
/Isource {
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(i.p) {/Times-Roman cf} 2 9 0 1.00 0 64 pinlabel
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endgate
} def
/ACsource {
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(s.p) {/Times-Roman cf} 2 9 0 1.00 0 64 pinlabel
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mark (p-p) {ss} (V) {hS} v1 {/Times-Roman cf} ctmk 20 0 1.00 48 48 label
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mark v2 ( L=) v1 ( W=) v3 ( %pD %pG %pS GND ) v4 (spice:M) {/Times-Roman cf}
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mark v2 (L=) {/Times-Roman cf} ctmk 20 0 1.00 16 -16 label
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} def
/pMOS {
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(3) (2) (pmos) (?) 4 beginparm
1 1.00 -44 -28 -44 28 2 polygon
1 1.00 -60 0 -64 0 2 polygon
1 1.00 0 -64 0 -28 -32 -28 -32 28 0 28 0 64 6 polygon
1 1.00 -52 0 8 0.00 360.00 xcarc
1.000 0.000 0.000 scb
(S) {/Times-Roman cf} 2 9 0 1.00 0 64 pinlabel
(D) {/Times-Roman cf} 2 13 0 1.00 0 -64 pinlabel
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mark v2 ( L=) v1 ( W=) v3 ( %pD %pG %pS Vdd ) v4 (spice:M) {/Times-Roman cf}
ctmk 4 0 1.00 -196 -139 infolabel
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(sim:p %pG %pD %pS) {/Times-Roman cf} 2 4 0 1.00 -196 -187 infolabel
mark v1 (W=) {/Times-Roman cf} ctmk 20 0 1.00 16 16 label
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} def
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1.000 0.000 0.000 scb
(G) {/Times-Roman cf} 2 7 0 1.00 -64 0 pinlabel
(S) {/Times-Roman cf} 2 13 0 1.00 0 -64 pinlabel
(D) {/Times-Roman cf} 2 9 0 1.00 0 64 pinlabel
(B) {/Times-Roman cf} 2 4 0 1.00 32 0 pinlabel
sce
mark v2 ( L=) v1 ( W=) v3 ( %pD %pG %pS %pB ) v4 (spice:M) {/Times-Roman cf}
ctmk 4 0 1.00 -244 -139 infolabel
sce
(sim:n %pG %pD %pS) {/Times-Roman cf} 2 4 0 1.00 -244 -187 infolabel
mark v2 (/) v1 (W/L=) {/Times-Roman cf} ctmk 20 0 1.00 16 32 label
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endgate
} def
/pMOS4 {
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(3) (2) (pmos) (?) 4 beginparm
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1 1.00 -60 0 -64 0 2 polygon
1 1.00 0 -64 0 -28 -32 -28 -32 28 0 28 0 64 6 polygon
1 1.00 -52 0 8 0.00 360.00 xcarc
1.000 0.000 0.000 scb
(S) {/Times-Roman cf} 2 9 0 1.00 0 64 pinlabel
(D) {/Times-Roman cf} 2 13 0 1.00 0 -64 pinlabel
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mark v2 ( L=) v1 ( W=) v3 ( %pD %pG %pS %pB ) v4 (spice:M) {/Times-Roman cf}
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(sim:p %pG %pD %pS) {/Times-Roman cf} 2 4 0 1.00 -196 -187 infolabel
mark v2 (/) v1 (W/L=) {/Times-Roman cf} ctmk 20 0 1.00 16 32 label
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} def
/NPN {
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mark v1 ( %pC %pB %pE ) v2 (spice:Q) {/Times-Roman cf} ctmk 4 0 1.00 -244 -139
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} def
/Diode {
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0 -48 0 -16 wire
0 48 0 16 wire
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(2) {/Times-Roman cf} 2 13 0 1.0 0 -48 pinlabel
sce
mark v1 (pcb:D) {/Helvetica cf} ctmk 20 0 1.00 -64 -144 infolabel
mark ( %p1 %p2 diode) v1 (spice:D) {/Times-Roman cf} ctmk 4 0 1.00 -64 -192
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endgate
} def
% EndLib
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