mirror of
https://github.com/Qubes-Community/Contents.git
synced 2025-05-02 06:16:28 -04:00
moved coreboot* to docs/coreboot
This commit is contained in:
parent
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commit
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2 changed files with 0 additions and 0 deletions
715
docs/coreboot/coreboot-x230-configfile
Normal file
715
docs/coreboot/coreboot-x230-configfile
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@ -0,0 +1,715 @@
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This is the coreboot configuration file which was created after running make nconfig.
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It is located in ~/coreboot/.config
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#
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# Automatically generated file; DO NOT EDIT.
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# coreboot configuration
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#
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#
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# General setup
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#
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CONFIG_COREBOOT_BUILD=y
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CONFIG_LOCALVERSION=""
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CONFIG_CBFS_PREFIX="fallback"
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CONFIG_COMPILER_GCC=y
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# CONFIG_COMPILER_LLVM_CLANG is not set
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# CONFIG_ANY_TOOLCHAIN is not set
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# CONFIG_CCACHE is not set
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# CONFIG_FMD_GENPARSER is not set
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# CONFIG_UTIL_GENPARSER is not set
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# CONFIG_USE_OPTION_TABLE is not set
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CONFIG_COMPRESS_RAMSTAGE=y
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CONFIG_INCLUDE_CONFIG_FILE=y
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CONFIG_COLLECT_TIMESTAMPS=y
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# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
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CONFIG_USE_BLOBS=y
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# CONFIG_COVERAGE is not set
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# CONFIG_UBSAN is not set
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CONFIG_RELOCATABLE_RAMSTAGE=y
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# CONFIG_UPDATE_IMAGE is not set
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# CONFIG_BOOTSPLASH_IMAGE is not set
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#
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# Mainboard
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#
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#
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# Important: Run 'make distclean' before switching boards
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#
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# CONFIG_VENDOR_AAEON is not set
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# CONFIG_VENDOR_ADI is not set
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# CONFIG_VENDOR_ADLINK is not set
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# CONFIG_VENDOR_ADVANSUS is not set
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# CONFIG_VENDOR_AMD is not set
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# CONFIG_VENDOR_AOPEN is not set
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# CONFIG_VENDOR_APPLE is not set
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# CONFIG_VENDOR_ARTECGROUP is not set
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# CONFIG_VENDOR_ASROCK is not set
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# CONFIG_VENDOR_ASUS is not set
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# CONFIG_VENDOR_AVALUE is not set
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# CONFIG_VENDOR_BACHMANN is not set
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# CONFIG_VENDOR_BAP is not set
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# CONFIG_VENDOR_BCOM is not set
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# CONFIG_VENDOR_BIOSTAR is not set
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# CONFIG_VENDOR_BROADCOM is not set
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# CONFIG_VENDOR_COMPULAB is not set
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# CONFIG_VENDOR_CUBIETECH is not set
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# CONFIG_VENDOR_DIGITALLOGIC is not set
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# CONFIG_VENDOR_ELMEX is not set
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# CONFIG_VENDOR_EMULATION is not set
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# CONFIG_VENDOR_ESD is not set
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# CONFIG_VENDOR_FOXCONN is not set
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# CONFIG_VENDOR_GETAC is not set
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# CONFIG_VENDOR_GIGABYTE is not set
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# CONFIG_VENDOR_GIZMOSPHERE is not set
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# CONFIG_VENDOR_GOOGLE is not set
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# CONFIG_VENDOR_HP is not set
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# CONFIG_VENDOR_IBASE is not set
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# CONFIG_VENDOR_IEI is not set
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# CONFIG_VENDOR_INTEL is not set
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# CONFIG_VENDOR_IWILL is not set
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# CONFIG_VENDOR_JETWAY is not set
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# CONFIG_VENDOR_KONTRON is not set
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CONFIG_VENDOR_LENOVO=y
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# CONFIG_VENDOR_LINUTOP is not set
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# CONFIG_VENDOR_LIPPERT is not set
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# CONFIG_VENDOR_LOWRISC is not set
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# CONFIG_VENDOR_MSI is not set
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# CONFIG_VENDOR_NVIDIA is not set
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# CONFIG_VENDOR_PACKARDBELL is not set
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# CONFIG_VENDOR_PCENGINES is not set
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# CONFIG_VENDOR_PURISM is not set
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# CONFIG_VENDOR_RODA is not set
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# CONFIG_VENDOR_SAMSUNG is not set
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# CONFIG_VENDOR_SAPPHIRE is not set
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# CONFIG_VENDOR_SCALEWAY is not set
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# CONFIG_VENDOR_SIEMENS is not set
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# CONFIG_VENDOR_SUNW is not set
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# CONFIG_VENDOR_SUPERMICRO is not set
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# CONFIG_VENDOR_TECHNEXION is not set
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# CONFIG_VENDOR_TI is not set
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# CONFIG_VENDOR_TRAVERSE is not set
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# CONFIG_VENDOR_TYAN is not set
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# CONFIG_VENDOR_VIA is not set
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# CONFIG_VENDOR_WINENT is not set
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# CONFIG_VENDOR_WINNET is not set
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CONFIG_BOARD_SPECIFIC_OPTIONS=y
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CONFIG_MAINBOARD_DIR="lenovo/x230"
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CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
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CONFIG_MAINBOARD_VENDOR="LENOVO"
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CONFIG_MAX_CPUS=8
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CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
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CONFIG_CBFS_SIZE=0x100000
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CONFIG_PAYLOAD_CONFIGFILE=""
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CONFIG_VGA_BIOS_ID="8086,0166"
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# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
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CONFIG_DIMM_SPD_SIZE=256
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CONFIG_VGA_BIOS=y
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CONFIG_DCACHE_RAM_BASE=0xfefe0000
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CONFIG_DCACHE_RAM_SIZE=0x20000
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CONFIG_VGA_BIOS_FILE="/home/user/coreboot/ROM/vga.rom"
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CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa
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CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
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CONFIG_HAVE_IFD_BIN=y
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CONFIG_HAVE_ME_BIN=y
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CONFIG_DRAM_RESET_GATE_GPIO=10
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CONFIG_POST_IO=y
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CONFIG_DEVICETREE="devicetree.cb"
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CONFIG_MAX_REBOOT_CNT=3
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CONFIG_HAVE_GBE_BIN=y
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CONFIG_USBDEBUG_HCD_INDEX=2
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CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
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CONFIG_POST_DEVICE=y
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# CONFIG_VBOOT is not set
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CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
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CONFIG_FMDFILE=""
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CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
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# CONFIG_DRIVERS_UART_8250IO is not set
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CONFIG_IFD_BIN_PATH="/home/user/coreboot/ROM/flashregion_0_flashdescriptor.bin"
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CONFIG_ME_BIN_PATH="/home/user/coreboot/ROM/flashregion_2_intel_me.bin"
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# CONFIG_BOARD_LENOVO_G505S is not set
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# CONFIG_BOARD_LENOVO_L520 is not set
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# CONFIG_BOARD_LENOVO_R400 is not set
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# CONFIG_BOARD_LENOVO_S230U is not set
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# CONFIG_BOARD_LENOVO_T400 is not set
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# CONFIG_BOARD_LENOVO_T420 is not set
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# CONFIG_BOARD_LENOVO_T420S is not set
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# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
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# CONFIG_BOARD_LENOVO_T430S is not set
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# CONFIG_BOARD_LENOVO_T500 is not set
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# CONFIG_BOARD_LENOVO_T520 is not set
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# CONFIG_BOARD_LENOVO_T530 is not set
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# CONFIG_BOARD_LENOVO_T60 is not set
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# CONFIG_BOARD_LENOVO_X131E is not set
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# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
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# CONFIG_BOARD_LENOVO_X200 is not set
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# CONFIG_BOARD_LENOVO_X201 is not set
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# CONFIG_BOARD_LENOVO_X220 is not set
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# CONFIG_BOARD_LENOVO_X220I is not set
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CONFIG_BOARD_LENOVO_X230=y
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# CONFIG_BOARD_LENOVO_X60 is not set
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# CONFIG_BOARD_LENOVO_Z61T is not set
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CONFIG_CPU_ADDR_BITS=36
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CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
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# CONFIG_USBDEBUG is not set
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CONFIG_DRIVERS_PS2_KEYBOARD=y
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# CONFIG_PCIEXP_L1_SUB_STATE is not set
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# CONFIG_NO_POST is not set
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CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
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CONFIG_BOARD_ROMSIZE_KB_12288=y
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# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
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CONFIG_COREBOOT_ROMSIZE_KB_12288=y
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# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
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CONFIG_COREBOOT_ROMSIZE_KB=12288
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CONFIG_ROM_SIZE=0xc00000
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CONFIG_SYSTEM_TYPE_LAPTOP=y
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# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
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#
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# Chipset
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#
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#
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# SoC
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#
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CONFIG_CPU_SPECIFIC_OPTIONS=y
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CONFIG_RAMTOP=0x200000
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CONFIG_HEAP_SIZE=0x4000
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CONFIG_RAMBASE=0x100000
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CONFIG_EHCI_BAR=0xfef00000
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CONFIG_SERIRQ_CONTINUOUS_MODE=y
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CONFIG_SMM_TSEG_SIZE=0x800000
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CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
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# CONFIG_SOC_BROADCOM_CYGNUS is not set
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CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
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# CONFIG_SOC_INTEL_GLK is not set
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CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
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CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
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CONFIG_ROMSTAGE_ADDR=0x2000000
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CONFIG_VERSTAGE_ADDR=0x2000000
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CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
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CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
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# CONFIG_BUILD_WITH_FAKE_IFD is not set
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CONFIG_PCIEXP_ASPM=y
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CONFIG_PCIEXP_COMMON_CLOCK=y
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# CONFIG_PCIEXP_CLK_PM is not set
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CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c"
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CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c"
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CONFIG_CACHE_MRC_SIZE_KB=512
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CONFIG_STACK_SIZE=0x1000
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CONFIG_CONSOLE_CBMEM=y
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CONFIG_UART_PCI_ADDR=0x0
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# CONFIG_SOC_INTEL_KABYLAKE is not set
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# CONFIG_SOC_LOWRISC_LOWRISC is not set
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# CONFIG_SOC_MARVELL_MVMAP2315 is not set
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# CONFIG_SOC_MEDIATEK_MT8173 is not set
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# CONFIG_SOC_NVIDIA_TEGRA124 is not set
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# CONFIG_SOC_NVIDIA_TEGRA210 is not set
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# CONFIG_SOC_QC_IPQ40XX is not set
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# CONFIG_SOC_QC_IPQ806X is not set
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# CONFIG_SOC_QUALCOMM_SDM845 is not set
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# CONFIG_SOC_ROCKCHIP_RK3288 is not set
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# CONFIG_SOC_ROCKCHIP_RK3399 is not set
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# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
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# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
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||||
# CONFIG_SOC_UCB_RISCV is not set
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#
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# CPU
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#
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# CONFIG_CPU_ALLWINNER_A10 is not set
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CONFIG_SOCKET_SPECIFIC_OPTIONS=y
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CONFIG_XIP_ROM_SIZE=0x20000
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CONFIG_NUM_IPI_STARTS=2
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# CONFIG_CPU_AMD_AGESA is not set
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# CONFIG_CPU_AMD_PI is not set
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# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
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CONFIG_CPU_INTEL_MODEL_306AX=y
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CONFIG_SSE2=y
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CONFIG_CPU_INTEL_SOCKET_RPGA989=y
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# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
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# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
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CONFIG_CPU_INTEL_COMMON=y
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CONFIG_ENABLE_VMX=y
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CONFIG_SET_VMX_LOCK_BIT=y
|
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# CONFIG_CPU_TI_AM335X is not set
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||||
# CONFIG_PARALLEL_CPU_INIT is not set
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# CONFIG_PARALLEL_MP is not set
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# CONFIG_UDELAY_IO is not set
|
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# CONFIG_UDELAY_LAPIC is not set
|
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CONFIG_UDELAY_TSC=y
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CONFIG_TSC_CONSTANT_RATE=y
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CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
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# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
|
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CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
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CONFIG_MMX=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
|
||||
CONFIG_CPU_UCODE_BINARIES=""
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
|
||||
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
|
||||
CONFIG_IF_NATIVE_VGA_INIT=y
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_C216=y
|
||||
CONFIG_SOUTH_BRIDGE_OPTIONS=y
|
||||
CONFIG_LOCK_SPI_FLASH_NONE=y
|
||||
# CONFIG_LOCK_SPI_FLASH_RO is not set
|
||||
# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
|
||||
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
CONFIG_EC_LENOVO_H8=y
|
||||
CONFIG_SEABIOS_PS2_TIMEOUT=3000
|
||||
CONFIG_H8_BEEP_ON_DEATH=y
|
||||
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
|
||||
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
|
||||
CONFIG_EC_LENOVO_PMH7=y
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
# CONFIG_EM100 is not set
|
||||
# CONFIG_CHECK_ME is not set
|
||||
CONFIG_USE_ME_CLEANER=y
|
||||
|
||||
#
|
||||
# Please test the modified ME/TXE firmware and coreboot in two steps
|
||||
#
|
||||
CONFIG_GBE_BIN_PATH="/home/user/coreboot/ROM/flashregion_3_gbe.bin"
|
||||
# CONFIG_HAVE_EC_BIN is not set
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_UDK_2017_BINDING is not set
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2015_VERSION=2015
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_VERSION=2013
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_RISCV_COMPRESSED is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
# CONFIG_EARLY_EBDA_INIT is not set
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set
|
||||
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
|
||||
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_VGA_TEXT_FRAMEBUFFER=y
|
||||
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
|
||||
# CONFIG_SPI_FLASH_SMM is not set
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_DRIVERS_UART is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_PLATFORM_USES_FSP2_0 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
CONFIG_INTEL_EDID=y
|
||||
CONFIG_INTEL_INT15=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_CPU="Ivybridge"
|
||||
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
|
||||
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
|
||||
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
|
||||
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"
|
||||
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_LPC_TPM is not set
|
||||
CONFIG_VGA=y
|
||||
CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
# CONFIG_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_ACPI_SATA_GENERATOR=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
CONFIG_RTC=y
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_POST_DEVICE_NONE=y
|
||||
# CONFIG_POST_DEVICE_LPC is not set
|
||||
# CONFIG_POST_DEVICE_PCI_PCIE is not set
|
||||
CONFIG_POST_IO_PORT=0x80
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
CONFIG_USE_WATCHDOG_ON_BOOT=y
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
# CONFIG_ACPI_NHLT is not set
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
CONFIG_PAYLOAD_SEABIOS=y
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
# CONFIG_PAYLOAD_LINUX is not set
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
|
||||
CONFIG_SEABIOS_STABLE=y
|
||||
# CONFIG_SEABIOS_MASTER is not set
|
||||
# CONFIG_SEABIOS_REVISION is not set
|
||||
CONFIG_SEABIOS_THREAD_OPTIONROMS=y
|
||||
CONFIG_SEABIOS_BOOTORDER_FILE=""
|
||||
CONFIG_SEABIOS_DEBUG_LEVEL=-1
|
||||
|
||||
#
|
||||
# Using default SeaBIOS log level
|
||||
#
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_COMPRESSED_PAYLOAD_LZMA=y
|
||||
# CONFIG_COMPRESSED_PAYLOAD_LZ4 is not set
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
CONFIG_COREINFO_SECONDARY_PAYLOAD=y
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_CAR is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
# CONFIG_REG_SCRIPT is not set
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_BOOTBLOCK_CUSTOM=y
|
418
docs/coreboot/coreboot-x230.md
Normal file
418
docs/coreboot/coreboot-x230.md
Normal file
|
@ -0,0 +1,418 @@
|
|||
# Coreboot on Lenovo X230
|
||||
|
||||
This howto describes how to install Coreboot on a Lenovo X230.
|
||||
This document is still a draft and needs some cleanup.
|
||||
|
||||
In order to flash the bios chip on the X230 you need special equipment to read and write to the two BIOS chips.
|
||||
An easy way which for an in-place flashiung procedure is to use a raspberry pi and a special flashing clip to read from and write to the Bios chip.
|
||||
|
||||
The setup looks like this:
|
||||
|
||||
Lenovo X230 (target) BIOS Chip <-- Pomodo Flash Clip <-- Raspberry Pi <-- Building Machine.
|
||||
|
||||
Because you need to build coreboot and this takes a long time on a raspberry pi, this howto assumes that you have an additional laptop/PC which will be used as building machine.
|
||||
The building machine will compile the coreboot ROm file and the raspberry pi is only used to read and write from and to the target device.
|
||||
|
||||
## Links
|
||||
I have looked at the following ressources to learn more about coreboot adn write this howto
|
||||
|
||||
- https://www.coreboot.org/Board:lenovo/x230
|
||||
- https://github.com/bibanon/Coreboot-ThinkPads/wiki/Hardware-Flashing-with-Raspberry-Pi
|
||||
- [Coreboot on the ThinkPad X220 with a Raspberry Pi](https://tylercipriani.com/blog/2016/11/13/coreboot-on-the-thinkpad-x220-with-a-raspberry-pi/)
|
||||
- [Karl Cordes - How to flash Coreboot on X220](https://karlcordes.com/coreboot-x220/)
|
||||
Gute Anleitung für Anschluss FlashClip an Pi
|
||||
- [Johannes' Blog - Coreboot on X220](https://wej.k.vu/coreboot/coreboot_on_the_lenovo_thinkpad_x220/)
|
||||
- [Coreboot X230]( https://blog.noq2.net/corebooting-thinkpad-x230.html)
|
||||
- [Flashing Coreboot on the T430 with a Raspberry Pi](https://nm-projects.de/2017/08/flashing-coreboot-on-the-t430-with-a-raspberry-pi/)
|
||||
- https://kennyballou.com/blog/2017/01/coreboot-x230/
|
||||
|
||||
Additional info has been provided by the Coreboot Mailinglist:
|
||||
|
||||
- https://mail.coreboot.org/pipermail/coreboot/2017-September/085173.html
|
||||
- https://mail.coreboot.org/pipermail/coreboot/2017-September/085182.html
|
||||
- https://mail.coreboot.org/pipermail/coreboot/2017-September/085185.html
|
||||
|
||||
## Hardware:
|
||||
the following parts are needed to build a Coreboot flashing devices:
|
||||
|
||||
- Raspberry Pi 3 ~ 35 Eur
|
||||
https://www.amazon.de/dp/B01CD5VC92/
|
||||
- 32 GB SDCard ~ 17 Eur
|
||||
https://www.amazon.de/dp/B073S8LQSL/
|
||||
- Jumper Cables ~ 7 Eur
|
||||
https://www.amazon.de/dp/B072NSLB98/
|
||||
- Pomona 5250 8-Pin Flash Clip ~ 12 Eur
|
||||
https://www.digikey.de/product-detail/de/pomona-electronics/5250/501-1311-ND/745102
|
||||
|
||||
## physical setup (FIXME!)
|
||||
the information how to connect the Pomodo Clip to the rapsberry pi has to be included here.
|
||||
|
||||
|
||||
## Procedure
|
||||
|
||||
- Setting up Raspberry Pi
|
||||
- Install FlashROM
|
||||
- Connect Flash Clip to Raspberry Pi
|
||||
- Disassemble X230 Laptop
|
||||
- Backup existing ROM
|
||||
- Setting up Coreboot on building machine
|
||||
- Compile Coreboot
|
||||
- Configure Coreboot
|
||||
- Flash new ROM
|
||||
|
||||
## Prepare Build machine
|
||||
You can use another Qubes Laptop as Building machine.
|
||||
1) Clone the Debian template
|
||||
```
|
||||
qvm-clone debian-9 t-coreboot
|
||||
```
|
||||
2) launch a terminal in this template an install the following packages
|
||||
```
|
||||
sudo apt-get install git wget build-essential gnat flex bison libncurses5-dev zlib1g-dev libfreetype6-dev unifont python3
|
||||
sudo apt-get build-dep grub
|
||||
```
|
||||
3) Create an AppVM bases on this template
|
||||
Important: increase private storage size, as the build process and the git repositories need some storage capacity.
|
||||
Example 10GB
|
||||
|
||||
|
||||
## Setting up Raspberry Pi
|
||||
|
||||
1. Download Noobs
|
||||
2. Install Raspbian
|
||||
3. Enable SSH
|
||||
|
||||
## Install FlashROM on Raspberry Pi
|
||||
Flashrom is used to read the current ROM from the Bios Chip and make a backup of it.
|
||||
It will also be used to flash the new coreboot Bios.
|
||||
1) Install build enviroment and dependencies for flashrom
|
||||
```
|
||||
sudo apt-get install libftdi1 libftdi-dev libusb-dev libpci-dev m4 bison flex libncurses5-dev libncurses5 build-essential pciutils usbutils libpci-dev libusb-dev libftdi1 libftdi-dev zlib1g-dev subversion libusb-1.0 gnat wget zlib1g-dev
|
||||
```
|
||||
Problem: some packackes could not be installed:
|
||||
[...]
|
||||
Package flex is not available, but is referred to by another package.
|
||||
This may mean that the package is missing, has been obsoleted, or
|
||||
is only available from another source
|
||||
[...]
|
||||
|
||||
Solution:
|
||||
delete all files in /var/lib/apt/lists
|
||||
2) Download and install Flashrom
|
||||
```
|
||||
git clone https://github.com/flashrom/flashrom
|
||||
cd flashrom
|
||||
make
|
||||
sudo make install
|
||||
```
|
||||
3) Enable the SPI device on the Raspberry Pi.
|
||||
```
|
||||
sudo raspi-config
|
||||
# In the menu choose:
|
||||
# - 5 Interfacing Options Configure connections to peripherals
|
||||
# - P4 SPI Enable/Disable automatic loading of SPI kernel module
|
||||
# - Would you like the SPI interface to be enabled?
|
||||
# - Yes
|
||||
sudo reboot
|
||||
```
|
||||
4) Modprobe SPI driver
|
||||
```
|
||||
sudo modprobe spi_bcm2835
|
||||
sudo modprobe spidev
|
||||
```
|
||||
|
||||
|
||||
## Prepare Build machine (the AppVM NOT the template)
|
||||
### Setup Coreboot
|
||||
Cloning the coreboot git. and recursively clone the necessary other gits.
|
||||
```
|
||||
git clone --recursive https://github.com/coreboot/coreboot
|
||||
cd ~/coreboot/3rdparty
|
||||
git clone http://review.coreboot.org/p/blobs.git
|
||||
```
|
||||
|
||||
### Setup Extraction Tool for binary blobs
|
||||
Build and install the extraction tool for the binary blobs.
|
||||
```
|
||||
cd ~/coreboot/util/ifdtool
|
||||
make
|
||||
sudo make install
|
||||
```
|
||||
|
||||
## on Raspberry Pi
|
||||
read existing BIOS and transfer it to build machine
|
||||
|
||||
1) Read upper bios chip (4MB)
|
||||
```
|
||||
pi@raspberrypi:~ $ flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -c "MX25L3205D/MX25L3208D" -r x230-bios-top1.bin
|
||||
flashrom p1.0-69-g3f7e341 on Linux 4.14.30-v7+ (armv7l)
|
||||
flashrom is free software, get the source code at https://flashrom.org
|
||||
|
||||
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
|
||||
Found Macronix flash chip "MX25L3205D/MX25L3208D" (4096 kB, SPI) on linux_spi.
|
||||
Reading flash... done.
|
||||
|
||||
```
|
||||
Repeat this two more times creating: x230-bios-top2.bin and x230-bios-top3.bin
|
||||
|
||||
2) Read lower bios chip (8MB)
|
||||
```
|
||||
pi@raspberrypi:~ $ flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -r x230-bios-bottom1.bin
|
||||
flashrom p1.0-69-g3f7e341 on Linux 4.14.30-v7+ (armv7l)
|
||||
flashrom is free software, get the source code at https://flashrom.org
|
||||
|
||||
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
|
||||
Found Eon flash chip "EN25QH64" (8192 kB, SPI) on linux_spi.
|
||||
Reading flash... done.
|
||||
|
||||
```
|
||||
Repeat this 2 more times and create two more copies x230-bios-bottom2.bin and x230-bios-bottom3.bin
|
||||
|
||||
3) verify that all files are identical
|
||||
for the top 4MB bios chip:
|
||||
```
|
||||
pi@raspberrypi:~ $ md5sum x230-bios-top?.bin
|
||||
54bfde566dffa17760a6115f27309681 x230-bios-top1.bin
|
||||
54bfde566dffa17760a6115f27309681 x230-bios-top2.bin
|
||||
54bfde566dffa17760a6115f27309681 x230-bios-top3.bin
|
||||
|
||||
```
|
||||
for the lower 8MB bios chip:
|
||||
```
|
||||
pi@raspberrypi:~ $ md5sum x230-bios-bottom?.bin
|
||||
ac7dffb64f7d11ec9b13cc9449e48a64 x230-bios-bottom1.bin
|
||||
ac7dffb64f7d11ec9b13cc9449e48a64 x230-bios-bottom2.bin
|
||||
ac7dffb64f7d11ec9b13cc9449e48a64 x230-bios-bottom3.bin
|
||||
|
||||
```
|
||||
|
||||
## on build machine: copy ROM files from raspberry pi
|
||||
|
||||
4) Copy the ROMs from raspberry pi to the "build machine"
|
||||
```
|
||||
user@my-coreboot:~/coreboot/ROM$ scp pi@192.168.200.107:~/x230-bios-* .
|
||||
pi@192.168.200.107's password:
|
||||
x230-bios-bottom1.bin 100% 8192KB 10.8MB/s 00:00
|
||||
x230-bios-top1.bin 100% 4096KB 11.1MB/s 00:00
|
||||
```
|
||||
|
||||
5) Merge two files into one ROM file
|
||||
```
|
||||
cat x230-bios-bottom1.bin x230-bios-top1.bin > x230-bios.rom
|
||||
```
|
||||
|
||||
6) move all rom files to ~/coreboot/ROM
|
||||
```
|
||||
mkdir ~/coreboot/ROM
|
||||
mv x230-* ~/coreboot/ROM
|
||||
```
|
||||
|
||||
|
||||
### Extract Blobs from exracted ROM
|
||||
```
|
||||
user@my-coreboot:~/coreboot/ROM$ cd ~/coreboot/ROM
|
||||
user@my-coreboot:~/coreboot/ROM$ ifdtool -x x230-bios.rom
|
||||
File x230-bios-bottom1.bin is 8388608 bytes
|
||||
Flash Region 0 (Flash Descriptor): 00000000 - 00000fff
|
||||
Flash Region 1 (BIOS): 00500000 - 00bfffff
|
||||
Error while writing: Success
|
||||
Flash Region 2 (Intel ME): 00003000 - 004fffff
|
||||
Flash Region 3 (GbE): 00001000 - 00002fff
|
||||
Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused)
|
||||
```
|
||||
you will now find the following files:
|
||||
```
|
||||
user@my-coreboot:~/coreboot/ROM$ ls -la
|
||||
total 36872
|
||||
drwxr-xr-x 2 user user 4096 Apr 6 00:48 .
|
||||
drwxr-xr-x 10 user user 4096 Apr 6 00:43 ..
|
||||
-rw-r--r-- 1 user user 4096 Apr 6 00:48 flashregion_0_flashdescriptor.bin
|
||||
-rw-r--r-- 1 user user 7340032 Apr 6 00:48 flashregion_1_bios.bin
|
||||
-rw-r--r-- 1 user user 5230592 Apr 6 00:48 flashregion_2_intel_me.bin
|
||||
-rw-r--r-- 1 user user 8192 Apr 6 00:48 flashregion_3_gbe.bin
|
||||
-rw-r--r-- 1 user user 12582912 Apr 6 00:30 x230-bios.bin
|
||||
-rw-r--r-- 1 user user 8388608 Apr 5 23:38 x230-bios-bottom1.bin
|
||||
-rw-r--r-- 1 user user 4194304 Apr 5 23:38 x230-bios-top1.bin
|
||||
```
|
||||
|
||||
## Extract VGA Blob
|
||||
https://www.coreboot.org/VGA_support#UEFI_Method
|
||||
|
||||
```
|
||||
cd ~/coreboot
|
||||
sudo apt-get install qt5-default
|
||||
git clone http://github.com/LongSoft/UEFITool.git
|
||||
cd UEFITool
|
||||
qmake
|
||||
make
|
||||
```
|
||||
Start UEFITool
|
||||
```
|
||||
./UEFITool
|
||||
```
|
||||
File > Open BIOS Image File
|
||||
Open the ROM-file from the 4MB BIOS-Chip (x230-bios-top1.bin) or the merged ROM (x230-bios.bin)
|
||||
|
||||
will generate the following messages:
|
||||
"parseVolume: unknown file system FFF12B8D-7696-4C8B-A985-2747075B4F50
|
||||
parseBios: volume size stored in header 61000h (397312) differs from calculated using block map 40000h (262144)
|
||||
parseVolume: unknown file system 00504624-8A59-4EEB-BD0F-6B36E96128E0
|
||||
parseBios: volume size stored in header 2F000h (192512) differs from calculated using block map 30000h (196608)
|
||||
parseFile: invalid data checksum"
|
||||
|
||||
|
||||
- Hit CTRL+F (Search...), 3rd Tab (Text)
|
||||
- Search for: VGA Compatible BIOS
|
||||
(Uncheck Unicode)
|
||||
- Will show the following message in the lower part of the window:
|
||||
ASCII text "VGA Compatible BIOS" found in Raw section at offset 22h
|
||||
- Double click on the line in the message windows which bring you to the raw section
|
||||
- Right Click on "Raw section" and choose "Extract Body"
|
||||
- Save file as ~/coreboot/ROM/vga.rom
|
||||
|
||||
|
||||
## Configure and build Coreboot
|
||||
|
||||
1) Launch Configuration menu
|
||||
```
|
||||
cd ~/coreboot/
|
||||
make nconfig
|
||||
```
|
||||
|
||||
Enter to open Submenu, Escape to switch back.
|
||||
F6 saves config to /home/user/coreboot/.config
|
||||
F9 quits config menu
|
||||
|
||||
FIXME: needs more information about which options to choose and how to import the Blobs
|
||||
|
||||
2) build coreboot using 7 from total 8 cores on my W540 (adapt this to your possibilities)
|
||||
```
|
||||
make crossgcc-i386 CPUS=7
|
||||
make iasl
|
||||
make
|
||||
```
|
||||
|
||||
## Split coreboot ROM
|
||||
after building coreboot you need to the 12mb file into a 4mb and 8mb file.
|
||||
```
|
||||
mkdir ~/coreboot/ROM-ready
|
||||
# Split first 8MB of coreboot.rom (bottom-chip)
|
||||
dd if=~/coreboot/build/coreboot.rom of=~/coreboot/ROM-ready/x230-coreboot-8mb.rom bs=1024 count=$[1024*8] skip=0
|
||||
|
||||
# Split last 4MB of coreboot.rom (top-chip)
|
||||
dd if=~/coreboot/build/coreboot.rom of=~/coreboot/ROM-ready/x230-coreboot-4mb.rom bs=1024 count=$[1024*4] skip=$[1024*8]
|
||||
|
||||
```
|
||||
|
||||
## Copy ROM to raspberry pi and flash
|
||||
Transfer the two new ROM files over to the raspberry pi
|
||||
```
|
||||
scp x230-coreboot-* pi@192.168.200.107:~/
|
||||
```
|
||||
I have moved the coreboot-ROM files to a new directory ~/ROM-ready on the raspberry pi
|
||||
|
||||
|
||||
Logon to the pi and flash both chips:
|
||||
```
|
||||
# write top chip (4MB)
|
||||
pi@raspberrypi:~/ROM-ready $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -c "MX25L3205D/MX25L3208D" -w x230-coreboot-4mb.rom
|
||||
flashrom p1.0-69-g3f7e341 on Linux 4.14.30-v7+ (armv7l)
|
||||
flashrom is free software, get the source code at https://flashrom.org
|
||||
|
||||
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
|
||||
Found Macronix flash chip "MX25L3205D/MX25L3208D" (4096 kB, SPI) on linux_spi.
|
||||
Reading old flash chip contents... done.
|
||||
Erasing and writing flash chip... Erase/write done.
|
||||
Verifying flash... VERIFIED.
|
||||
|
||||
# write bottom chip (8MB)
|
||||
pi@raspberrypi:~/ROM-ready $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1000 -w x230-coreboot-8mb.rom
|
||||
flashrom p1.0-69-g3f7e341 on Linux 4.14.30-v7+ (armv7l)
|
||||
flashrom is free software, get the source code at https://flashrom.org
|
||||
|
||||
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
|
||||
Found Eon flash chip "EN25QH64" (8192 kB, SPI) on linux_spi.
|
||||
Reading old flash chip contents... done.
|
||||
Erasing and writing flash chip... Erase/write done.
|
||||
Verifying flash... VERIFIED.
|
||||
|
||||
```
|
||||
## Test drive
|
||||
now it is time to cross fingers and try if you was able to flash coreboot.
|
||||
Remove the Pomodo-Clip, put your keyboard back, put your battery in and power on.
|
||||
In case you run into any problems, you can always reflash your stock rom.
|
||||
|
||||
|
||||
|
||||
## From my older notes (FIXME!)
|
||||
(this needs to be rewritten/updated to the above procedure)
|
||||
|
||||
--- on your raspberry pi ---
|
||||
|
||||
0) Put External Flash Clip, female jumper cables and Raspberry pi together
|
||||
(kind of a lego thing)
|
||||
|
||||
1) Install Raspberian on Pi using Noobs
|
||||
|
||||
2) Update Pi and install additional packages including 'flashrom'
|
||||
|
||||
3) take keyboard and palmrest of your "coreboot target laptop" (target) off
|
||||
to access the BIOS Chip(s)
|
||||
|
||||
4) Connect the BIOS-Clip to BIOS-chips and read the content from your pi
|
||||
(x230-default-part2-4mb.rom / x230-default-part2-8mb.rom)
|
||||
|
||||
5) merge the two files into one 12 MB ROM file
|
||||
(x230-default-12mb.rom)
|
||||
|
||||
--- on your build laptop ---
|
||||
|
||||
6) Copy all three files to your "build laptop" (laptop)
|
||||
Build Laptop must run Linux, this howto assumes you are using Ubuntu 16.04.3 LTS
|
||||
(could also be installed on an USB thumbdrive or external harddrive)
|
||||
|
||||
7) Download Coreboot from GIT
|
||||
|
||||
7) Install UEFITool on laptop
|
||||
|
||||
8) Extract VGA BLOB from the x230-default-12mb.rom file
|
||||
save the file in the coreboot/blobs directory
|
||||
(./coreboot/3rdparty/blobs/mainboard/lenovo/x230/pci8086,0166.rom)
|
||||
|
||||
9) Build Coreboot Toolchain
|
||||
|
||||
10) Compile ifdtool located in the coreboot/utils directory
|
||||
|
||||
11) Extract BLOBS from x230-default-12mb.rom using ifdtool
|
||||
save the files in the coreboot/blobs directory
|
||||
(./coreboot/3rdparty/blobs/mainboard/lenovo/x230/descriptor.bin)
|
||||
(./coreboot/3rdparty/blobs/mainboard/lenovo/x230/me.bin)
|
||||
(./coreboot/3rdparty/blobs/mainboard/lenovo/x230/gbe.bin)
|
||||
|
||||
11b) [Optionally] Use ME_Cleaner on me.bin file )
|
||||
(also it seems that ME_Cleaner is included in Coreboot:
|
||||
Coreboot nconfig:
|
||||
Chipset > Add Intel descriptor.bin file > Add Intel ME/TXE firmware
|
||||
--> Strip down the Intel ME/TXE firmware )
|
||||
I've choosen to leave the me.bin as is until everything is working.
|
||||
|
||||
12) Configure Coreboot (make nconfig)
|
||||
choose parameters/features and add the 4 binary blobs (step 8 and 11)
|
||||
|
||||
13) build coreboot image
|
||||
(./coreboot/build/coreboot.rom)
|
||||
|
||||
14) Split coreboot.rom into two separate files to flash them to your 2 chips
|
||||
(x230-coreboot-8mb.rom and x230-coreboot-4mb.rom)
|
||||
|
||||
15) copy both files to your Raspberry Pi
|
||||
|
||||
--- on your Raspberry pi ---
|
||||
|
||||
16) flash both files using flashrom again
|
||||
|
||||
17) Reboot target laptop
|
||||
|
||||
18) should boot up with coreboot.
|
||||
|
||||
|
Loading…
Add table
Add a link
Reference in a new issue