/** * \file * * * \author Francesco Sacchi * * \brief Vectored Interrupt Controller VIC driver. */ #ifndef DRV_VIC_LPC2_H #define DRV_VIC_LPC2_H #include #include #if CPU_ARM_LPC2378 #include #define vic_vector(i) (*(&VICVectAddr0 + i)) #define vic_priority(i) (*(&VICVectCntl0 + i)) #define VIC_SRC_CNT 32 #define vic_enable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnable = BV(i); } while (0) #define vic_disable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnClr = BV(i); } while (0) typedef void vic_handler_t(void); void vic_defaultHandler(void); INLINE void vic_init(void) { IRQ_DISABLE; /* Assign all sources to IRQ (not to FIQ) */ VICIntSelect = 0; /* Disable all sw interrupts */ VICSoftIntClr = 0xFFFFFFFF; /* Disable all interrupts */ VICIntEnClr = 0xFFFFFFFF; for (int i = 0; i < VIC_SRC_CNT; i++) vic_vector(i) = (reg32_t)vic_defaultHandler; } INLINE void vic_setVector(int id, vic_handler_t *handler) { ASSERT(id < VIC_SRC_CNT); vic_vector(id) = (reg32_t)handler; } #else #error Unknown CPU #endif #endif /* DRV_VIC_LPC2_H */