/** * \file * * * \author Francesco Sacchi * * \brief Low-level timer module for Atmel AT91 (interface). */ #ifndef DRV_AT91_TIMER_H #define DRV_AT91_TIMER_H #include /* CPU_FREQ */ #include "cfg/cfg_timer.h" /* CONFIG_TIMER */ #include /* uint8_t */ #include /* BV */ #include /** * \name Values for CONFIG_TIMER. * * Select which hardware timer interrupt to use for system clock and softtimers. * * $WIZ$ timer_select = "TIMER_ON_PIT", "TIMER_DEFAULT" */ #define TIMER_ON_PIT 1 ///< System timer on Periodic interval timer #define TIMER_DEFAULT TIMER_ON_PIT ///< Default system timer /* * Hardware dependent timer initialization. */ #if (CONFIG_TIMER == TIMER_ON_PIT) /* * On ARM all system IRQs are handled by the sysirq_dispatcher, so the actual * timer handler can be treated like any other normal routine. */ #define DEFINE_TIMER_ISR void timer_handler(void); \ void timer_handler(void) #define TIMER_TICKS_PER_SEC 1000 #define TIMER_HW_CNT (CPU_FREQ / (16 * TIMER_TICKS_PER_SEC) - 1) /** Frequency of the hardware high-precision timer. */ #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ / 16) /** Type of time expressed in ticks of the hardware high-precision timer */ typedef uint32_t hptime_t; #define SIZEOF_HPTIME_T 4 INLINE void timer_hw_irq(void) { /* Reset counters, this is needed to reset timer and interrupt flags */ uint32_t dummy = PIVR; (void) dummy; } INLINE bool timer_hw_triggered(void) { return PIT_SR & BV(PITS); } INLINE hptime_t timer_hw_hpread(void) { /* In the upper part of PIT_PIIR there is unused data */ return PIIR & CPIV_MASK; } #else #error Unimplemented value for CONFIG_TIMER #endif /* CONFIG_TIMER */ void timer_hw_init(void); #endif /* DRV_TIMER_AT91_H */