mirror of
https://github.com/markqvist/OpenModem.git
synced 2024-10-01 03:15:46 -04:00
Reworked AFSK Struct
This commit is contained in:
parent
854d0abbe5
commit
e76216875e
181
Modem/afsk.c
181
Modem/afsk.c
@ -138,13 +138,7 @@ static bool hdlcParse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo)
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}
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/**
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* ADC ISR callback.
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* This function has to be called by the ADC ISR when a sample of the configured
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* channel is available.
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* \param af Afsk context to operate on.
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* \param curr_sample current sample from the ADC.
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*/
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void afsk_adc_isr(Afsk *af, int8_t curr_sample)
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{
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AFSK_STROBE_ON();
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@ -165,63 +159,63 @@ void afsk_adc_isr(Afsk *af, int8_t curr_sample)
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* through the CONFIG_AFSK_FILTER config variable.
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*/
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af->iir_x[0] = af->iir_x[1];
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af->iirX[0] = af->iirX[1];
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#if (CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH)
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af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2;
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//af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 6.027339492;
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af->iirX[1] = ((int8_t)fifo_pop(&af->delayFifo) * curr_sample) >> 2;
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//af->iirX[1] = ((int8_t)fifo_pop(&af->delayFifo) * curr_sample) / 6.027339492;
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#elif (CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV)
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af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2;
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//af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 3.558147322;
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af->iirX[1] = ((int8_t)fifo_pop(&af->delayFifo) * curr_sample) >> 2;
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//af->iirX[1] = ((int8_t)fifo_pop(&af->delayFifo) * curr_sample) / 3.558147322;
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#else
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#error Filter type not found!
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#endif
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af->iir_y[0] = af->iir_y[1];
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af->iirY[0] = af->iirY[1];
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#if CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH
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/*
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* This strange sum + shift is an optimization for af->iir_y[0] * 0.668.
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* This strange sum + shift is an optimization for af->iirY[0] * 0.668.
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* iir * 0.668 ~= (iir * 21) / 32 =
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* = (iir * 16) / 32 + (iir * 4) / 32 + iir / 32 =
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* = iir / 2 + iir / 8 + iir / 32 =
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* = iir >> 1 + iir >> 3 + iir >> 5
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*/
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af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1) + (af->iir_y[0] >> 3) + (af->iir_y[0] >> 5);
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//af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.6681786379;
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af->iirY[1] = af->iirX[0] + af->iirX[1] + (af->iirY[0] >> 1) + (af->iirY[0] >> 3) + (af->iirY[0] >> 5);
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//af->iirY[1] = af->iirX[0] + af->iirX[1] + af->iirY[0] * 0.6681786379;
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#elif CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV
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/*
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* This should be (af->iir_y[0] * 0.438) but
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* (af->iir_y[0] >> 1) is a faster approximation :-)
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* This should be (af->iirY[0] * 0.438) but
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* (af->iirY[0] >> 1) is a faster approximation :-)
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*/
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af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1);
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//af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.4379097269;
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af->iirY[1] = af->iirX[0] + af->iirX[1] + (af->iirY[0] >> 1);
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//af->iirY[1] = af->iirX[0] + af->iirX[1] + af->iirY[0] * 0.4379097269;
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#endif
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/* Save this sampled bit in a delay line */
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af->sampled_bits <<= 1;
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af->sampled_bits |= (af->iir_y[1] > 0) ? 1 : 0;
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af->sampledBits <<= 1;
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af->sampledBits |= (af->iirY[1] > 0) ? 1 : 0;
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/* Store current ADC sample in the af->delay_fifo */
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fifo_push(&af->delay_fifo, curr_sample);
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/* Store current ADC sample in the af->delayFifo */
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fifo_push(&af->delayFifo, curr_sample);
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/* If there is an edge, adjust phase sampling */
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if (EDGE_FOUND(af->sampled_bits))
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if (EDGE_FOUND(af->sampledBits))
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{
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if (af->curr_phase < PHASE_THRES)
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af->curr_phase += PHASE_INC;
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if (af->currentPhase < PHASE_THRES)
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af->currentPhase += PHASE_INC;
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else
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af->curr_phase -= PHASE_INC;
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af->currentPhase -= PHASE_INC;
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}
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af->curr_phase += PHASE_BIT;
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af->currentPhase += PHASE_BIT;
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/* sample the bit */
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if (af->curr_phase >= PHASE_MAX)
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if (af->currentPhase >= PHASE_MAX)
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{
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af->curr_phase %= PHASE_MAX;
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af->currentPhase %= PHASE_MAX;
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/* Shift 1 position in the shift register of the found bits */
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af->found_bits <<= 1;
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af->actualBits <<= 1;
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/*
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* Determine bit value by reading the last 3 sampled bits.
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@ -230,19 +224,19 @@ void afsk_adc_isr(Afsk *af, int8_t curr_sample)
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* This algorithm presumes that there are 8 samples per bit.
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*/
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STATIC_ASSERT(SAMPLESPERBIT == 8);
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uint8_t bits = af->sampled_bits & 0x07;
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uint8_t bits = af->sampledBits & 0x07;
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if (bits == 0x07 // 111, 3 bits set to 1
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|| bits == 0x06 // 110, 2 bits
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|| bits == 0x05 // 101, 2 bits
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|| bits == 0x03 // 011, 2 bits
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)
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af->found_bits |= 1;
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af->actualBits |= 1;
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/*
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* NRZI coding: if 2 consecutive bits have the same value
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* a 1 is received, otherwise it's a 0.
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*/
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if (!hdlcParse(&af->hdlc, !EDGE_FOUND(af->found_bits), &af->rx_fifo))
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if (!hdlcParse(&af->hdlc, !EDGE_FOUND(af->actualBits), &af->rxFifo))
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af->status |= AFSK_RXFIFO_OVERRUN;
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}
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@ -254,14 +248,14 @@ static void afsk_txStart(Afsk *af)
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{
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if (!af->sending)
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{
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af->phase_inc = MARK_INC;
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af->phase_acc = 0;
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af->stuff_cnt = 0;
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af->phaseInc = MARK_INC;
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af->phaseAcc = 0;
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af->bitstuffCount = 0;
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af->sending = true;
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af->preamble_len = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000);
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AFSK_DAC_IRQ_START(af->dac_ch);
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af->preambleLength = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000);
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AFSK_DAC_IRQ_START(af->dacPin);
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}
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ATOMIC(af->trailer_len = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000));
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ATOMIC(af->tailLength = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000));
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}
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#define BIT_STUFF_LEN 5
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@ -282,14 +276,14 @@ uint8_t afsk_dac_isr(Afsk *af)
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AFSK_STROBE_ON();
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/* Check if we are at a start of a sample cycle */
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if (af->sample_count == 0)
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if (af->sampleIndex == 0)
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{
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if (af->tx_bit == 0)
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if (af->txBit == 0)
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{
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/* We have just finished transimitting a char, get a new one. */
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if (fifo_isempty(&af->tx_fifo) && af->trailer_len == 0)
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if (fifo_isempty(&af->txFifo) && af->tailLength == 0)
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{
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AFSK_DAC_IRQ_STOP(af->dac_ch);
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AFSK_DAC_IRQ_STOP(af->dacPin);
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af->sending = false;
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AFSK_STROBE_OFF();
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return 0;
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@ -300,58 +294,58 @@ uint8_t afsk_dac_isr(Afsk *af)
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* If we have just finished sending an unstuffed byte,
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* reset bitstuff counter.
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*/
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if (!af->bit_stuff)
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af->stuff_cnt = 0;
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if (!af->bitStuff)
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af->bitstuffCount = 0;
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af->bit_stuff = true;
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af->bitStuff = true;
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/*
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* Handle preamble and trailer
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*/
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if (af->preamble_len == 0)
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if (af->preambleLength == 0)
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{
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if (fifo_isempty(&af->tx_fifo))
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if (fifo_isempty(&af->txFifo))
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{
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af->trailer_len--;
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af->curr_out = HDLC_FLAG;
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af->tailLength--;
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af->currentOutputByte = HDLC_FLAG;
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}
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else
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af->curr_out = fifo_pop(&af->tx_fifo);
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af->currentOutputByte = fifo_pop(&af->txFifo);
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}
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else
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{
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af->preamble_len--;
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af->curr_out = HDLC_FLAG;
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af->preambleLength--;
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af->currentOutputByte = HDLC_FLAG;
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}
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/* Handle char escape */
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if (af->curr_out == AX25_ESC)
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if (af->currentOutputByte == AX25_ESC)
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{
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if (fifo_isempty(&af->tx_fifo))
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if (fifo_isempty(&af->txFifo))
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{
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AFSK_DAC_IRQ_STOP(af->dac_ch);
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AFSK_DAC_IRQ_STOP(af->dacPin);
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af->sending = false;
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AFSK_STROBE_OFF();
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return 0;
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}
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else
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af->curr_out = fifo_pop(&af->tx_fifo);
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af->currentOutputByte = fifo_pop(&af->txFifo);
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}
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else if (af->curr_out == HDLC_FLAG || af->curr_out == HDLC_RESET)
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else if (af->currentOutputByte == HDLC_FLAG || af->currentOutputByte == HDLC_RESET)
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/* If these chars are not escaped disable bit stuffing */
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af->bit_stuff = false;
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af->bitStuff = false;
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}
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/* Start with LSB mask */
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af->tx_bit = 0x01;
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af->txBit = 0x01;
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}
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/* check for bit stuffing */
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if (af->bit_stuff && af->stuff_cnt >= BIT_STUFF_LEN)
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if (af->bitStuff && af->bitstuffCount >= BIT_STUFF_LEN)
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{
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/* If there are more than 5 ones in a row insert a 0 */
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af->stuff_cnt = 0;
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af->bitstuffCount = 0;
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/* switch tone */
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af->phase_inc = SWITCH_TONE(af->phase_inc);
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af->phaseInc = SWITCH_TONE(af->phaseInc);
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}
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else
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{
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@ -359,14 +353,14 @@ uint8_t afsk_dac_isr(Afsk *af)
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* NRZI: if we want to transmit a 1 the modulated frequency will stay
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* unchanged; with a 0, there will be a change in the tone.
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*/
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if (af->curr_out & af->tx_bit)
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if (af->currentOutputByte & af->txBit)
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{
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/*
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* Transmit a 1:
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* - Stay on the previous tone
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* - Increase bit stuff counter
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*/
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af->stuff_cnt++;
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af->bitstuffCount++;
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}
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else
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{
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@ -375,23 +369,23 @@ uint8_t afsk_dac_isr(Afsk *af)
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* - Reset bit stuff counter
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* - Switch tone
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*/
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af->stuff_cnt = 0;
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af->phase_inc = SWITCH_TONE(af->phase_inc);
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af->bitstuffCount = 0;
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af->phaseInc = SWITCH_TONE(af->phaseInc);
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}
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/* Go to the next bit */
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af->tx_bit <<= 1;
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af->txBit <<= 1;
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}
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af->sample_count = DAC_SAMPLESPERBIT;
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af->sampleIndex = DAC_SAMPLESPERBIT;
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}
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/* Get new sample and put it out on the DAC */
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af->phase_acc += af->phase_inc;
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af->phase_acc %= SIN_LEN;
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af->phaseAcc += af->phaseInc;
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af->phaseAcc %= SIN_LEN;
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af->sample_count--;
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af->sampleIndex--;
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AFSK_STROBE_OFF();
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return sinSample(af->phase_acc);
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return sinSample(af->phaseAcc);
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}
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@ -401,7 +395,7 @@ static size_t afsk_read(KFile *fd, void *_buf, size_t size)
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uint8_t *buf = (uint8_t *)_buf;
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#if CONFIG_AFSK_RXTIMEOUT == 0
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while (size-- && !fifo_isempty_locked(&af->rx_fifo))
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while (size-- && !fifo_isempty_locked(&af->rxFifo))
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#else
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while (size--)
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#endif
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@ -410,7 +404,7 @@ static size_t afsk_read(KFile *fd, void *_buf, size_t size)
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ticks_t start = timer_clock();
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#endif
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while (fifo_isempty_locked(&af->rx_fifo))
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while (fifo_isempty_locked(&af->rxFifo))
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{
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cpu_relax();
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#if CONFIG_AFSK_RXTIMEOUT != -1
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@ -419,7 +413,7 @@ static size_t afsk_read(KFile *fd, void *_buf, size_t size)
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#endif
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}
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*buf++ = fifo_pop_locked(&af->rx_fifo);
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*buf++ = fifo_pop_locked(&af->rxFifo);
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}
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return buf - (uint8_t *)_buf;
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@ -432,10 +426,10 @@ static size_t afsk_write(KFile *fd, const void *_buf, size_t size)
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while (size--)
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{
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while (fifo_isfull_locked(&af->tx_fifo))
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while (fifo_isfull_locked(&af->txFifo))
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cpu_relax();
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fifo_push_locked(&af->tx_fifo, *buf++);
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fifo_push_locked(&af->txFifo, *buf++);
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afsk_txStart(af);
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}
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@ -465,33 +459,26 @@ static void afsk_clearerr(KFile *fd)
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ATOMIC(af->status = 0);
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}
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/**
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* Initialize an AFSK1200 modem.
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* \param af Afsk context to operate on.
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* \param adc_ch ADC channel used by the demodulator.
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* \param dac_ch DAC channel used by the modulator.
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*/
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void afsk_init(Afsk *af, int adc_ch, int dac_ch)
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void afsk_init(Afsk *af, int adcPin, int dacPin)
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{
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#if CONFIG_AFSK_RXTIMEOUT != -1
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MOD_CHECK(timer);
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#endif
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memset(af, 0, sizeof(*af));
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af->adc_ch = adc_ch;
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af->dac_ch = dac_ch;
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af->adcPin = adcPin;
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af->dacPin = dacPin;
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fifo_init(&af->delay_fifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf));
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fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf));
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fifo_init(&af->delayFifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf));
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fifo_init(&af->rxFifo, af->rx_buf, sizeof(af->rx_buf));
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/* Fill sample FIFO with 0 */
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for (int i = 0; i < SAMPLESPERBIT / 2; i++)
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fifo_push(&af->delay_fifo, 0);
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fifo_push(&af->delayFifo, 0);
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fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf));
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fifo_init(&af->txFifo, af->tx_buf, sizeof(af->tx_buf));
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AFSK_ADC_INIT(adc_ch, af);
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AFSK_DAC_INIT(dac_ch, af);
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AFSK_ADC_INIT(adcPin, af);
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AFSK_DAC_INIT(dacPin, af);
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AFSK_STROBE_INIT();
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//LOG_INFO("MARK_INC %d, SPACE_INC %d\n", MARK_INC, SPACE_INC);
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@ -501,5 +488,5 @@ void afsk_init(Afsk *af, int adc_ch, int dac_ch)
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af->fd.flush = afsk_flush;
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af->fd.error = afsk_error;
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af->fd.clearerr = afsk_clearerr;
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af->phase_inc = MARK_INC;
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af->phaseInc = MARK_INC;
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}
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81
Modem/afsk.h
81
Modem/afsk.h
@ -26,74 +26,49 @@ typedef struct Hdlc
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typedef struct Afsk
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{
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// I/O hardware pins
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int adcPin; // Pin for incoming signal
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int dacPin; // Pin for outgoing signal
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KFile fd;
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// I/O hardware pins
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int adcPin; // Pin for incoming signal
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int dacPin; // Pin for outgoing signal
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// General values
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Hdlc hdlc; // We need a link control structure
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uint16_t preambleLength; // Length of sync preamble
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uint16_t tailLength; // Length of transmission tail
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Hdlc hdlc; // We need a link control structure
|
||||
uint16_t preambleLength; // Length of sync preamble
|
||||
uint16_t tailLength; // Length of transmission tail
|
||||
|
||||
// Modulation values
|
||||
uint8_t sample_index; // Current sample index for outgoing bit
|
||||
uint8_t currentOutputByte; // Current byte to be modulated
|
||||
uint8_t txBit; // Mask of current modulated bit
|
||||
uint8_t sampleIndex; // Current sample index for outgoing bit
|
||||
uint8_t currentOutputByte; // Current byte to be modulated
|
||||
uint8_t txBit; // Mask of current modulated bit
|
||||
bool bitStuff; // Whether bitstuffing is allowed
|
||||
|
||||
uint8_t bitstuffCount; // Counter for bit-stuffing
|
||||
uint8_t bitstuffCount; // Counter for bit-stuffing
|
||||
|
||||
uint16_t phaseAcc; // Phase accumulator
|
||||
uint16_t phaseInc; // Phase increment per sample
|
||||
uint16_t phaseAcc; // Phase accumulator
|
||||
uint16_t phaseInc; // Phase increment per sample
|
||||
|
||||
FIFOBuffer txFifo; // FIFO for transmit data
|
||||
uint8_t txBuffer[TX_BUFLEN];// Actial data storage for said FIFO
|
||||
FIFOBuffer txFifo; // FIFO for transmit data
|
||||
uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN]; // Actial data storage for said FIFO
|
||||
|
||||
volatile bool sending; // Set when modem is sending
|
||||
volatile bool sending; // Set when modem is sending
|
||||
|
||||
// Demodulation values
|
||||
FIFOBuffer delayFifo; // Delayed FIFO for frequency discrimination
|
||||
int8_t delayBuffer[5]; // Actual data storage for said FIFO
|
||||
FIFOBuffer delayFifo; // Delayed FIFO for frequency discrimination
|
||||
int8_t delay_buf[SAMPLESPERBIT / 2 + 1];// Actual data storage for said FIFO
|
||||
|
||||
FIFOBuffer rxFifo; // FIFO for received data
|
||||
uint8_t rxBuffer[RX_BUFLEN];// Actual data storage for said FIFO
|
||||
FIFOBuffer rxFifo; // FIFO for received data
|
||||
uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN]; // Actual data storage for said FIFO
|
||||
|
||||
int16_t iirX[2]; // IIR Filter X cells
|
||||
int16_t iirY[2]; // IIR Filter Y cells
|
||||
int16_t iirX[2]; // IIR Filter X cells
|
||||
int16_t iirY[2]; // IIR Filter Y cells
|
||||
|
||||
uint8_t sampledBits; // Bits sampled by the demodulator (at ADC speed)
|
||||
int8_t currentPhase; // Current phase of the demodulator
|
||||
uint8_t actualBits; // Actual found bits at correct bitrate
|
||||
uint8_t sampledBits; // Bits sampled by the demodulator (at ADC speed)
|
||||
int8_t currentPhase; // Current phase of the demodulator
|
||||
uint8_t actualBits; // Actual found bits at correct bitrate
|
||||
|
||||
volatile int status; // Status of the modem, 0 means OK
|
||||
volatile int status; // Status of the modem, 0 means OK
|
||||
|
||||
/*
|
||||
KFile fd;
|
||||
int adc_ch;
|
||||
int dac_ch;
|
||||
uint8_t sample_count;
|
||||
uint8_t curr_out;
|
||||
uint8_t tx_bit;
|
||||
bool bit_stuff;
|
||||
uint8_t stuff_cnt;
|
||||
uint16_t phase_acc;
|
||||
uint16_t phase_inc;
|
||||
FIFOBuffer delay_fifo;
|
||||
int8_t delay_buf[SAMPLESPERBIT / 2 + 1];
|
||||
FIFOBuffer rx_fifo;
|
||||
uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
|
||||
FIFOBuffer tx_fifo;
|
||||
uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
|
||||
int16_t iir_x[2];
|
||||
int16_t iir_y[2];
|
||||
uint8_t sampled_bits;
|
||||
int8_t curr_phase;
|
||||
uint8_t found_bits;
|
||||
volatile bool sending;
|
||||
volatile int status;
|
||||
Hdlc hdlc;
|
||||
uint16_t preamble_len;
|
||||
uint16_t trailer_len;
|
||||
*/
|
||||
} Afsk;
|
||||
|
||||
#define KFT_AFSK MAKE_ID('F', 'S', 'K', 'M')
|
||||
|
@ -34,8 +34,8 @@ int main(void)
|
||||
|
||||
while (1)
|
||||
{
|
||||
if (!fifo_isempty(&afsk.rx_fifo)) {
|
||||
char c = fifo_pop(&afsk.rx_fifo);
|
||||
if (!fifo_isempty(&afsk.rxFifo)) {
|
||||
char c = fifo_pop(&afsk.rxFifo);
|
||||
kprintf("%c", c);
|
||||
}
|
||||
}
|
||||
|
@ -1,2 +1,2 @@
|
||||
#define VERS_BUILD 45
|
||||
#define VERS_BUILD 49
|
||||
#define VERS_HOST "vixen"
|
||||
|
Loading…
Reference in New Issue
Block a user