Improved data carrier detection

This commit is contained in:
Mark Qvist 2018-04-24 17:34:59 +02:00
parent 01c629a6fd
commit b7ffba0e92
6 changed files with 35 additions and 7 deletions

View file

@ -61,6 +61,8 @@ void AFSK_init(Afsk *afsk) {
AFSK_modem = afsk;
// Set phase increment
afsk->phaseInc = MARK_INC;
afsk->silentSamples = 0;
// Initialise FIFO buffers
fifo_init(&afsk->delayFifo, (uint8_t *)afsk->delayBuf, sizeof(afsk->delayBuf));
fifo_init(&afsk->rxFifo, afsk->rxBuf, sizeof(afsk->rxBuf));
@ -263,8 +265,12 @@ static bool hdlcParse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo) {
// If we have not yet seen a HDLC_FLAG indicating that
// a transmission is actually taking place, don't bother
// with anything.
if (!hdlc->receiving)
if (!hdlc->receiving) {
hdlc->dcd = false;
hdlc->dcd_count = 0;
return ret;
}
// First check if what we are seeing is a stuffed bit.
// Since the different HDLC control characters like
@ -312,6 +318,8 @@ static bool hdlcParse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo) {
} else {
// If it is, abort and return false
hdlc->receiving = false;
hdlc->dcd = false;
hdlc->dcd_count = 0;
LED_RX_OFF();
ret = false;
}
@ -324,6 +332,8 @@ static bool hdlcParse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo) {
} else {
// If it is, well, you know by now!
hdlc->receiving = false;
hdlc->dcd = false;
hdlc->dcd_count = 0;
LED_RX_OFF();
ret = false;
}
@ -338,7 +348,6 @@ static bool hdlcParse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo) {
hdlc->currentByte >>= 1;
}
//digitalWrite(13, LOW);
return ret;
}
@ -444,6 +453,9 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
} else {
afsk->currentPhase -= PHASE_INC;
}
afsk->silentSamples = 0;
} else {
afsk->silentSamples++;
}
// We increment our phase counter
@ -513,6 +525,12 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
}
}
if (afsk->silentSamples > DCD_TIMEOUT_SAMPLES) {
afsk->silentSamples = 0;
afsk->hdlc.dcd = false;
LED_RX_OFF();
}
}

View file

@ -53,6 +53,7 @@ inline static uint8_t sinSample(uint16_t i) {
#define PHASE_INC 1 // Nudge by an eigth of a sample each adjustment
#define DCD_MIN_COUNT 6
#define DCD_TIMEOUT_SAMPLES 96
#if BITRATE == 960
#define FILTER_CUTOFF 600
@ -107,6 +108,8 @@ typedef struct Afsk
uint16_t phaseAcc; // Phase accumulator
uint16_t phaseInc; // Phase increment per sample
uint8_t silentSamples; // How many samples were completely silent
FIFOBuffer txFifo; // FIFO for transmit data
uint8_t txBuf[CONFIG_AFSK_TX_BUFLEN]; // Actual data storage for said FIFO