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Indentation mess cleanup
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Mark Qvist
parent
c7ff5cc5f1
commit
80459cbbd3
6 changed files with 1077 additions and 1077 deletions
226
Modem/hardware.c
226
Modem/hardware.c
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@ -3,12 +3,12 @@
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//////////////////////////////////////////////////////
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#include "hardware.h" // We need the header for this code
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#include "afsk.h" // We also need to know about the AFSK modem
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#include "afsk.h" // We also need to know about the AFSK modem
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#include <cpu/irq.h> // Interrupt functions from BertOS
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#include <cpu/irq.h> // Interrupt functions from BertOS
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#include <avr/io.h> // AVR IO functions from BertOS
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#include <avr/interrupt.h> // AVR interrupt functions from BertOS
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#include <avr/io.h> // AVR IO functions from BertOS
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#include <avr/interrupt.h> // AVR interrupt functions from BertOS
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// A reference to our modem "object"
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static Afsk *modem;
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@ -25,80 +25,80 @@ static Afsk *modem;
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// it the way we need.
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void hw_afsk_adcInit(int ch, Afsk *_modem)
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{
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// Store a reference to our modem "object"
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modem = _modem;
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// Store a reference to our modem "object"
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modem = _modem;
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// Also make sure that we are not trying to use
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// a pin that can't be used for analog input
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ASSERT(ch <= 5);
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// Also make sure that we are not trying to use
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// a pin that can't be used for analog input
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ASSERT(ch <= 5);
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// We need a timer to control how often our sampling functions
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// should run. To do this we will need to change some registers.
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// First we do some configuration on the Timer/Counter Control
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// Register 1, aka Timer1.
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//
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// The following bits are set:
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// CS10: ClockSource 10, sets no prescaler on the clock,
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// meaning it will run at the same speed as the CPU, ie 16MHz
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// WGM13 and WGM12 together enables "Timer Mode 12", which
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// is Clear Timer on Compare, compare set to TOP, and the
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// source for the TOP value is ICR1 (Input Capture Register1).
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// TOP means that we specify a maximum value for the timer, and
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// once that value is reached, an interrupt will be triggered.
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// The timer will then start from zero again. As just noted,
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// the place we specify this value is in the ICR1 register.
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TCCR1A = 0;
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TCCR1B = BV(CS10) | BV(WGM13) | BV(WGM12);
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// We need a timer to control how often our sampling functions
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// should run. To do this we will need to change some registers.
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// First we do some configuration on the Timer/Counter Control
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// Register 1, aka Timer1.
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//
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// The following bits are set:
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// CS10: ClockSource 10, sets no prescaler on the clock,
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// meaning it will run at the same speed as the CPU, ie 16MHz
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// WGM13 and WGM12 together enables "Timer Mode 12", which
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// is Clear Timer on Compare, compare set to TOP, and the
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// source for the TOP value is ICR1 (Input Capture Register1).
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// TOP means that we specify a maximum value for the timer, and
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// once that value is reached, an interrupt will be triggered.
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// The timer will then start from zero again. As just noted,
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// the place we specify this value is in the ICR1 register.
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TCCR1A = 0;
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TCCR1B = BV(CS10) | BV(WGM13) | BV(WGM12);
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// We now set the ICR1 register to what count value we want to
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// reset (and thus trigger the interrupt) at.
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// Since the timer is running at 16MHz, the counter will be
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// incremented 16 million times each second, and we want the
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// interrupt to trigger 9600 times each second. The formula for
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// calculating the value of ICR1 (the TOP value) is:
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// (CPUClock / Prescaler) / desired frequency - 1
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// So that's what well put in this register to set up our
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// 9.6KHz sampling rate. Note that we can also specify a clock
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// correction to this calculation. If you measure your processors
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// actual clock speed to 16.095MHz, define FREQUENCY_CORRECTION
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// as 9500, and the actual sampling (and this modulation and
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// demodulation) will be much closer to an actual 9600 Hz.
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// No crystals are perfect though, and will also drift with
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// temperature variations, but if you have a board with a
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// crystal that is way off frequency, this can help alot.
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ICR1 = (((CPU_FREQ+FREQUENCY_CORRECTION)) / 9600) - 1;
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// We now set the ICR1 register to what count value we want to
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// reset (and thus trigger the interrupt) at.
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// Since the timer is running at 16MHz, the counter will be
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// incremented 16 million times each second, and we want the
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// interrupt to trigger 9600 times each second. The formula for
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// calculating the value of ICR1 (the TOP value) is:
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// (CPUClock / Prescaler) / desired frequency - 1
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// So that's what well put in this register to set up our
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// 9.6KHz sampling rate. Note that we can also specify a clock
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// correction to this calculation. If you measure your processors
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// actual clock speed to 16.095MHz, define FREQUENCY_CORRECTION
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// as 9500, and the actual sampling (and this modulation and
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// demodulation) will be much closer to an actual 9600 Hz.
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// No crystals are perfect though, and will also drift with
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// temperature variations, but if you have a board with a
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// crystal that is way off frequency, this can help alot.
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ICR1 = (((CPU_FREQ+FREQUENCY_CORRECTION)) / 9600) - 1;
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// Set reference to AVCC (5V), select pin
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// Set the ADMUX register. The first part (BV(REFS0)) sets
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// the reference voltage to VCC (5V), and the next selects
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// the ADC channel (basically what pin we are capturing on)
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ADMUX = BV(REFS0) | ch;
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// Set reference to AVCC (5V), select pin
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// Set the ADMUX register. The first part (BV(REFS0)) sets
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// the reference voltage to VCC (5V), and the next selects
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// the ADC channel (basically what pin we are capturing on)
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ADMUX = BV(REFS0) | ch;
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DDRC &= ~BV(ch); // Set the selected channel (pin) to input
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PORTC &= ~BV(ch); // Initialize the selected pin to LOW
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DIDR0 |= BV(ch); // Disable the Digital Input Buffer on selected pin
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DDRC &= ~BV(ch); // Set the selected channel (pin) to input
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PORTC &= ~BV(ch); // Initialize the selected pin to LOW
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DIDR0 |= BV(ch); // Disable the Digital Input Buffer on selected pin
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// Now a little more configuration to get the ADC working
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// the way we want
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ADCSRB = BV(ADTS2) | // Setting these three on (1-1-1) sets the ADC to
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BV(ADTS1) | // "Timer1 capture event". That means we can declare
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BV(ADTS0); // an ISR in the ADC Vector, that will then get called
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// everytime the ADC has a sample ready, which will
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// happen at the 9.6Khz sampling rate we set up earlier
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ADCSRA = BV(ADEN) | // ADC Enable - Yes, we need to turn it on :)
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BV(ADSC) | // ADC Start Converting - Tell it to start doing conversions
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BV(ADATE) | // Enable autotriggering - Enables the autotrigger on complete
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BV(ADIE) | // ADC Interrupt enable - Enables an interrupt to be called
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BV(ADPS2); // Enable prescaler flag 2 (1-0-0 = division by 16 = 1MHz)
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// This sets the ADC to run at 1MHz. This is out of spec,
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// Since it's normal operating range is only up to 200KHz.
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// But don't worry, it's not dangerous! I promise it wont
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// blow up :) There is a downside to running at this speed
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// though, hence the "out of spec", which is that we get
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// a much lower resolution on the output. In this case,
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// it's not a problem though, since we don't need the full
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// 10-bit resolution, so we'll take fast and less precise!
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// Now a little more configuration to get the ADC working
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// the way we want
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ADCSRB = BV(ADTS2) | // Setting these three on (1-1-1) sets the ADC to
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BV(ADTS1) | // "Timer1 capture event". That means we can declare
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BV(ADTS0); // an ISR in the ADC Vector, that will then get called
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// everytime the ADC has a sample ready, which will
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// happen at the 9.6Khz sampling rate we set up earlier
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ADCSRA = BV(ADEN) | // ADC Enable - Yes, we need to turn it on :)
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BV(ADSC) | // ADC Start Converting - Tell it to start doing conversions
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BV(ADATE)| // Enable autotriggering - Enables the autotrigger on complete
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BV(ADIE) | // ADC Interrupt enable - Enables an interrupt to be called
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BV(ADPS2); // Enable prescaler flag 2 (1-0-0 = division by 16 = 1MHz)
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// This sets the ADC to run at 1MHz. This is out of spec,
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// Since it's normal operating range is only up to 200KHz.
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// But don't worry, it's not dangerous! I promise it wont
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// blow up :) There is a downside to running at this speed
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// though, hence the "out of spec", which is that we get
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// a much lower resolution on the output. In this case,
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// it's not a problem though, since we don't need the full
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// 10-bit resolution, so we'll take fast and less precise!
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}
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@ -114,52 +114,52 @@ void hw_afsk_adcInit(int ch, Afsk *_modem)
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bool hw_ptt_on;
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bool hw_afsk_dac_isr;
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DECLARE_ISR(ADC_vect) {
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TIFR1 = BV(ICF1);
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TIFR1 = BV(ICF1);
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// Call the routine for analysing the captured sample
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// Notice that we read the ADC sample, and then bitshift
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// by two places to the right, effectively eliminating
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// two bits of precision. But we didn't have those
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// anyway, because the ADC is running at high speed.
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// We then subtract 128 from the value, to get the
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// representation to match an AC waveform. We need to
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// do this because the AC waveform (from the audio input)
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// is biased by +2.5V, which is nessecary, since the ADC
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// can't read negative voltages. By doing this simple
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// math, we bring it back to an AC representation
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// we can do further calculations on.
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afsk_adc_isr(modem, ((int16_t)((ADC) >> 2) - 128));
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// Call the routine for analysing the captured sample
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// Notice that we read the ADC sample, and then bitshift
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// by two places to the right, effectively eliminating
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// two bits of precision. But we didn't have those
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// anyway, because the ADC is running at high speed.
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// We then subtract 128 from the value, to get the
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// representation to match an AC waveform. We need to
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// do this because the AC waveform (from the audio input)
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// is biased by +2.5V, which is nessecary, since the ADC
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// can't read negative voltages. By doing this simple
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// math, we bring it back to an AC representation
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// we can do further calculations on.
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afsk_adc_isr(modem, ((int16_t)((ADC) >> 2) - 128));
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// We also need to check if we're supposed to spit
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// out some modulated data to the DAC.
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if (hw_afsk_dac_isr) {
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// If there is, it's easy to actually do so. We
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// calculate what the sample should be in the
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// DAC ISR, and apply the bitmask 11110000. This
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// simoultaneously spits out our 4-bit digital
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// sample to the four pins connected to our DAC
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// circuit, which then converts it to an analog
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// waveform. The reason for the " | BV(3)" is that
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// we also need to trigger another pin controlled
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// by the PORTD register. This is the PTT pin
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// which tells the radio to open it transmitter.
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PORTD = (afsk_dac_isr(modem) & 0xF0) | BV(3);
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} else {
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// If we're not supposed to transmit anything, we
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// keep quiet by continously sending 128, which
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// when converted to an AC waveform by the DAC,
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// equates to a steady, unchanging 0 volts.
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if (hw_ptt_on) {
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PORTD = 136;
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} else {
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PORTD = 128;
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}
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}
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// We also need to check if we're supposed to spit
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// out some modulated data to the DAC.
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if (hw_afsk_dac_isr) {
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// If there is, it's easy to actually do so. We
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// calculate what the sample should be in the
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// DAC ISR, and apply the bitmask 11110000. This
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// simoultaneously spits out our 4-bit digital
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// sample to the four pins connected to our DAC
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// circuit, which then converts it to an analog
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// waveform. The reason for the " | BV(3)" is that
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// we also need to trigger another pin controlled
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// by the PORTD register. This is the PTT pin
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// which tells the radio to open it transmitter.
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PORTD = (afsk_dac_isr(modem) & 0xF0) | BV(3);
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} else {
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// If we're not supposed to transmit anything, we
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// keep quiet by continously sending 128, which
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// when converted to an AC waveform by the DAC,
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// equates to a steady, unchanging 0 volts.
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if (hw_ptt_on) {
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PORTD = 136;
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} else {
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PORTD = 128;
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}
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}
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}
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// * "finally" is probably the wrong description here.
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// (*) "finally" is probably the wrong description here.
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// "All the f'ing time" is probably more accurate :)
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// but it felt like it was a long way down here,
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// writing all the explanations. I think this is a
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