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12
Modem/afsk.c
12
Modem/afsk.c
@ -20,8 +20,8 @@
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#define PHASE_BIT 8
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#define PHASE_BIT 8
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#define PHASE_INC 1
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#define PHASE_INC 1
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#define PHASE_MAX (SAMPLEPERBIT * PHASE_BIT)
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#define PHASE_MAX (SAMPLESPERBIT * PHASE_BIT)
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#define PHASE_THRES (PHASE_MAX / 2) // - PHASE_BIT / 2)
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#define PHASE_THRES (PHASE_MAX / 2)
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// Modulator constants
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// Modulator constants
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#define MARK_FREQ 1200
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#define MARK_FREQ 1200
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@ -32,7 +32,7 @@
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//Ensure sample rate is a multiple of bit rate
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//Ensure sample rate is a multiple of bit rate
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STATIC_ASSERT(!(CONFIG_AFSK_DAC_SAMPLERATE % BITRATE));
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STATIC_ASSERT(!(CONFIG_AFSK_DAC_SAMPLERATE % BITRATE));
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#define DAC_SAMPLEPERBIT (CONFIG_AFSK_DAC_SAMPLERATE / BITRATE)
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#define DAC_SAMPLESPERBIT (CONFIG_AFSK_DAC_SAMPLERATE / BITRATE)
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/**
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/**
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* Sine table for the first quarter of wave.
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* Sine table for the first quarter of wave.
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@ -252,7 +252,7 @@ void afsk_adc_isr(Afsk *af, int8_t curr_sample)
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* otherwise is a 0.
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* otherwise is a 0.
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* This algorithm presumes that there are 8 samples per bit.
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* This algorithm presumes that there are 8 samples per bit.
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*/
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*/
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STATIC_ASSERT(SAMPLEPERBIT == 8);
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STATIC_ASSERT(SAMPLESPERBIT == 8);
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uint8_t bits = af->sampled_bits & 0x07;
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uint8_t bits = af->sampled_bits & 0x07;
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if (bits == 0x07 // 111, 3 bits set to 1
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if (bits == 0x07 // 111, 3 bits set to 1
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|| bits == 0x06 // 110, 2 bits
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|| bits == 0x06 // 110, 2 bits
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@ -405,7 +405,7 @@ uint8_t afsk_dac_isr(Afsk *af)
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/* Go to the next bit */
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/* Go to the next bit */
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af->tx_bit <<= 1;
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af->tx_bit <<= 1;
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}
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}
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af->sample_count = DAC_SAMPLEPERBIT;
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af->sample_count = DAC_SAMPLESPERBIT;
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}
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}
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/* Get new sample and put it out on the DAC */
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/* Get new sample and put it out on the DAC */
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@ -508,7 +508,7 @@ void afsk_init(Afsk *af, int adc_ch, int dac_ch)
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fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf));
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fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf));
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/* Fill sample FIFO with 0 */
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/* Fill sample FIFO with 0 */
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for (int i = 0; i < SAMPLEPERBIT / 2; i++)
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for (int i = 0; i < SAMPLESPERBIT / 2; i++)
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fifo_push(&af->delay_fifo, 0);
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fifo_push(&af->delay_fifo, 0);
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fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf));
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fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf));
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@ -12,7 +12,7 @@
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#define SAMPLERATE 9600
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#define SAMPLERATE 9600
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#define BITRATE 1200
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#define BITRATE 1200
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#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
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#define SAMPLESPERBIT (SAMPLERATE / BITRATE)
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typedef struct Hdlc
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typedef struct Hdlc
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{
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{
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@ -37,7 +37,7 @@ typedef struct Afsk
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uint16_t phase_acc;
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uint16_t phase_acc;
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uint16_t phase_inc;
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uint16_t phase_inc;
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FIFOBuffer delay_fifo;
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FIFOBuffer delay_fifo;
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int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
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int8_t delay_buf[SAMPLESPERBIT / 2 + 1];
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FIFOBuffer rx_fifo;
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FIFOBuffer rx_fifo;
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uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
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uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
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FIFOBuffer tx_fifo;
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FIFOBuffer tx_fifo;
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@ -54,7 +54,7 @@ typedef struct Afsk
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uint16_t trailer_len;
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uint16_t trailer_len;
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} Afsk;
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} Afsk;
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#define KFT_AFSK MAKE_ID('A', 'F', 'S', 'K')
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#define KFT_AFSK MAKE_ID('F', 'S', 'K', 'M')
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INLINE Afsk *AFSK_CAST(KFile *fd)
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INLINE Afsk *AFSK_CAST(KFile *fd)
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{
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{
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@ -10,13 +10,12 @@ struct Afsk;
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void hw_afsk_adcInit(int ch, struct Afsk *_ctx);
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void hw_afsk_adcInit(int ch, struct Afsk *_ctx);
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void hw_afsk_dacInit(int ch, struct Afsk *_ctx);
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void hw_afsk_dacInit(int ch, struct Afsk *_ctx);
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// ADC initialization
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#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx)
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#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx)
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// LED on/off (pin 13)
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#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0)
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#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0)
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#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0)
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#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0)
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#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0)
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#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0)
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// Initialization, start and stop for DAC
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// Initialization, start and stop for DAC
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@ -30,7 +30,7 @@ static void init(void)
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int main(void)
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int main(void)
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{
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{
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init();
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init();
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ticks_t start = timer_clock();
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//ticks_t start = timer_clock();
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while (1)
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while (1)
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{
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{
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@ -1,2 +1,2 @@
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#define VERS_BUILD 30
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#define VERS_BUILD 38
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#define VERS_HOST "vixen"
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#define VERS_HOST "vixen"
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