mirror of
https://github.com/markqvist/OpenModem.git
synced 2024-12-29 01:16:17 -05:00
Removed stuff
This commit is contained in:
Mark Qvist
parent
268d592c22
commit
6b6042462c
@ -1,11 +1,8 @@
|
||||
#include "afsk.h"
|
||||
//#include <net/ax25.h>
|
||||
|
||||
#include "config.h"
|
||||
#include "hardware.h"
|
||||
|
||||
#include <drv/timer.h>
|
||||
|
||||
#include <cfg/module.h>
|
||||
|
||||
#define HDLC_FLAG 0x7E
|
||||
|
||||
107
Modem/afsk.h
107
Modem/afsk.h
@ -12,27 +12,10 @@
|
||||
#include <struct/fifobuf.h>
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* ADC sample rate.
|
||||
* The demodulator filters are designed to work at this frequency.
|
||||
* If you need to change this remember to update afsk_adc_isr().
|
||||
*/
|
||||
#define SAMPLERATE 9600
|
||||
|
||||
/**
|
||||
* Bitrate of the received/transmitted data.
|
||||
* The demodulator filters and decoderes are designed to work at this frequency.
|
||||
* If you need to change this remember to update afsk_adc_isr().
|
||||
*/
|
||||
#define BITRATE 1200
|
||||
|
||||
#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
|
||||
|
||||
/**
|
||||
* HDLC (High-Level Data Link Control) context.
|
||||
* Maybe to be moved in a separate HDLC module one day.
|
||||
*/
|
||||
typedef struct Hdlc
|
||||
{
|
||||
uint8_t demod_bits; ///< Bitstream from the demodulator.
|
||||
@ -41,117 +24,35 @@ typedef struct Hdlc
|
||||
bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream.
|
||||
} Hdlc;
|
||||
|
||||
/**
|
||||
* RX FIFO buffer full error.
|
||||
*/
|
||||
#define AFSK_RXFIFO_OVERRUN BV(0)
|
||||
|
||||
/**
|
||||
* AFSK1200 modem context.
|
||||
*/
|
||||
typedef struct Afsk
|
||||
{
|
||||
/** Base "class" */
|
||||
KFile fd;
|
||||
|
||||
/** ADC channel to be used by the demodulator */
|
||||
int adc_ch;
|
||||
|
||||
/** DAC channel to be used by the modulator */
|
||||
int dac_ch;
|
||||
|
||||
/** Current sample of bit for output data. */
|
||||
uint8_t sample_count;
|
||||
|
||||
/** Current character to be modulated */
|
||||
uint8_t curr_out;
|
||||
|
||||
/** Mask of current modulated bit */
|
||||
uint8_t tx_bit;
|
||||
|
||||
/** True if bit stuff is allowed, false otherwise */
|
||||
bool bit_stuff;
|
||||
|
||||
/** Counter for bit stuffing */
|
||||
uint8_t stuff_cnt;
|
||||
/**
|
||||
* DDS phase accumulator for generating modulated data.
|
||||
*/
|
||||
uint16_t phase_acc;
|
||||
|
||||
/** Current phase increment for current modulated bit */
|
||||
uint16_t phase_inc;
|
||||
|
||||
/** Delay line used to delay samples by (SAMPLEPERBIT / 2) */
|
||||
FIFOBuffer delay_fifo;
|
||||
|
||||
/**
|
||||
* Buffer for delay FIFO.
|
||||
* The 1 is added because the FIFO macros need
|
||||
* 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long.
|
||||
*/
|
||||
int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
|
||||
|
||||
/** FIFO for received data */
|
||||
FIFOBuffer rx_fifo;
|
||||
|
||||
/** FIFO rx buffer */
|
||||
uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
|
||||
|
||||
/** FIFO for transmitted data */
|
||||
FIFOBuffer tx_fifo;
|
||||
|
||||
/** FIFO tx buffer */
|
||||
uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
|
||||
|
||||
/** IIR filter X cells, used to filter sampled data by the demodulator */
|
||||
int16_t iir_x[2];
|
||||
|
||||
/** IIR filter Y cells, used to filter sampled data by the demodulator */
|
||||
int16_t iir_y[2];
|
||||
|
||||
/**
|
||||
* Bits sampled by the demodulator are here.
|
||||
* Since ADC samplerate is higher than the bitrate, the bits here are
|
||||
* SAMPLEPERBIT times the bitrate.
|
||||
*/
|
||||
uint8_t sampled_bits;
|
||||
|
||||
/**
|
||||
* Current phase, needed to know when the bitstream at ADC speed
|
||||
* should be sampled.
|
||||
*/
|
||||
int8_t curr_phase;
|
||||
|
||||
/** Bits found by the demodulator at the correct bitrate speed. */
|
||||
uint8_t found_bits;
|
||||
|
||||
/** True while modem sends data */
|
||||
volatile bool sending;
|
||||
|
||||
/**
|
||||
* AFSK modem status.
|
||||
* If 0 all is ok, otherwise errors are present.
|
||||
*/
|
||||
volatile int status;
|
||||
|
||||
/** Hdlc context */
|
||||
Hdlc hdlc;
|
||||
|
||||
/**
|
||||
* Preamble length.
|
||||
* When the AFSK modem wants to send data, before sending the actual data,
|
||||
* shifts out preamble_len HDLC_FLAG characters.
|
||||
* This helps to synchronize the demodulator filters on the receiver side.
|
||||
*/
|
||||
uint16_t preamble_len;
|
||||
|
||||
/**
|
||||
* Trailer length.
|
||||
* After sending the actual data, the AFSK shifts out
|
||||
* trailer_len HDLC_FLAG characters.
|
||||
* This helps to synchronize the demodulator filters on the receiver side.
|
||||
*/
|
||||
uint16_t trailer_len;
|
||||
} Afsk;
|
||||
|
||||
@ -169,17 +70,11 @@ uint8_t afsk_dac_isr(Afsk *af);
|
||||
void afsk_init(Afsk *af, int adc_ch, int dac_ch);
|
||||
|
||||
|
||||
/**
|
||||
* \name Afsk filter types.
|
||||
* $WIZ$ afsk_filter_list = "AFSK_BUTTERWORTH", "AFSK_CHEBYSHEV"
|
||||
* \{
|
||||
*/
|
||||
#define AFSK_BUTTERWORTH 0
|
||||
#define AFSK_CHEBYSHEV 1
|
||||
/* \} */
|
||||
|
||||
int afsk_testSetup(void);
|
||||
int afsk_testRun(void);
|
||||
int afsk_testTearDown(void);
|
||||
|
||||
#endif /* NET_AFSK_H */
|
||||
#endif
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
* $WIZ$ type = "enum"
|
||||
* $WIZ$ value_list = "log_level"
|
||||
*/
|
||||
#define AFSK_LOG_LEVEL LOG_LVL_WARN
|
||||
//#define AFSK_LOG_LEVEL LOG_LVL_WARN
|
||||
|
||||
/**
|
||||
* Module logging format.
|
||||
|
||||
@ -8,10 +8,6 @@
|
||||
#include <avr/interrupt.h>
|
||||
|
||||
|
||||
/*
|
||||
* Here we are using only one modem. If you need to receive
|
||||
* from multiple modems, you need to define an array of contexts.
|
||||
*/
|
||||
static Afsk *ctx;
|
||||
|
||||
void hw_afsk_adcInit(int ch, Afsk *_ctx)
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
|
||||
#ifndef HW_AFSK_H
|
||||
#define HW_AFSK_H
|
||||
#ifndef FSK_MODEM_HW
|
||||
#define FSK_MODEM_HW
|
||||
|
||||
#include "cfg/cfg_arch.h"
|
||||
|
||||
@ -10,64 +10,18 @@ struct Afsk;
|
||||
void hw_afsk_adcInit(int ch, struct Afsk *_ctx);
|
||||
void hw_afsk_dacInit(int ch, struct Afsk *_ctx);
|
||||
|
||||
/**
|
||||
* Initialize the specified channel of the ADC for AFSK needs.
|
||||
* The adc should be configured to have a continuos stream of convertions.
|
||||
* For every convertion there must be an ISR that read the sample
|
||||
* and call afsk_adc_isr(), passing the context and the sample.
|
||||
*
|
||||
* \param ch channel to be used for AFSK demodulation.
|
||||
* \param ctx AFSK context (\see Afsk). This parameter must be saved and
|
||||
* passed back to afsk_adc_isr() for every convertion.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This macro will be called for AFSK initialization. We could implement everything here as a macro,
|
||||
* but since initialization is rather complicated we decided to split its own function. Such function
|
||||
* is defined in hw_afsk.c.
|
||||
* Remember: since this .c file is not created by the wizard, you must add it to your_project_name.mk.
|
||||
* If you create the file using BeRTOS SDK, it will be added for you.
|
||||
*/
|
||||
#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx)
|
||||
|
||||
/*
|
||||
* Activate strobe pin. We use it for debugging purposes. If you don't use it, simply
|
||||
* leave empty the following macros
|
||||
*/
|
||||
#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0)
|
||||
|
||||
/*
|
||||
* Set the pin high. This macro is called at the beginning of the interrupt routine
|
||||
*/
|
||||
#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0)
|
||||
|
||||
/*
|
||||
* Set the pin low. This macro is called at the end of the interrupt routine
|
||||
*/
|
||||
#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0)
|
||||
|
||||
/**
|
||||
* Initialize the specified channel of the DAC for AFSK needs.
|
||||
* The DAC has to be configured in order to call an ISR for every sample sent.
|
||||
* The DAC doesn't have to start the IRQ immediatly but have to wait
|
||||
* the AFSK driver to call AFSK_DAC_IRQ_START().
|
||||
* The ISR must then call afsk_dac_isr() passing the AFSK context.
|
||||
* \param ch DAC channel to be used for AFSK modulation.
|
||||
* \param ctx AFSK context (\see Afsk). This parameter must be saved and
|
||||
* passed back to afsk_dac_isr() for every convertion.
|
||||
*/
|
||||
// Initialization, start and stop for DAC
|
||||
#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; DDRD |= 0xF0; DDRB |= BV(3); } while (0)
|
||||
|
||||
/**
|
||||
* Start DAC convertions on channel \a ch.
|
||||
* \param ch DAC channel.
|
||||
*/
|
||||
#define AFSK_DAC_IRQ_START(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB |= BV(3); hw_afsk_dac_isr = true; } while (0)
|
||||
|
||||
/**
|
||||
* Stop DAC convertions on channel \a ch.
|
||||
* \param ch DAC channel.
|
||||
*/
|
||||
#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB &= ~BV(3); hw_afsk_dac_isr = false; } while (0)
|
||||
|
||||
#endif /* HW_AFSK_H */
|
||||
#endif
|
||||
|
||||
@ -1,2 +1,2 @@
|
||||
#define VERS_BUILD 6
|
||||
#define VERS_BUILD 10
|
||||
#define VERS_HOST "vixen"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user