Git-Mirrors/OpenModem
1
0
Fork 0
mirror of https://github.com/markqvist/OpenModem.git synced 2024-10-01 03:15:46 -04:00
Code Issues Actions Packages Projects Releases Wiki Activity

Filters reworked for new samplerate

Browse Source
This commit is contained in:
Mark Qvist 2018-12-30 00:32:19 +01:00
parent 74e0b0d1db
commit 56bed68143
4 changed files with 69 additions and 57 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
device.h
View File

@ -14,8 +14,6 @@
// Sampling & timer setup
#define CONFIG_SAMPLERATE 19200UL
//#define CONFIG_SAMPLERATE 19200UL
//#define CONFIG_SAMPLERATE 9600
// Serial settings
#define BAUD 115200
@ -25,6 +23,9 @@
// CSMA Settings
#define CONFIG_CSMA_P 255
// Packet settings
#define CONFIG_PASSALL false
// Port settings
#if TARGET_CPU == m1284p
#define ADC_PORT PORTA

90
hardware/AFSK.c
View File

@ -375,54 +375,53 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
afsk->iirX[0] = afsk->iirX[1];
#if FILTER_CUTOFF == 600
afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) >> 2;
// The above is a simplification of:
// afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / 3.558147322;
#elif FILTER_CUTOFF == 800
afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) >> 2;
// The above is a simplification of:
// afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / 2.899043379;
#elif FILTER_CUTOFF == 1200
afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) >> 1;
// The above is a simplification of:
// afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / 2.228465666;
#elif FILTER_CUTOFF == 1600
afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) >> 1;
// The above is a simplification of:
// afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / 1.881349100;
#if CONFIG_SAMPLERATE == 9600
#if FILTER_CUTOFF == 600
afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) >> 2;
// The above is a simplification of:
// afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / 3.558147322;
#else
#error Unsupported filter cutoff!
#endif
#elif CONFIG_SAMPLERATE == 19200
#if FILTER_CUTOFF == 600
afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / 6;
#else
#error Unsupported filter cutoff!
#endif
#else
#error Unsupported filter cutoff!
#error Unsupported samplerate!
#endif
afsk->iirY[0] = afsk->iirY[1];
#if FILTER_CUTOFF == 600
afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] >> 1);
// The above is a simplification of a first-order 600Hz chebyshev filter:
// afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] * 0.4379097269);
#elif FILTER_CUTOFF == 800
afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] / 3);
// The above is a simplification of a first-order 800Hz chebyshev filter:
// afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] * 0.3101172565);
#elif FILTER_CUTOFF == 1200
afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] / 10);
// The above is a simplification of a first-order 1200Hz chebyshev filter:
// afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] * 0.1025215106);
#elif FILTER_CUTOFF == 1600
afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + -1*(afsk->iirY[0] / 17);
// The above is a simplification of a first-order 1600Hz chebyshev filter:
// afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] * -0.0630669239);
#if CONFIG_SAMPLERATE == 9600
#if FILTER_CUTOFF == 600
afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] >> 1);
// The above is a simplification of:
// afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] * 0.4379097269);
#else
#error Unsupported filter cutoff!
#endif
#elif CONFIG_SAMPLERATE == 19200
#if FILTER_CUTOFF == 600
afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] / 2);
#else
#error Unsupported filter cutoff!
#endif
#else
#error Unsupported filter cutoff!
#error Unsupported samplerate!
#endif
//int8_t freq_disc = (int8_t)fifo_pop(&afsk->delayFifo) * currentSample;
// We put the sampled bit in a delay-line:
// First we bitshift everything 1 left
afsk->sampledBits <<= 1;
// And then add the sampled bit to our delay line
afsk->sampledBits |= (afsk->iirY[1] > 0) ? 0 : 1;
//afsk->sampledBits |= (freq_disc > 0) ? 0 : 1;
// Put the current raw sample in the delay FIFO
fifo_push(&afsk->delayFifo, currentSample);
@ -489,6 +488,7 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
// the last 3 sampled bits. If there is two or
// more 1's, we will assume that the transmitter
// sent us a one, otherwise we assume a zero
uint8_t bits = afsk->sampledBits & 0x07;
if (bits == 0x07 || // 111
bits == 0x06 || // 110
@ -498,15 +498,17 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
afsk->actualBits |= 1;
}
//// Alternative using five bits ////////////////
// uint8_t bits = afsk->sampledBits & 0x0f;
// uint8_t c = 0;
// c += bits & BV(1);
// c += bits & BV(2);
// c += bits & BV(3);
// c += bits & BV(4);
// c += bits & BV(5);
// if (c >= 3) afsk->actualBits |= 1;
//// Alternative using six bits ////////////////
// uint8_t bits = afsk->sampledBits & 0x3F;
// uint8_t c = 0;
// c += bits & _BV(0);
// c += bits & _BV(1);
// c += bits & _BV(2);
// c += bits & _BV(3);
// c += bits & _BV(4);
// c += bits & _BV(5);
// if (c >= 3) afsk->actualBits |= 1;
/////////////////////////////////////////////////
// Now we can pass the actual bit to the HDLC parser.

29
hardware/AFSK.h
View File

@ -35,9 +35,11 @@ inline static uint8_t sinSample(uint16_t i) {
#define BITS_DIFFER(bits1, bits2) (((bits1)^(bits2)) & 0x01)
#define TRANSITION_FOUND(bits) BITS_DIFFER((bits), (bits) >> 1)
// TODO: Maybe expand number of bits looked at here:
// TODO: Maybe revert to only looking at two samples
#define DUAL_XOR(bits1, bits2) ((((bits1)^(bits2)) & 0x03) == 0x03)
#define SIGNAL_TRANSITIONED(bits) DUAL_XOR((bits), (bits) >> 2)
#define QUAD_XOR(bits1, bits2) ((((bits1)^(bits2)) & 0x0F) == 0x0F)
#define SIGNAL_TRANSITIONED(bits) QUAD_XOR((bits), (bits) >> 4)
// #define SIGNAL_TRANSITIONED(bits) DUAL_XOR((bits), (bits) >> 2)
#define CPU_FREQ F_CPU
@ -53,16 +55,19 @@ inline static uint8_t sinSample(uint16_t i) {
#define SAMPLESPERBIT (CONFIG_SAMPLERATE / BITRATE)
#define TICKS_BETWEEN_SAMPLES ((((CPU_FREQ+FREQUENCY_CORRECTION)) / CONFIG_SAMPLERATE) - 1)
// TODO: Calculate based on sample rate
#define PHASE_INC SAMPLESPERBIT/8 // Nudge by an eigth of a sample each adjustment
#define PHASE_BITS 8 // How much to increment phase counter each sample
// TODO: Calculate based on sample rate [Done?]
#define PHASE_BITS 8 // 8 // Sub-sample phase counter resolution
#define PHASE_INC 1 // 1 // Nudge by above resolution for each adjustment
#define PHASE_MAX (SAMPLESPERBIT * PHASE_BITS) // Resolution of our phase counter
#define PHASE_THRESHOLD (PHASE_MAX / 2) // Target transition point of our phase window
#define PHASE_MAX (SAMPLESPERBIT * PHASE_BITS) // 128 // Size of our phase counter
// TODO: Test which target is best in real world
#define PHASE_THRESHOLD (PHASE_MAX / 2)+3*PHASE_BITS // Target transition point of our phase window
//#define PHASE_THRESHOLD (PHASE_MAX / 2) // 64 // Target transition point of our phase window
#define DCD_TIMEOUT_SAMPLES CONFIG_SAMPLERATE/100
#define DCD_MIN_COUNT CONFIG_SAMPLERATE/1600
// TODO: Revamp filtering
#if BITRATE == 1200
#define FILTER_CUTOFF 600
#define MARK_FREQ 1200
@ -120,8 +125,12 @@ typedef struct Afsk
int16_t iirX[2]; // IIR Filter X cells
int16_t iirY[2]; // IIR Filter Y cells
uint8_t sampledBits; // Bits sampled by the demodulator (at ADC speed)
int8_t currentPhase; // Current phase of the demodulator
#if SAMPLESPERBIT < 17
uint16_t sampledBits; // Bits sampled by the demodulator (at ADC speed)
#else
#error Not enough space in sampledBits variable!
#endif
int16_t currentPhase; // Current phase of the demodulator
uint8_t actualBits; // Actual found bits at correct bitrate
volatile int status; // Status of the modem, 0 means OK

2
protocol/AX25.c
View File

@ -31,7 +31,7 @@ void ax25_poll(AX25Ctx *ctx) {
while ((c = fgetc(ctx->ch)) != EOF) {
if (!ctx->escape && c == HDLC_FLAG) {
if (ctx->frame_len >= AX25_MIN_FRAME_LEN) {
if (ctx->crc_in == AX25_CRC_CORRECT) {
if (ctx->crc_in == AX25_CRC_CORRECT || CONFIG_PASSALL) {
#if OPEN_SQUELCH == true
LED_RX_ON();
#endif