Preamble timing

This commit is contained in:
Mark Qvist 2014-04-07 13:57:32 +02:00
parent 0a1c0716ed
commit 13873775e8
2 changed files with 11 additions and 1 deletions

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@ -353,6 +353,8 @@ void afsk_adc_isr(Afsk *afsk, int8_t currentSample) {
// the last 3 sampled bits. If there is two or // the last 3 sampled bits. If there is two or
// more 1's, we will assume that the transmitter // more 1's, we will assume that the transmitter
// sent us a one, otherwise we assume a zero // sent us a one, otherwise we assume a zero
// FIXME: Increasing this to 5 bit determine
uint8_t bits = afsk->sampledBits & 0x07; uint8_t bits = afsk->sampledBits & 0x07;
if (bits == 0x07 || // 111 if (bits == 0x07 || // 111
bits == 0x06 || // 110 bits == 0x06 || // 110
@ -361,6 +363,14 @@ void afsk_adc_isr(Afsk *afsk, int8_t currentSample) {
) { ) {
afsk->actualBits |= 1; afsk->actualBits |= 1;
} }
// uint8_t bits = afsk->sampledBits & 0x0f;
// uint8_t c = 0;
// c += bits & BV(1);
// c += bits & BV(2);
// c += bits & BV(3);
// c += bits & BV(4);
// c += bits & BV(5);
// if (c >= 3) afsk->actualBits |= 1;
// Now we can pass the actual bit to the HDLC parser. // Now we can pass the actual bit to the HDLC parser.
// We are using NRZ coding, so if 2 consecutive bits // We are using NRZ coding, so if 2 consecutive bits

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@ -1,2 +1,2 @@
#define VERS_BUILD 444 #define VERS_BUILD 448
#define VERS_HOST "vixen" #define VERS_HOST "vixen"