From 0f5855241796b323b7a71b0c2f02df15b69fbbe1 Mon Sep 17 00:00:00 2001 From: nguyenquangduc2000 Date: Thu, 7 Jul 2016 15:08:14 +0700 Subject: [PATCH] Overclock 1.9Ghz/720Mhz --- arch/arm/boot/dts/qcom/msm8916-gpu.dtsi | 114 ++++++++++++++++++------ arch/arm/boot/dts/qcom/msm8916-moto-common.dtsi | 36 +++++++- arch/arm/boot/dts/qcom/msm8916-regulator.dtsi | 27 +++--- arch/arm/boot/dts/qcom/msm8916.dtsi | 40 +++++++-- drivers/clk/qcom/clock-gcc-8916.c | 35 +++++--- 5 files changed, 195 insertions(+), 57 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msm8916-gpu.dtsi b/arch/arm/boot/dts/qcom/msm8916-gpu.dtsi index 84e183f..d9269d7 100644 --- a/arch/arm/boot/dts/qcom/msm8916-gpu.dtsi +++ b/arch/arm/boot/dts/qcom/msm8916-gpu.dtsi @@ -27,9 +27,8 @@ qcom,chipid = <0x03000600>; - qcom,initial-pwrlevel = <1>; - - /* Idle Timeout */ + qcom,initial-pwrlevel = <8>; + /* Idle Timeout = msec */ qcom,idle-timeout = <80>; qcom,strtstp-sleepwake; @@ -82,30 +81,59 @@ #size-cells = <0>; compatible = "qcom,gpu-pwrlevels"; + qcom,gpu-pwrlevel@0 { + reg = <0>; + qcom,gpu-freq = <720000000>; + qcom,bus-freq = <3>; + }; - qcom,gpu-pwrlevel@0 { - reg = <0>; - qcom,gpu-freq = <400000000>; - qcom,bus-freq = <3>; - }; + qcom,gpu-pwrlevel@1 { + reg = <1>; + qcom,gpu-freq = <650000000>; + qcom,bus-freq = <3>; + }; - qcom,gpu-pwrlevel@1 { - reg = <1>; - qcom,gpu-freq = <310000000>; - qcom,bus-freq = <2>; - }; + qcom,gpu-pwrlevel@2 { + reg = <2>; + qcom,gpu-freq = <550000000>; + qcom,bus-freq = <3>; + }; - qcom,gpu-pwrlevel@2 { - reg = <2>; - qcom,gpu-freq = <200000000>; - qcom,bus-freq = <1>; - }; + qcom,gpu-pwrlevel@3 { + reg = <3>; + qcom,gpu-freq = <475000000>; + qcom,bus-freq = <3>; + }; - qcom,gpu-pwrlevel@3 { - reg = <3>; - qcom,gpu-freq = <19200000>; - qcom,bus-freq = <0>; - }; + qcom,gpu-pwrlevel@4 { + reg = <4>; + qcom,gpu-freq = <400000000>; + qcom,bus-freq = <3>; + }; + + qcom,gpu-pwrlevel@5 { + reg = <5>; + qcom,gpu-freq = <310000000>; + qcom,bus-freq = <2>; + }; + + qcom,gpu-pwrlevel@6 { + reg = <6>; + qcom,gpu-freq = <200000000>; + qcom,bus-freq = <1>; + }; + + qcom,gpu-pwrlevel@7 { + reg = <7>; + qcom,gpu-freq = <100000000>; + qcom,bus-freq = <1>; + }; + + qcom,gpu-pwrlevel@8 { + reg = <8>; + qcom,gpu-freq = <19200000>; + qcom,bus-freq = <0>; + }; }; /* Speed levels */ qcom,gpu-speed-config@2 { @@ -129,24 +157,54 @@ qcom,gpu-pwrlevel@0 { reg = <0>; - qcom,gpu-freq = <465000000>; + qcom,gpu-freq = <720000000>; qcom,bus-freq = <3>; }; qcom,gpu-pwrlevel@1 { reg = <1>; - qcom,gpu-freq = <310000000>; - qcom,bus-freq = <2>; + qcom,gpu-freq = <650000000>; + qcom,bus-freq = <3>; }; qcom,gpu-pwrlevel@2 { reg = <2>; - qcom,gpu-freq = <200000000>; - qcom,bus-freq = <1>; + qcom,gpu-freq = <550000000>; + qcom,bus-freq = <3>; }; qcom,gpu-pwrlevel@3 { reg = <3>; + qcom,gpu-freq = <475000000>; + qcom,bus-freq = <3>; + }; + + qcom,gpu-pwrlevel@4 { + reg = <4>; + qcom,gpu-freq = <400000000>; + qcom,bus-freq = <3>; + }; + + qcom,gpu-pwrlevel@5 { + reg = <5>; + qcom,gpu-freq = <310000000>; + qcom,bus-freq = <2>; + }; + + qcom,gpu-pwrlevel@6 { + reg = <6>; + qcom,gpu-freq = <200000000>; + qcom,bus-freq = <1>; + }; + + qcom,gpu-pwrlevel@7 { + reg = <7>; + qcom,gpu-freq = <100000000>; + qcom,bus-freq = <1>; + }; + + qcom,gpu-pwrlevel@8 { + reg = <8>; qcom,gpu-freq = <19200000>; qcom,bus-freq = <0>; }; diff --git a/arch/arm/boot/dts/qcom/msm8916-moto-common.dtsi b/arch/arm/boot/dts/qcom/msm8916-moto-common.dtsi index 5ef1add..453531d 100644 --- a/arch/arm/boot/dts/qcom/msm8916-moto-common.dtsi +++ b/arch/arm/boot/dts/qcom/msm8916-moto-common.dtsi @@ -30,7 +30,14 @@ 113830 //1094400 kHz 128540 //1152000 kHz 142800 //1209600 kHz - 157750>; //1363200 kHz + 145520 //1248000 kHz + 157750 //1363200 kHz + 160470 //1401600 kHz + 167270 //1497600 kHz + 174070 //1593600 kHz + 180870 //1689600 kHz + 187670 //1785600 kHz + 194570>; //1881600 kHz }; CPU1: cpu@1 { current = < 23670 //200000 kHz @@ -41,7 +48,14 @@ 113830 //1094400 kHz 128540 //1152000 kHz 142800 //1209600 kHz - 157750>; //1363200 kHz + 145520 //1248000 kHz + 157750 //1363200 kHz + 160470 //1401600 kHz + 167270 //1497600 kHz + 174070 //1593600 kHz + 180870 //1689600 kHz + 187670 //1785600 kHz + 194570>; //1881600 kHz }; CPU2: cpu@2 { current = < 23670 //200000 kHz @@ -52,7 +66,14 @@ 113830 //1094400 kHz 128540 //1152000 kHz 142800 //1209600 kHz - 157750>; //1363200 kHz + 145520 //1248000 kHz + 157750 //1363200 kHz + 160470 //1401600 kHz + 167270 //1497600 kHz + 174070 //1593600 kHz + 180870 //1689600 kHz + 187670 //1785600 kHz + 194570>; //1881600 kHz }; CPU3: cpu@3 { current = < 23670 //200000 kHz @@ -63,7 +84,14 @@ 113830 //1094400 kHz 128540 //1152000 kHz 142800 //1209600 kHz - 157750>; //1363200 kHz + 145520 //1248000 kHz + 157750 //1363200 kHz + 160470 //1401600 kHz + 167270 //1497600 kHz + 174070 //1593600 kHz + 180870 //1689600 kHz + 187670 //1785600 kHz + 194570>; //1881600 kHz }; }; diff --git a/arch/arm/boot/dts/qcom/msm8916-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8916-regulator.dtsi index c456002..79de247 100644 --- a/arch/arm/boot/dts/qcom/msm8916-regulator.dtsi +++ b/arch/arm/boot/dts/qcom/msm8916-regulator.dtsi @@ -17,8 +17,8 @@ compatible = "qcom,spm-regulator"; regulator-name = "8916_s2"; reg = <0x1700 0x100>; - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1350000>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1385000>; }; }; }; @@ -48,10 +48,10 @@ regulator-name = "apc_corner"; qcom,cpr-fuse-corners = <3>; regulator-min-microvolt = <1>; - regulator-max-microvolt = <9>; + regulator-max-microvolt = <16>; - qcom,cpr-voltage-ceiling = <1050000 1150000 1350000>; - qcom,cpr-voltage-floor = <1050000 1050000 1162500>; + qcom,cpr-voltage-ceiling = <1000000 1150000 1385000>; + qcom,cpr-voltage-floor = <1000000 1050000 1275000>; vdd-apc-supply = <&pm8916_s2>; qcom,vdd-mx-corner-map = <4 5 7>; @@ -83,9 +83,9 @@ <27 36 6 0>, <27 18 6 0>, <27 0 6 0>; - qcom,cpr-init-voltage-ref = <1050000 1150000 1350000>; + qcom,cpr-init-voltage-ref = <1000000 1150000 1385000>; qcom,cpr-init-voltage-step = <10000>; - qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3>; + qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3 3 3 3 3>; qcom,cpr-corner-frequency-map = <1 200000000>, <2 400000000>, @@ -95,13 +95,20 @@ <6 1094400000>, <7 1152000000>, <8 1209600000>, - <9 1363200000>; + <9 1248000000>, + <10 1363200000>, + <11 1401600000>, + <12 1497600000>, + <13 1593600000>, + <14 1689600000>, + <15 1785600000>, + <16 1881600000>; qcom,speed-bin-fuse-sel = <1 34 3 0>; qcom,pvs-version-fuse-sel = <0 55 2 0>; qcom,cpr-speed-bin-max-corners = - <0 0 2 4 8>, + <0 0 2 4 16>, <0 1 2 4 7>, - <2 0 2 4 9>; + <2 0 2 4 16>; qcom,cpr-quot-adjust-scaling-factor-max = <650>; qcom,cpr-enable; }; diff --git a/arch/arm/boot/dts/qcom/msm8916.dtsi b/arch/arm/boot/dts/qcom/msm8916.dtsi index 07c754a..b572220 100644 --- a/arch/arm/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm/boot/dts/qcom/msm8916.dtsi @@ -24,7 +24,7 @@ interrupt-parent = <&intc>; chosen { - bootargs = "sched_enable_hmp=1"; + bootargs = "boot_cpus=0,1,2,3 sched_enable_hmp=1"; }; aliases { @@ -318,7 +318,15 @@ < 998400000 5>, < 1094400000 6>, < 1152000000 7>, - < 1209600000 8>; + < 1209600000 8>, + < 1248000000 9>, + < 1363200000 10>, + < 1401600000 11>, + < 1497600000 12>, + < 1593600000 13>, + < 1689600000 14>, + < 1785600000 15>, + < 1881600000 16>; qcom,speed1-bin-v0 = < 0 0>, @@ -339,7 +347,15 @@ < 998400000 5>, < 1094400000 6>, < 1152000000 7>, - < 1209600000 8>; + < 1209600000 8>, + < 1248000000 9>, + < 1363200000 10>, + < 1401600000 11>, + < 1497600000 12>, + < 1593600000 13>, + < 1689600000 14>, + < 1785600000 15>, + < 1881600000 16>; qcom,speed2-bin-v1 = < 0 0>, @@ -351,7 +367,14 @@ < 1094400000 6>, < 1152000000 7>, < 1209600000 8>, - < 1363200000 9>; + < 1248000000 9>, + < 1363200000 10>, + < 1401600000 11>, + < 1497600000 12>, + < 1593600000 13>, + < 1689600000 14>, + < 1785600000 15>, + < 1881600000 16>; }; cpubw: qcom,cpubw { @@ -396,7 +419,14 @@ < 1094400 >, < 1152000 >, < 1209600 >, - < 1363200 >; + < 1248000 >, + < 1363200 >, + < 1401600 >, + < 1497600 >, + < 1593600 >, + < 1689600 >, + < 1785600 >, + < 1881600 >; }; qcom,sps { diff --git a/drivers/clk/qcom/clock-gcc-8916.c b/drivers/clk/qcom/clock-gcc-8916.c index 7ed59c1..c7e4fe94 100644 --- a/drivers/clk/qcom/clock-gcc-8916.c +++ b/drivers/clk/qcom/clock-gcc-8916.c @@ -348,6 +348,11 @@ static struct pll_freq_tbl apcs_pll_freq[] = { F_APCS_PLL(1248000000, 65, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(1363200000, 71, 0x0, 0x1, 0x0, 0x0, 0x0), F_APCS_PLL(1401600000, 73, 0x0, 0x1, 0x0, 0x0, 0x0), + F_APCS_PLL(1497600000, 78, 0x0, 0x1, 0x0, 0x0, 0x0), + F_APCS_PLL(1593600000, 83, 0x0, 0x1, 0x0, 0x0, 0x0), + F_APCS_PLL(1689600000, 88, 0x0, 0x1, 0x0, 0x0, 0x0), + F_APCS_PLL(1785600000, 93, 0x0, 0x1, 0x0, 0x0, 0x0), + F_APCS_PLL(1881600000, 98, 0x0, 0x1, 0x0, 0x0, 0x0), PLL_F_END }; @@ -551,7 +556,10 @@ static struct clk_freq_tbl ftbl_gcc_camss_vfe0_clk[] = { F( 266670000, gpll0, 3, 0, 0), F( 320000000, gpll0, 2.5, 0, 0), F( 400000000, gpll0, 2, 0, 0), - F( 465000000, gpll2, 2, 0, 0), + F( 475000000, gpll2, 2, 0, 0), + F( 550000000, gpll2, 2, 0, 0), + F( 650000000, gpll2, 2, 0, 0), + F( 720000000, gpll2, 2, 0, 0), F_END }; @@ -565,12 +573,12 @@ static struct rcg_clk vfe0_clk_src = { .dbg_name = "vfe0_clk_src", .ops = &clk_ops_rcg, VDD_DIG_FMAX_MAP3(LOW, 160000000, NOMINAL, 320000000, HIGH, - 465000000), + 720000000), CLK_INIT(vfe0_clk_src.c), }, }; -static struct clk_freq_tbl ftbl_gcc_oxili_gfx3d_465_clk[] = { +static struct clk_freq_tbl ftbl_gcc_oxili_gfx3d_720_clk[] = { F( 19200000, xo, 1, 0, 0), F( 50000000, gpll0_aux, 16, 0, 0), F( 80000000, gpll0_aux, 10, 0, 0), @@ -582,7 +590,10 @@ static struct clk_freq_tbl ftbl_gcc_oxili_gfx3d_465_clk[] = { F( 294912000, gpll1, 3, 0, 0), F( 310000000, gpll2, 3, 0, 0), F( 400000000, gpll0_aux, 2, 0, 0), - F( 465000000, gpll2, 2, 0, 0), + F( 475000000, gpll2, 2, 0, 0), + F( 550000000, gpll2, 2, 0, 0), + F( 650000000, gpll2, 2, 0, 0), + F( 720000000, gpll2, 2, 0, 0), F_END }; @@ -598,6 +609,10 @@ static struct clk_freq_tbl ftbl_gcc_oxili_gfx3d_clk[] = { F( 294912000, gpll1, 3, 0, 0), F( 310000000, gpll2, 3, 0, 0), F( 400000000, gpll0_aux, 2, 0, 0), + F( 475000000, gpll2, 2, 0, 0), + F( 550000000, gpll2, 2, 0, 0), + F( 650000000, gpll2, 2, 0, 0), + F( 720000000, gpll2, 2, 0, 0), F_END }; @@ -610,8 +625,8 @@ static struct rcg_clk gfx3d_clk_src = { .c = { .dbg_name = "gfx3d_clk_src", .ops = &clk_ops_rcg, - VDD_DIG_FMAX_MAP3(LOW, 200000000, NOMINAL, 310000000, HIGH, - 400000000), + VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 310000000, HIGH, + 720000000), CLK_INIT(gfx3d_clk_src.c), }, }; @@ -995,7 +1010,7 @@ static struct rcg_clk csi1phytimer_clk_src = { static struct clk_freq_tbl ftbl_gcc_camss_cpp_clk[] = { F( 160000000, gpll0, 5, 0, 0), F( 320000000, gpll0, 2.5, 0, 0), - F( 465000000, gpll2, 2, 0, 0), + F( 720000000, gpll2, 2, 0, 0), F_END }; @@ -1009,7 +1024,7 @@ static struct rcg_clk cpp_clk_src = { .dbg_name = "cpp_clk_src", .ops = &clk_ops_rcg, VDD_DIG_FMAX_MAP3(LOW, 160000000, NOMINAL, 320000000, HIGH, - 465000000), + 720000000), CLK_INIT(cpp_clk_src.c), }, }; @@ -2798,8 +2813,8 @@ static void gcc_gfx3d_fmax(struct platform_device *pdev) pr_info("%s, Version: %d, bin: %d\n", __func__, version, bin); - gfx3d_clk_src.c.fmax[VDD_DIG_HIGH] = 465000000; - gfx3d_clk_src.freq_tbl = ftbl_gcc_oxili_gfx3d_465_clk; + gfx3d_clk_src.c.fmax[VDD_DIG_HIGH] = 720000000; + gfx3d_clk_src.freq_tbl = ftbl_gcc_oxili_gfx3d_720_clk; } static int msm_gcc_probe(struct platform_device *pdev) -- 2.9.3