From abca271e5cd6c3abcab6fa5e406c6e5cb76012bc Mon Sep 17 00:00:00 2001 From: Tad Date: Wed, 21 Dec 2016 19:33:18 -0500 Subject: [PATCH] Restructure --- .../Changes-CM_12.1.txt | 0 Changelogs/Changes-CM_13.0.txt | 53 ++ Changelogs/Changes-CM_14.1.txt | 46 ++ Misc/Info.txt | 32 -- .../0001-OverUnderClock.patch} | 207 +++++++- .../0002-MMC_Tweak.patch} | 0 .../0001-OverUnderClock.patch | 484 ++++++++++++++++++ .../0002-MMC_Tweak.patch | 42 ++ .../0002-Underclock.patch | 123 ----- 9 files changed, 817 insertions(+), 170 deletions(-) rename Misc/Info-Old.txt => Changelogs/Changes-CM_12.1.txt (100%) create mode 100644 Changelogs/Changes-CM_13.0.txt create mode 100644 Changelogs/Changes-CM_14.1.txt delete mode 100644 Misc/Info.txt rename Patches/CyanogenMod-14.1/{android_kernel_motorola_msm8992/0001-Overclock.patch => android_kernel_lge_bullhead/0001-OverUnderClock.patch} (59%) rename Patches/CyanogenMod-14.1/{android_kernel_motorola_msm8992/0003-MMC_Tweak.patch => android_kernel_lge_bullhead/0002-MMC_Tweak.patch} (100%) create mode 100644 Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0001-OverUnderClock.patch create mode 100644 Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-MMC_Tweak.patch delete mode 100644 Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-Underclock.patch diff --git a/Misc/Info-Old.txt b/Changelogs/Changes-CM_12.1.txt similarity index 100% rename from Misc/Info-Old.txt rename to Changelogs/Changes-CM_12.1.txt diff --git a/Changelogs/Changes-CM_13.0.txt b/Changelogs/Changes-CM_13.0.txt new file mode 100644 index 00000000..8eded5ab --- /dev/null +++ b/Changelogs/Changes-CM_13.0.txt @@ -0,0 +1,53 @@ +Last Updated: 08/11/2016 +General changes + - Changed network connectivity check URL to personal server (with logging disabled on server) + - Compiled with UBERTC GCC 4.9 and AOSP NDK 4.9 using JustArchi's v4.1 optimization flags + - Compiled with OpenJDK 8 + - Doze is significantly more aggressive + - Instant shutdown after 5 failed unlock attempts + - Fixed Profiles failing to change to user's prefered network type + - Miscellaneous hardening + - Removed Cyanogen AmbientSDK from various repos and packages + - Removed CyanogenMod analytics from various repos and packages + - Removed Gello from supported devices + - Removed unnecessary/outdated packages + - Replaced outdated AOSP webview with newer Chromium-based webview + - Browser + - Changed default home page to DuckDuckGo + - Changed default search engine to DuckDuckGo + - Link preloading is disabled by default + - Plugins are disabled by default + - Removed referrer flags from DuckDuckGo + - Removed RLZ tracking + - Search result preloading is disabled by default + - Camera2 + - Location recording is disabled by default + - Settings + - NFC and NDEF are disabled by default + - Passwords are hidden by default + - Senisitive notification content is hidden by default + +Device Changes + - bacon + - Kernel + - Overclocked from 2.45Ghz to 2.95Ghz + - No thats not a typo, its actually pretty stable + - Underclocked from 300Mhz to 268Mhz + - Device + - Basic performance/battery build.prop optimizations + - Removed bundled Google Widevine DRM and Microsoft PlayReady DRM firmware files + - Removed as many unnecessary proprietary Qualcomm blobs (CNE/DPM/Location/QTI) + - mako + - Device + - Enabled LTE support + - Increase speaker and microphone volume by 4dB + - Fixed dexopt related bootloop + +To Do + - Implement ARMORED (TRESOR) + - Implement DNScrypt support + - Implement MAC address and hostname randomization + - Remove CMStats from Trebuchet, currently only disabled code still there + - Remove DRM server + - Remove RemoteFolder from Trebuchet + - Remove unnecessary proprietary blobs diff --git a/Changelogs/Changes-CM_14.1.txt b/Changelogs/Changes-CM_14.1.txt new file mode 100644 index 00000000..139b5915 --- /dev/null +++ b/Changelogs/Changes-CM_14.1.txt @@ -0,0 +1,46 @@ +Last Updated: 12/20/2016 +General Changes + - Added support for Chromium monochrome + - Builds are dex-preopted on supported devices + - Builds are signed with private release-keys + - Bundled in our custom DNS blocklist + - Compiled with OpenJDK 8 + - Doze is re-enabled on devices without real Google Play Services + - Hardened IPv4 and IPv6 stacks + - Hardened special file systems + - Hardened SQLite + - Removed unnecessary/outdated/insecure packages + - Updated Chromium WebView on arm64 devices + - F-Droid + - F-Droid and FDroidPrivilegedExtension are included by default + - FDroidPrivilegedExtension ONLY allows access to our signed version of F-Droid + - MicroG + - GmsCore, GsfProxy, and FakeStore are included by default + - Required signature spoofing permission is ONLY granted to signed system apps unlike other ROMs + - Settings + - NFC and NDEF are disabled by default + - Passwords are hidden by default +Device Changes + - bacon + - Overclocked from 2.45Ghz to 2.95Ghz (=+2.02Ghz) + - Underclocked from 300Mhz to 268Mhz + - Qualcomm DIAG enabled + - Removed bundled Google Widevine DRM and Microsoft PlayReady DRM firmware files + - bullhead + - Overclocked a57 from 1.82Ghz to 2.01Ghz, overclocked a53 from 1.44Ghz to 1.63Ghz (=+1.14Ghz) + - Underclocked both from 384Mhz to 300Mhz + - MMC performance slightly increased + - clark + - Overclocked a57 from 1.82Ghz to 2.01Ghz, overclocked a53 from 1.44Ghz to 1.63Ghz (=+1.14Ghz) + - Underclocked both from 384Mhz to 300Mhz + - MMC performance slightly increased + - Removed bundled Google Widevine DRM and Microsoft PlayReady DRM firmware files + - mako + - Overclocked from 1.51Ghz to 1.94Ghz (=+1.72Ghz) + - Underclocked from 384Mhz to 81Mhz + - Enabled LTE support (Requires LTE hybrid modem to be flashed) + - hammerhead + - Overclocked from 2.26Ghz to 2.95Ghz (=+2.75Ghz) + - shamu + - Overclocked from 2.64Ghz to 2.88Ghz (=+0.96Ghz) + - Underclocked from 300Mhz to 35Mhz diff --git a/Misc/Info.txt b/Misc/Info.txt deleted file mode 100644 index edad0a0a..00000000 --- a/Misc/Info.txt +++ /dev/null @@ -1,32 +0,0 @@ -General Changes - Build - - Browser: Changed some default settings - - Camera2: Disabled location saving by default - - Compiled with UBERTC GCC 4.9 and AOSP NDK 4.9 using JustArchi's v4.1 optimization flags - - Miscellaneous hardening - - Removed analytics from various packages - - Removed some packages for privacy reasons - - Removed useless packages - - Settings: Senisitive notification content is hidden by default - To Do - - Add more governors - - Add more I/O schedulers - - DNScrypt support - - Implement Quick Wakeup - - Implement UKSM - - LZ4 boot support - - Remove DRM server - - Remove unneeded Qualcomm blobs - -Bacon Changes - Kernel - - Overclocked from 2.45Ghz to 2.88Ghz - - Underclocked from 300Mhz to 268Mhz - Device - - Basic performance/battery build.prop optimizations - - Removed bundled Google Widevine DRM and Microsoft PlayReady DRM firmware files - -Mako Changes - Kernel - - Overclocked from 1.51Ghz to 1.94Ghz - - Underclocked from 384Mhz to 81Mhz diff --git a/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0001-Overclock.patch b/Patches/CyanogenMod-14.1/android_kernel_lge_bullhead/0001-OverUnderClock.patch similarity index 59% rename from Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0001-Overclock.patch rename to Patches/CyanogenMod-14.1/android_kernel_lge_bullhead/0001-OverUnderClock.patch index 32a2f79f..40914170 100644 --- a/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0001-Overclock.patch +++ b/Patches/CyanogenMod-14.1/android_kernel_lge_bullhead/0001-OverUnderClock.patch @@ -1,7 +1,7 @@ -From 254853df24137d91e5f24f035c6772aa471bb7d9 Mon Sep 17 00:00:00 2001 +From 28793d3021e480bba68fe8b76d9848a6b8aee5d5 Mon Sep 17 00:00:00 2001 From: flar2 Date: Tue, 3 Nov 2015 21:21:34 -0500 -Subject: [PATCH] msm8992 initial overclocking +Subject: [PATCH 1/3] msm8992 initial overclocking --- arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 30 ++++++++++++-------- @@ -11,7 +11,7 @@ Subject: [PATCH] msm8992 initial overclocking 4 files changed, 93 insertions(+), 26 deletions(-) diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi -index 4ca8ab3..54de2e3 100644 +index d5f6860..23b23ba 100644 --- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi @@ -605,7 +605,7 @@ @@ -104,10 +104,10 @@ index 4ca8ab3..54de2e3 100644 }; diff --git a/arch/arm/boot/dts/qcom/msm8992.dtsi b/arch/arm/boot/dts/qcom/msm8992.dtsi -index 87e0505..4ffbb34 100644 +index 5ba420c..8892b56 100644 --- a/arch/arm/boot/dts/qcom/msm8992.dtsi +++ b/arch/arm/boot/dts/qcom/msm8992.dtsi -@@ -776,7 +776,9 @@ +@@ -852,7 +852,9 @@ < 787200 3509 >, < 864000 4173 >, < 960000 5271 >, @@ -118,7 +118,7 @@ index 87e0505..4ffbb34 100644 cpu-to-dev-map-4 = < 384000 1525 >, < 633600 2288 >, -@@ -784,16 +786,22 @@ +@@ -860,16 +862,22 @@ < 864000 4173 >, < 960000 5271 >, < 1344000 5928 >, @@ -144,7 +144,7 @@ index 87e0505..4ffbb34 100644 }; cci-cpufreq { -@@ -804,7 +812,9 @@ +@@ -880,7 +888,9 @@ < 787200 384000 >, < 864000 556800 >, < 960000 729600 >, @@ -155,7 +155,7 @@ index 87e0505..4ffbb34 100644 cpu-to-dev-map-4 = < 384000 134400 >, < 480000 300000 >, -@@ -812,7 +822,9 @@ +@@ -888,7 +898,9 @@ < 768000 556800 >, < 960000 600000 >, < 1440000 729600 >, @@ -166,7 +166,7 @@ index 87e0505..4ffbb34 100644 }; }; -@@ -839,7 +851,9 @@ +@@ -915,7 +927,9 @@ < 864000 >, < 960000 >, < 1248000 >, @@ -177,7 +177,7 @@ index 87e0505..4ffbb34 100644 qcom,cpufreq-table-4 = < 384000 >, -@@ -854,7 +868,9 @@ +@@ -930,7 +944,9 @@ < 1536000 >, < 1632000 >, < 1689600 >, @@ -188,7 +188,7 @@ index 87e0505..4ffbb34 100644 }; -@@ -892,7 +908,9 @@ +@@ -968,7 +984,9 @@ < 864000000 7>, < 960000000 8>, < 1248000000 9>, @@ -199,7 +199,7 @@ index 87e0505..4ffbb34 100644 qcom,a57-speedbin0-v0 = < 0 0>, < 384000000 5>, -@@ -907,7 +925,9 @@ +@@ -983,7 +1001,9 @@ < 1536000000 12>, < 1632000000 13>, < 1689600000 14>, @@ -211,10 +211,10 @@ index 87e0505..4ffbb34 100644 < 0 0>, < 134400000 2>, diff --git a/drivers/clk/qcom/clock-cpu-8994.c b/drivers/clk/qcom/clock-cpu-8994.c -index 0a3f22d..1f5180e 100644 +index 6eb346b..de3d72f 100644 --- a/drivers/clk/qcom/clock-cpu-8994.c +++ b/drivers/clk/qcom/clock-cpu-8994.c -@@ -196,13 +196,13 @@ static struct pll_clk a57_pll0 = { +@@ -191,13 +191,13 @@ static struct pll_clk a57_pll0 = { .test_ctl_lo_val = 0x00010000, }, .min_rate = 1209600000, @@ -230,7 +230,7 @@ index 0a3f22d..1f5180e 100644 CLK_INIT(a57_pll0.c), }, }; -@@ -234,13 +234,13 @@ static struct pll_clk a57_pll1 = { +@@ -229,13 +229,13 @@ static struct pll_clk a57_pll1 = { /* Necessary since we'll be setting a rate before handoff on V1 */ .src_rate = 19200000, .min_rate = 1209600000, @@ -305,3 +305,180 @@ index e30b0cb..dd3a589 100644 ftbl[i].driver_data = i; ftbl[i].frequency = f; } +-- +2.9.3 + + +From 9dfe99b9f8eead920f7cdefdb2ae7b1cea776d9b Mon Sep 17 00:00:00 2001 +From: dirtyhank +Date: Thu, 14 Jan 2016 12:56:07 +0100 +Subject: [PATCH 2/3] CPU underclocking + + Based on underclocking to Nexus 6P by anarkia1976 +--- + arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 6 +++--- + arch/arm/boot/dts/qcom/msm8992.dtsi | 14 +++++++++++--- + 2 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +index 23b23ba..1ef9eb3 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +@@ -750,7 +750,7 @@ + qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>; + qcom,cpr-quot-adjust-scaling-factor-max = <0 2000 2000 2000>; + qcom,cpr-corner-frequency-map = +- <1 300000000>, ++ <1 302400000>, + <2 384000000>, + <3 460800000>, + <4 600000000>, +@@ -898,8 +898,8 @@ + qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>; + qcom,cpr-quot-adjust-scaling-factor-max = <0 0 2000 2000>; + qcom,cpr-corner-frequency-map = +- <1 300000000>, /* SVS Fmin for "SVS2" */ +- <2 300000000>, ++ <1 302400000>, /* SVS Fmin for "SVS2" */ ++ <2 302400000>, + <3 384000000>, + <4 480000000>, + <5 633600000>, +diff --git a/arch/arm/boot/dts/qcom/msm8992.dtsi b/arch/arm/boot/dts/qcom/msm8992.dtsi +index 8892b56..f6a39cd 100644 +--- a/arch/arm/boot/dts/qcom/msm8992.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992.dtsi +@@ -796,7 +796,7 @@ + governor = "cpufreq"; + freq-tbl-khz = + < 134400 >, +- < 300000 >, ++ < 302400 >, + < 384000 >, + < 556800 >, + < 600000 >, +@@ -856,7 +856,8 @@ + < 1536000 7102 >, + < 1632000 7102 >; + cpu-to-dev-map-4 = +- < 384000 1525 >, ++ < 302400 1525 >, ++ < 384000 1525 >, + < 633600 2288 >, + < 768000 3509 >, + < 864000 4173 >, +@@ -883,6 +884,7 @@ + cci-cpufreq { + target-dev = <&cci_cache>; + cpu-to-dev-map-0 = ++ < 302400 134400 >, + < 384000 134400 >, + < 600000 300000 >, + < 787200 384000 >, +@@ -892,6 +894,7 @@ + < 1536000 787200 >, + < 1632000 787200 >; + cpu-to-dev-map-4 = ++ < 302400 134400 >, + < 384000 134400 >, + < 480000 300000 >, + < 633600 384000 >, +@@ -919,6 +922,7 @@ + qcom,governor-per-policy; + + qcom,cpufreq-table-0 = ++ < 302400 >, + < 384000 >, + < 460800 >, + < 600000 >, +@@ -932,6 +936,7 @@ + < 1632000 >; + + qcom,cpufreq-table-4 = ++ < 302400 >, + < 384000 >, + < 480000 >, + < 633600 >, +@@ -966,6 +971,7 @@ + vdd-dig-supply = <&pm8994_s2_corner_ao>; + qcom,a53-speedbin0-v0 = + < 0 0>, ++ < 302400000 1>, + < 384000000 2>, + < 460800000 3>, + < 600000000 4>, +@@ -976,6 +982,7 @@ + < 1248000000 9>; + qcom,a53-speedbin1-v0 = + < 0 0>, ++ < 302400000 1>, + < 384000000 2>, + < 460800000 3>, + < 600000000 4>, +@@ -989,6 +996,7 @@ + < 1632000000 12>; + qcom,a57-speedbin0-v0 = + < 0 0>, ++ < 302400000 5>, + < 384000000 5>, + < 480000000 5>, + < 633600000 5>, +@@ -1007,7 +1015,7 @@ + qcom,cci-speedbin0-v0 = + < 0 0>, + < 134400000 2>, +- < 300000000 4>, ++ < 302400000 4>, + < 384000000 6>, + < 556800000 6>, + < 600000000 8>, +-- +2.9.3 + + +From b7e24657fb125b77bb5d9a39493040e1234c7c83 Mon Sep 17 00:00:00 2001 +From: flar2 +Date: Mon, 21 Nov 2016 21:40:09 -0500 +Subject: [PATCH 3/3] msm8992: bump oc voltages + +--- + arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +index 1ef9eb3..d2a875b 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +@@ -673,11 +673,11 @@ + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 800000 800000 900000 900000 + 1000000 1000000 1115000 1115000 +- 1180000 1180000 1180000 1180000>; ++ 1180000 1180000 1180000 1200000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 655000 700000 735000 + 800000 835000 850000 875000 +- 950000 1000000 1000000 1000000>; ++ 950000 1000000 1000000 1100000>; + qcom,cpr-fuse-version-map = + <0 0xffffffff 0 0 0 0 0>, + <0 0xffffffff 1 0 0 0 0>, +@@ -849,13 +849,13 @@ + 900000 1000000 1000000 1000000 + 1115000 1115000 1115000 1115000 + 1115000 1115000 1180000 1180000 +- 1180000>; ++ 1200000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 640000 665000 690000 + 735000 745000 770000 785000 + 850000 860000 880000 900000 + 920000 935000 1000000 1000000 +- 1000000>; ++ 1100000>; + qcom,cpr-fuse-version-map = + <0xffffffff 0xffffffff 0 4 4 4 4>, + <0xffffffff 0xffffffff 1 4 4 4 4>, +-- +2.9.3 + diff --git a/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0003-MMC_Tweak.patch b/Patches/CyanogenMod-14.1/android_kernel_lge_bullhead/0002-MMC_Tweak.patch similarity index 100% rename from Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0003-MMC_Tweak.patch rename to Patches/CyanogenMod-14.1/android_kernel_lge_bullhead/0002-MMC_Tweak.patch diff --git a/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0001-OverUnderClock.patch b/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0001-OverUnderClock.patch new file mode 100644 index 00000000..40914170 --- /dev/null +++ b/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0001-OverUnderClock.patch @@ -0,0 +1,484 @@ +From 28793d3021e480bba68fe8b76d9848a6b8aee5d5 Mon Sep 17 00:00:00 2001 +From: flar2 +Date: Tue, 3 Nov 2015 21:21:34 -0500 +Subject: [PATCH 1/3] msm8992 initial overclocking + +--- + arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 30 ++++++++++++-------- + arch/arm/boot/dts/qcom/msm8992.dtsi | 40 +++++++++++++++++++------- + drivers/clk/qcom/clock-cpu-8994.c | 8 +++--- + drivers/cpufreq/qcom-cpufreq.c | 41 +++++++++++++++++++++++++++ + 4 files changed, 93 insertions(+), 26 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +index d5f6860..23b23ba 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +@@ -605,7 +605,7 @@ + regulator-name = "apc0_corner"; + qcom,cpr-fuse-corners = <4>; + regulator-min-microvolt = <1>; +- regulator-max-microvolt = <10>; ++ regulator-max-microvolt = <12>; + + qcom,cpr-voltage-ceiling = <900000 900000 1000000 1180000>; + qcom,cpr-voltage-floor = <640000 700000 800000 850000>; +@@ -669,15 +669,15 @@ + qcom,cpr-init-voltage-ref = <900000 900000 1000000 1230000>; + qcom,cpr-init-voltage-step = <10000>; + +- qcom,cpr-corner-map = <1 1 2 2 3 3 4 4 4 4>; ++ qcom,cpr-corner-map = <1 1 2 2 3 3 4 4 4 4 4 4>; + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 800000 800000 900000 900000 + 1000000 1000000 1115000 1115000 +- 1180000 1180000>; ++ 1180000 1180000 1180000 1180000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 655000 700000 735000 + 800000 835000 850000 875000 +- 950000 1000000>; ++ 950000 1000000 1000000 1000000>; + qcom,cpr-fuse-version-map = + <0 0xffffffff 0 0 0 0 0>, + <0 0xffffffff 1 0 0 0 0>, +@@ -759,10 +759,12 @@ + <7 864000000>, + <8 960000000>, + <9 1248000000>, +- <10 1440000000>; ++ <10 1440000000>, ++ <11 1536000000>, ++ <12 1632000000>; + qcom,cpr-speed-bin-max-corners = + <0 0 2 4 6 9>, +- <1 0 2 4 6 10>; ++ <1 0 2 4 6 12>; + qcom,cpr-enable; + }; + +@@ -774,7 +776,7 @@ + regulator-name = "apc1_corner"; + qcom,cpr-fuse-corners = <4>; + regulator-min-microvolt = <1>; +- regulator-max-microvolt = <15>; ++ regulator-max-microvolt = <17>; + + qcom,cpr-voltage-ceiling = <900000 900000 1000000 1180000>; + qcom,cpr-voltage-floor = <640000 640000 745000 850000>; +@@ -841,17 +843,19 @@ + qcom,cpr-init-voltage-ref = <900000 900000 1000000 1230000>; + qcom,cpr-init-voltage-step = <10000>; + +- qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4>; ++ qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4 4>; + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 900000 900000 900000 900000 + 900000 1000000 1000000 1000000 + 1115000 1115000 1115000 1115000 +- 1115000 1115000 1180000>; ++ 1115000 1115000 1180000 1180000 ++ 1180000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 640000 665000 690000 + 735000 745000 770000 785000 + 850000 860000 880000 900000 +- 920000 935000 1000000>; ++ 920000 935000 1000000 1000000 ++ 1000000>; + qcom,cpr-fuse-version-map = + <0xffffffff 0xffffffff 0 4 4 4 4>, + <0xffffffff 0xffffffff 1 4 4 4 4>, +@@ -908,9 +912,11 @@ + <12 1536000000>, + <13 1632000000>, + <14 1689600000>, +- <15 1824000000>; ++ <15 1824000000>, ++ <16 1958400000>, ++ <17 2016000000>; + qcom,cpr-speed-bin-max-corners = +- <0xFFFFFFFF 0 1 5 8 15>; ++ <0xFFFFFFFF 0 1 5 8 17>; + qcom,cpr-enable; + }; + +diff --git a/arch/arm/boot/dts/qcom/msm8992.dtsi b/arch/arm/boot/dts/qcom/msm8992.dtsi +index 5ba420c..8892b56 100644 +--- a/arch/arm/boot/dts/qcom/msm8992.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992.dtsi +@@ -852,7 +852,9 @@ + < 787200 3509 >, + < 864000 4173 >, + < 960000 5271 >, +- < 1440000 7102 >; ++ < 1440000 7102 >, ++ < 1536000 7102 >, ++ < 1632000 7102 >; + cpu-to-dev-map-4 = + < 384000 1525 >, + < 633600 2288 >, +@@ -860,16 +862,22 @@ + < 864000 4173 >, + < 960000 5271 >, + < 1344000 5928 >, +- < 1824000 7102 >; ++ < 1824000 7102 >, ++ < 1958400 7102 >, ++ < 2016000 7102 >; + }; + + mincpubw-cpufreq { + target-dev = <&mincpubw>; + cpu-to-dev-map-0 = +- < 1440000 1525 >; ++ < 1440000 1525 >, ++ < 1536000 1525 >, ++ < 1632000 1525 >; + cpu-to-dev-map-4 = + < 1689600 1525 >, +- < 1824000 5928 >; ++ < 1824000 1525 >, ++ < 1958400 1525 >, ++ < 2016000 5928 >; + }; + + cci-cpufreq { +@@ -880,7 +888,9 @@ + < 787200 384000 >, + < 864000 556800 >, + < 960000 729600 >, +- < 1440000 787200 >; ++ < 1440000 787200 >, ++ < 1536000 787200 >, ++ < 1632000 787200 >; + cpu-to-dev-map-4 = + < 384000 134400 >, + < 480000 300000 >, +@@ -888,7 +898,9 @@ + < 768000 556800 >, + < 960000 600000 >, + < 1440000 729600 >, +- < 1824000 787200 >; ++ < 1824000 787200 >, ++ < 1958400 787200 >, ++ < 2016000 787200 >; + }; + }; + +@@ -915,7 +927,9 @@ + < 864000 >, + < 960000 >, + < 1248000 >, +- < 1440000 >; ++ < 1440000 >, ++ < 1536000 >, ++ < 1632000 >; + + qcom,cpufreq-table-4 = + < 384000 >, +@@ -930,7 +944,9 @@ + < 1536000 >, + < 1632000 >, + < 1689600 >, +- < 1824000 >; ++ < 1824000 >, ++ < 1958400 >, ++ < 2016000 >; + + }; + +@@ -968,7 +984,9 @@ + < 864000000 7>, + < 960000000 8>, + < 1248000000 9>, +- < 1440000000 10>; ++ < 1440000000 10>, ++ < 1536000000 11>, ++ < 1632000000 12>; + qcom,a57-speedbin0-v0 = + < 0 0>, + < 384000000 5>, +@@ -983,7 +1001,9 @@ + < 1536000000 12>, + < 1632000000 13>, + < 1689600000 14>, +- < 1824000000 15>; ++ < 1824000000 15>, ++ < 1958400000 16>, ++ < 2016000000 17>; + qcom,cci-speedbin0-v0 = + < 0 0>, + < 134400000 2>, +diff --git a/drivers/clk/qcom/clock-cpu-8994.c b/drivers/clk/qcom/clock-cpu-8994.c +index 6eb346b..de3d72f 100644 +--- a/drivers/clk/qcom/clock-cpu-8994.c ++++ b/drivers/clk/qcom/clock-cpu-8994.c +@@ -191,13 +191,13 @@ static struct pll_clk a57_pll0 = { + .test_ctl_lo_val = 0x00010000, + }, + .min_rate = 1209600000, +- .max_rate = 1996800000, ++ .max_rate = 2073600000, + .base = &vbases[C1_PLL_BASE], + .c = { + .parent = &xo_ao.c, + .dbg_name = "a57_pll0", + .ops = &clk_ops_variable_rate_pll, +- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000), ++ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000), + CLK_INIT(a57_pll0.c), + }, + }; +@@ -229,13 +229,13 @@ static struct pll_clk a57_pll1 = { + /* Necessary since we'll be setting a rate before handoff on V1 */ + .src_rate = 19200000, + .min_rate = 1209600000, +- .max_rate = 1996800000, ++ .max_rate = 2073600000, + .base = &vbases[C1_PLL_BASE], + .c = { + .parent = &xo_ao.c, + .dbg_name = "a57_pll1", + .ops = &clk_ops_variable_rate_pll, +- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000), ++ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000), + CLK_INIT(a57_pll1.c), + }, + }; +diff --git a/drivers/cpufreq/qcom-cpufreq.c b/drivers/cpufreq/qcom-cpufreq.c +index e30b0cb..dd3a589 100644 +--- a/drivers/cpufreq/qcom-cpufreq.c ++++ b/drivers/cpufreq/qcom-cpufreq.c +@@ -31,6 +31,40 @@ + + static DEFINE_MUTEX(l2bw_lock); + ++static unsigned long arg_cpu_max_a53 = 1440000; ++ ++static int __init cpufreq_read_cpu_max_a53(char *cpu_max_a53) ++{ ++ unsigned long ui_khz; ++ int ret; ++ ++ ret = kstrtoul(cpu_max_a53, 0, &ui_khz); ++ if (ret) ++ return -EINVAL; ++ ++ arg_cpu_max_a53 = ui_khz; ++ printk("cpu_max_a53=%lu\n", arg_cpu_max_a53); ++ return ret; ++} ++__setup("cpu_max_a53=", cpufreq_read_cpu_max_a53); ++ ++static unsigned long arg_cpu_max_a57 = 1824000; ++ ++static int __init cpufreq_read_cpu_max_a57(char *cpu_max_a57) ++{ ++ unsigned long ui_khz; ++ int ret; ++ ++ ret = kstrtoul(cpu_max_a57, 0, &ui_khz); ++ if (ret) ++ return -EINVAL; ++ ++ arg_cpu_max_a57 = ui_khz; ++ printk("cpu_max_a57=%lu\n", arg_cpu_max_a57); ++ return ret; ++} ++__setup("cpu_max_a57=", cpufreq_read_cpu_max_a57); ++ + static struct clk *cpu_clk[NR_CPUS]; + static struct clk *l2_clk; + static DEFINE_PER_CPU(struct cpufreq_frequency_table *, freq_table); +@@ -364,6 +398,13 @@ static struct cpufreq_frequency_table *cpufreq_parse_dt(struct device *dev, + if (i > 0 && f <= ftbl[i-1].frequency) + break; + ++ //Custom max freq ++ if ((cpu < 4 && f > arg_cpu_max_a53) || ++ (cpu >= 4 && f > arg_cpu_max_a57)) { ++ nf = i; ++ break; ++ } ++ + ftbl[i].driver_data = i; + ftbl[i].frequency = f; + } +-- +2.9.3 + + +From 9dfe99b9f8eead920f7cdefdb2ae7b1cea776d9b Mon Sep 17 00:00:00 2001 +From: dirtyhank +Date: Thu, 14 Jan 2016 12:56:07 +0100 +Subject: [PATCH 2/3] CPU underclocking + + Based on underclocking to Nexus 6P by anarkia1976 +--- + arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 6 +++--- + arch/arm/boot/dts/qcom/msm8992.dtsi | 14 +++++++++++--- + 2 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +index 23b23ba..1ef9eb3 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +@@ -750,7 +750,7 @@ + qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>; + qcom,cpr-quot-adjust-scaling-factor-max = <0 2000 2000 2000>; + qcom,cpr-corner-frequency-map = +- <1 300000000>, ++ <1 302400000>, + <2 384000000>, + <3 460800000>, + <4 600000000>, +@@ -898,8 +898,8 @@ + qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>; + qcom,cpr-quot-adjust-scaling-factor-max = <0 0 2000 2000>; + qcom,cpr-corner-frequency-map = +- <1 300000000>, /* SVS Fmin for "SVS2" */ +- <2 300000000>, ++ <1 302400000>, /* SVS Fmin for "SVS2" */ ++ <2 302400000>, + <3 384000000>, + <4 480000000>, + <5 633600000>, +diff --git a/arch/arm/boot/dts/qcom/msm8992.dtsi b/arch/arm/boot/dts/qcom/msm8992.dtsi +index 8892b56..f6a39cd 100644 +--- a/arch/arm/boot/dts/qcom/msm8992.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992.dtsi +@@ -796,7 +796,7 @@ + governor = "cpufreq"; + freq-tbl-khz = + < 134400 >, +- < 300000 >, ++ < 302400 >, + < 384000 >, + < 556800 >, + < 600000 >, +@@ -856,7 +856,8 @@ + < 1536000 7102 >, + < 1632000 7102 >; + cpu-to-dev-map-4 = +- < 384000 1525 >, ++ < 302400 1525 >, ++ < 384000 1525 >, + < 633600 2288 >, + < 768000 3509 >, + < 864000 4173 >, +@@ -883,6 +884,7 @@ + cci-cpufreq { + target-dev = <&cci_cache>; + cpu-to-dev-map-0 = ++ < 302400 134400 >, + < 384000 134400 >, + < 600000 300000 >, + < 787200 384000 >, +@@ -892,6 +894,7 @@ + < 1536000 787200 >, + < 1632000 787200 >; + cpu-to-dev-map-4 = ++ < 302400 134400 >, + < 384000 134400 >, + < 480000 300000 >, + < 633600 384000 >, +@@ -919,6 +922,7 @@ + qcom,governor-per-policy; + + qcom,cpufreq-table-0 = ++ < 302400 >, + < 384000 >, + < 460800 >, + < 600000 >, +@@ -932,6 +936,7 @@ + < 1632000 >; + + qcom,cpufreq-table-4 = ++ < 302400 >, + < 384000 >, + < 480000 >, + < 633600 >, +@@ -966,6 +971,7 @@ + vdd-dig-supply = <&pm8994_s2_corner_ao>; + qcom,a53-speedbin0-v0 = + < 0 0>, ++ < 302400000 1>, + < 384000000 2>, + < 460800000 3>, + < 600000000 4>, +@@ -976,6 +982,7 @@ + < 1248000000 9>; + qcom,a53-speedbin1-v0 = + < 0 0>, ++ < 302400000 1>, + < 384000000 2>, + < 460800000 3>, + < 600000000 4>, +@@ -989,6 +996,7 @@ + < 1632000000 12>; + qcom,a57-speedbin0-v0 = + < 0 0>, ++ < 302400000 5>, + < 384000000 5>, + < 480000000 5>, + < 633600000 5>, +@@ -1007,7 +1015,7 @@ + qcom,cci-speedbin0-v0 = + < 0 0>, + < 134400000 2>, +- < 300000000 4>, ++ < 302400000 4>, + < 384000000 6>, + < 556800000 6>, + < 600000000 8>, +-- +2.9.3 + + +From b7e24657fb125b77bb5d9a39493040e1234c7c83 Mon Sep 17 00:00:00 2001 +From: flar2 +Date: Mon, 21 Nov 2016 21:40:09 -0500 +Subject: [PATCH 3/3] msm8992: bump oc voltages + +--- + arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +index 1ef9eb3..d2a875b 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +@@ -673,11 +673,11 @@ + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 800000 800000 900000 900000 + 1000000 1000000 1115000 1115000 +- 1180000 1180000 1180000 1180000>; ++ 1180000 1180000 1180000 1200000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 655000 700000 735000 + 800000 835000 850000 875000 +- 950000 1000000 1000000 1000000>; ++ 950000 1000000 1000000 1100000>; + qcom,cpr-fuse-version-map = + <0 0xffffffff 0 0 0 0 0>, + <0 0xffffffff 1 0 0 0 0>, +@@ -849,13 +849,13 @@ + 900000 1000000 1000000 1000000 + 1115000 1115000 1115000 1115000 + 1115000 1115000 1180000 1180000 +- 1180000>; ++ 1200000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 640000 665000 690000 + 735000 745000 770000 785000 + 850000 860000 880000 900000 + 920000 935000 1000000 1000000 +- 1000000>; ++ 1100000>; + qcom,cpr-fuse-version-map = + <0xffffffff 0xffffffff 0 4 4 4 4>, + <0xffffffff 0xffffffff 1 4 4 4 4>, +-- +2.9.3 + diff --git a/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-MMC_Tweak.patch b/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-MMC_Tweak.patch new file mode 100644 index 00000000..0c6fc863 --- /dev/null +++ b/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-MMC_Tweak.patch @@ -0,0 +1,42 @@ +From f24f2dec25043cf7e6ef0f80a65dde45f2f131dd Mon Sep 17 00:00:00 2001 +From: franciscofranco +Date: Wed, 20 Jan 2016 01:45:39 +0000 +Subject: [PATCH] IKSWM-6057: dts: mmc: remove wakeup on idle flag + +Remove the wakeup-on-idle flag can improve the mmc +performance(verified with iozone). No current drain +and other system performance impact. + +Change-Id: Ia90cdfb66569b5ee3713d2c9785a2b7a9d24760e +Signed-off-by: Lianwei Wang +Reviewed-on: http://gerrit.mot.com/785887 +SLTApproved: Slta Waiver +SME-Granted: SME Approvals Granted +Tested-by: Jira Key +Reviewed-by: Zhi-Ming Yuan +Submit-Approved: Jira Key +Signed-off-by: franciscofranco +--- + arch/arm/boot/dts/qcom/msm8992.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992.dtsi b/arch/arm/boot/dts/qcom/msm8992.dtsi +index 5dedecb..dc70365 100644 +--- a/arch/arm/boot/dts/qcom/msm8992.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992.dtsi +@@ -1706,7 +1706,6 @@ + qcom,cpu-dma-latency-us = <301 70>; + qcom,cpu-affinity = "affine_cores"; + qcom,cpu-affinity-mask = <0x0f 0xf0>; +- qcom,wakeup-on-idle; + + qcom,msm-bus,name = "sdhc1"; + qcom,msm-bus,num-cases = <9>; +@@ -1746,7 +1745,6 @@ + qcom,cpu-dma-latency-us = <301 70>; + qcom,cpu-affinity = "affine_cores"; + qcom,cpu-affinity-mask = <0x0f 0xf0>; +- qcom,wakeup-on-idle; + + qcom,msm-bus,name = "sdhc2"; + qcom,msm-bus,num-cases = <8>; diff --git a/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-Underclock.patch b/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-Underclock.patch deleted file mode 100644 index 6895dbe5..00000000 --- a/Patches/CyanogenMod-14.1/android_kernel_motorola_msm8992/0002-Underclock.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 98ccfea048cb13fed6fe802e0c9bb98a288f8468 Mon Sep 17 00:00:00 2001 -From: dirtyhank -Date: Thu, 14 Jan 2016 12:56:07 +0100 -Subject: [PATCH] CPU underclocking - - Based on underclocking to Nexus 6P by anarkia1976 ---- - arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 6 +++--- - arch/arm/boot/dts/qcom/msm8992.dtsi | 14 +++++++++++--- - 2 files changed, 14 insertions(+), 6 deletions(-) - -diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi -index 54de2e3..faee27e 100644 ---- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi -+++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi -@@ -750,7 +750,7 @@ - qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>; - qcom,cpr-quot-adjust-scaling-factor-max = <0 2000 2000 2000>; - qcom,cpr-corner-frequency-map = -- <1 300000000>, -+ <1 302400000>, - <2 384000000>, - <3 460800000>, - <4 600000000>, -@@ -898,8 +898,8 @@ - qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>; - qcom,cpr-quot-adjust-scaling-factor-max = <0 0 2000 2000>; - qcom,cpr-corner-frequency-map = -- <1 300000000>, /* SVS Fmin for "SVS2" */ -- <2 300000000>, -+ <1 302400000>, /* SVS Fmin for "SVS2" */ -+ <2 302400000>, - <3 384000000>, - <4 480000000>, - <5 633600000>, -diff --git a/arch/arm/boot/dts/qcom/msm8992.dtsi b/arch/arm/boot/dts/qcom/msm8992.dtsi -index 4ffbb34..5dedecb 100644 ---- a/arch/arm/boot/dts/qcom/msm8992.dtsi -+++ b/arch/arm/boot/dts/qcom/msm8992.dtsi -@@ -720,7 +720,7 @@ - governor = "cpufreq"; - freq-tbl-khz = - < 134400 >, -- < 300000 >, -+ < 302400 >, - < 384000 >, - < 556800 >, - < 600000 >, -@@ -780,7 +780,8 @@ - < 1536000 7102 >, - < 1632000 7102 >; - cpu-to-dev-map-4 = -- < 384000 1525 >, -+ < 302400 1525 >, -+ < 384000 1525 >, - < 633600 2288 >, - < 768000 3509 >, - < 864000 4173 >, -@@ -807,6 +808,7 @@ - cci-cpufreq { - target-dev = <&cci_cache>; - cpu-to-dev-map-0 = -+ < 302400 134400 >, - < 384000 134400 >, - < 600000 300000 >, - < 787200 384000 >, -@@ -816,6 +818,7 @@ - < 1536000 787200 >, - < 1632000 787200 >; - cpu-to-dev-map-4 = -+ < 302400 134400 >, - < 384000 134400 >, - < 480000 300000 >, - < 633600 384000 >, -@@ -843,6 +846,7 @@ - qcom,governor-per-policy; - - qcom,cpufreq-table-0 = -+ < 302400 >, - < 384000 >, - < 460800 >, - < 600000 >, -@@ -856,6 +860,7 @@ - < 1632000 >; - - qcom,cpufreq-table-4 = -+ < 302400 >, - < 384000 >, - < 480000 >, - < 633600 >, -@@ -890,6 +895,7 @@ - vdd-dig-supply = <&pm8994_s2_corner_ao>; - qcom,a53-speedbin0-v0 = - < 0 0>, -+ < 302400000 1>, - < 384000000 2>, - < 460800000 3>, - < 600000000 4>, -@@ -900,6 +906,7 @@ - < 1248000000 9>; - qcom,a53-speedbin1-v0 = - < 0 0>, -+ < 302400000 1>, - < 384000000 2>, - < 460800000 3>, - < 600000000 4>, -@@ -913,6 +920,7 @@ - < 1632000000 12>; - qcom,a57-speedbin0-v0 = - < 0 0>, -+ < 302400000 5>, - < 384000000 5>, - < 480000000 5>, - < 633600000 5>, -@@ -931,7 +939,7 @@ - qcom,cci-speedbin0-v0 = - < 0 0>, - < 134400000 2>, -- < 300000000 4>, -+ < 302400000 4>, - < 384000000 6>, - < 556800000 6>, - < 600000000 8>,