From 77cc7f13415b96a81455fd0ae2f524ed382ccdac Mon Sep 17 00:00:00 2001 From: Tad Date: Thu, 11 Jan 2018 14:31:17 -0500 Subject: [PATCH] More overclocks --- .../0001-Overclock.patch | 424 ++++++++++++++++++ .../0001-Overclock.patch | 307 +++++++++++++ .../0002-Overclock.patch | 47 ++ .../0003-Overclock.patch | 43 ++ ...Overclock-1.patch => 0001-Overclock.patch} | 0 ...Overclock-2.patch => 0002-Overclock.patch} | 0 ...Overclock-3.patch => 0003-Overclock.patch} | 0 ...Overclock-4.patch => 0004-Overclock.patch} | 0 ...rUnderClock.patch => 0001-Overclock.patch} | 0 Scripts/LineageOS-14.1/Overclock.sh | 18 +- 10 files changed, 834 insertions(+), 5 deletions(-) create mode 100644 Patches/LineageOS-14.1/android_kernel_huawei_angler/0001-Overclock.patch create mode 100644 Patches/LineageOS-14.1/android_kernel_lge_bullhead/0001-Overclock.patch create mode 100644 Patches/LineageOS-14.1/android_kernel_lge_bullhead/0002-Overclock.patch create mode 100644 Patches/LineageOS-14.1/android_kernel_lge_bullhead/0003-Overclock.patch rename Patches/LineageOS-14.1/android_kernel_lge_g3/{Overclock-1.patch => 0001-Overclock.patch} (100%) rename Patches/LineageOS-14.1/android_kernel_lge_g3/{Overclock-2.patch => 0002-Overclock.patch} (100%) rename Patches/LineageOS-14.1/android_kernel_lge_g3/{Overclock-3.patch => 0003-Overclock.patch} (100%) rename Patches/LineageOS-14.1/android_kernel_lge_g3/{Overclock-4.patch => 0004-Overclock.patch} (100%) rename Patches/LineageOS-14.1/android_kernel_lge_hammerhead/{0001-OverUnderClock.patch => 0001-Overclock.patch} (100%) diff --git a/Patches/LineageOS-14.1/android_kernel_huawei_angler/0001-Overclock.patch b/Patches/LineageOS-14.1/android_kernel_huawei_angler/0001-Overclock.patch new file mode 100644 index 00000000..95b2e665 --- /dev/null +++ b/Patches/LineageOS-14.1/android_kernel_huawei_angler/0001-Overclock.patch @@ -0,0 +1,424 @@ +From e6fbf9568b5cfa91d9aa1006da1a799bd34f0c8f Mon Sep 17 00:00:00 2001 +From: flar2 +Date: Tue, 3 Nov 2015 23:24:01 -0500 +Subject: [PATCH] msm8994 overclocking + +--- + arch/arm/boot/dts/qcom/msm8994-regulator.dtsi | 172 +++++++++++++------------- + arch/arm/boot/dts/qcom/msm8994-v2.dtsi | 40 ++++-- + drivers/clk/qcom/clock-cpu-8994.c | 8 +- + 3 files changed, 122 insertions(+), 98 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi +index 93c9c647d9b..c245a55182f 100644 +--- a/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi +@@ -606,7 +606,7 @@ + regulator-name = "apc0_corner"; + qcom,cpr-fuse-corners = <4>; + regulator-min-microvolt = <1>; +- regulator-max-microvolt = <13>; ++ regulator-max-microvolt = <15>; + + qcom,cpr-voltage-ceiling = <900000 900000 1000000 1180000>; + qcom,cpr-voltage-floor = <700000 700000 780000 835000>; +@@ -666,17 +666,17 @@ + qcom,cpr-init-voltage-ref = <800000 900000 1000000 1225000>; + qcom,cpr-init-voltage-step = <10000>; + +- qcom,cpr-corner-map = <1 2 2 2 3 3 3 4 4 4 4 4 4>; ++ qcom,cpr-corner-map = <1 2 2 2 3 3 3 4 4 4 4 4 4 4 4>; + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 900000 900000 900000 900000 + 1000000 1000000 1000000 1115000 + 1115000 1180000 1180000 1180000 +- 1180000>; ++ 1180000 1180000 1180000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 700000 700000 700000 725000 + 780000 800000 825000 835000 + 850000 915000 970000 980000 +- 1000000>; ++ 1000000 1000000 1000000>; + + qcom,cpr-fuse-version-map = + <0xffffffff 0xffffffff 1 0 0 0 0>, +@@ -716,9 +716,11 @@ + <10 1248000000>, + <11 1344000000>, + <12 1478400000>, +- <13 1555200000>; ++ <13 1555200000>, ++ <14 1632000000>, ++ <15 1708800000>; + qcom,cpr-speed-bin-max-corners = +- <0xFFFFFFFF 0 1 4 7 13>; ++ <0xFFFFFFFF 0 1 4 7 15>; + qcom,cpr-enable; + }; + +@@ -730,7 +732,7 @@ + regulator-name = "apc1_corner"; + qcom,cpr-fuse-corners = <4>; + regulator-min-microvolt = <1>; +- regulator-max-microvolt = <17>; ++ regulator-max-microvolt = <19>; + + qcom,cpr-voltage-ceiling = <900000 900000 1000000 1225000>; + qcom,cpr-voltage-floor = <700000 700000 750000 835000>; +@@ -792,25 +794,25 @@ + qcom,cpr-init-voltage-ref = <900000 900000 1000000 1225000>; + qcom,cpr-init-voltage-step = <10000>; + +- qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4 4>; ++ qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4 4 4 4>; + qcom,cpr-voltage-ceiling-override = + <0 0 900000 900000 900000 900000 900000 + 1000000 1000000 1000000 1160000 1160000 + 1160000 1160000 1160000 1225000 1225000 +- 1225000 1225000>, ++ 1225000 1225000 1225000 1225000>, + <1 0 900000 900000 900000 900000 900000 + 1000000 1000000 1000000 1160000 1160000 + 1160000 1160000 1160000 1225000 1225000 +- 1225000 1225000>; ++ 1225000 1225000 1225000 1225000>; + qcom,cpr-voltage-floor-override = + <0 0 700000 700000 700000 700000 725000 + 750000 775000 795000 835000 860000 + 880000 895000 915000 935000 945000 +- 950000 980000>, ++ 950000 980000 980000 980000>, + <1 0 700000 700000 700000 700000 725000 + 750000 775000 795000 835000 860000 + 880000 895000 915000 935000 945000 +- 950000 980000>; ++ 950000 980000 980000 980000>; + + qcom,cpr-fuse-version-map = + <0 0xffffffff 1 6 6 6 6>, +@@ -848,90 +850,90 @@ + qcom,cpr-cpus = <&CPU4 &CPU5 &CPU6 &CPU7>; + qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment = + /* 1st fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 2nd fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 3rd fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 4th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 5th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 6th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 7th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */ + qcom,cpr-online-cpu-virtual-corner-quotient-adjustment = + /* 1st fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6) (-6) (-6)>, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 2nd fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6) (-6) (-6)>, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 3rd fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 4th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 5th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 6th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */ + /* 7th fuse version tuple matched */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */ +- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */ +- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ +- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */ ++ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */ ++ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */ + + qcom,cpr-online-cpu-init-voltage-as-ceiling; + qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>; +@@ -953,9 +955,11 @@ + <14 1728000000>, + <15 1766400000>, + <16 1824000000>, +- <17 1958400000>; ++ <17 1958400000>, ++ <18 2016000000>, ++ <19 2054400000>; + qcom,cpr-speed-bin-max-corners = +- <0 0 1 5 8 17>, ++ <0 0 1 5 8 19>, + <1 0 1 5 8 15>; + qcom,cpr-enable; + }; +diff --git a/arch/arm/boot/dts/qcom/msm8994-v2.dtsi b/arch/arm/boot/dts/qcom/msm8994-v2.dtsi +index add83045413..3fea4251dfc 100644 +--- a/arch/arm/boot/dts/qcom/msm8994-v2.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8994-v2.dtsi +@@ -83,7 +83,9 @@ + < 1248000000 10>, + < 1344000000 11>, + < 1478400000 12>, +- < 1555200000 13>; ++ < 1555200000 13>, ++ < 1632000000 14>, ++ < 1708800000 15>; + qcom,a57-speedbin0-v0 = + < 0 0>, + < 384000000 5>, +@@ -99,7 +101,9 @@ + < 1632000000 13>, + < 1728000000 14>, + < 1824000000 16>, +- < 1958400000 17>; ++ < 1958400000 17>, ++ < 2016000000 18>, ++ < 2054400000 19>; + qcom,a57-speedbin1-v0 = + < 0 0>, + < 384000000 5>, +@@ -146,7 +150,9 @@ + < 1248000 >, + < 1344000 >, + < 1478400 >, +- < 1555200 >; ++ < 1555200 >, ++ < 1632000 >, ++ < 1708800 >; + + qcom,cpufreq-table-4 = + < 384000 >, +@@ -162,7 +168,9 @@ + < 1632000 >, + < 1728000 >, + < 1824000 >, +- < 1958400 >; ++ < 1958400 >, ++ < 2016000 >, ++ < 2054400 >; + }; + + &devfreq_cpufreq { +@@ -178,7 +186,9 @@ + < 1248000 7904 >, + < 1344000 9887 >, + < 1478400 11863 >, +- < 1555200 11863 >; ++ < 1555200 11863 >, ++ < 1632000 11863 >, ++ < 1708800 11863 >; + cpu-to-dev-map-4 = + < 384000 1525 >, + < 480000 2288 >, +@@ -193,7 +203,9 @@ + < 1632000 9887 >, + < 1728000 9887 >, + < 1824000 11863 >, +- < 1958400 11863 >; ++ < 1958400 11863 >, ++ < 2016000 11863 >, ++ < 2054400 11863 >; + }; + + mincpubw-cpufreq { +@@ -209,7 +221,9 @@ + < 1248000 1525 >, + < 1344000 1525 >, + < 1478400 1525 >, +- < 1555200 1525 >; ++ < 1555200 1525 >, ++ < 1632000 1525 >, ++ < 1708800 1525 >; + cpu-to-dev-map-4 = + < 384000 1525 >, + < 480000 1525 >, +@@ -224,7 +238,9 @@ + < 1632000 1525 >, + < 1728000 1525 >, + < 1824000 1525 >, +- < 1958400 7904 >; ++ < 1958400 7904 >, ++ < 2016000 7904 >, ++ < 2054400 7904 >; + }; + + cci-cpufreq { +@@ -239,7 +255,9 @@ + < 1248000 729600 >, + < 1344000 787200 >, + < 1478400 787200 >, +- < 1555200 787200 >; ++ < 1555200 787200 >, ++ < 1632000 787200 >, ++ < 1708800 787200 >; + cpu-to-dev-map-4 = + < 384000 300000 >, + < 480000 300000 >, +@@ -254,7 +272,9 @@ + < 1632000 787200 >, + < 1728000 787200 >, + < 1824000 787200 >, +- < 1958400 787200 >; ++ < 1958400 787200 >, ++ < 2016000 787200 >, ++ < 2054400 787200 >; + }; + }; + +diff --git a/drivers/clk/qcom/clock-cpu-8994.c b/drivers/clk/qcom/clock-cpu-8994.c +index 7928f2ec0ca..351a66d4469 100644 +--- a/drivers/clk/qcom/clock-cpu-8994.c ++++ b/drivers/clk/qcom/clock-cpu-8994.c +@@ -191,13 +191,13 @@ static struct pll_clk a57_pll0 = { + .test_ctl_lo_val = 0x00010000, + }, + .min_rate = 1209600000, +- .max_rate = 1996800000, ++ .max_rate = 2073600000, + .base = &vbases[C1_PLL_BASE], + .c = { + .parent = &xo_ao.c, + .dbg_name = "a57_pll0", + .ops = &clk_ops_variable_rate_pll, +- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000), ++ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000), + CLK_INIT(a57_pll0.c), + }, + }; +@@ -229,13 +229,13 @@ static struct pll_clk a57_pll1 = { + /* Necessary since we'll be setting a rate before handoff on V1 */ + .src_rate = 19200000, + .min_rate = 1209600000, +- .max_rate = 1996800000, ++ .max_rate = 2073600000, + .base = &vbases[C1_PLL_BASE], + .c = { + .parent = &xo_ao.c, + .dbg_name = "a57_pll1", + .ops = &clk_ops_variable_rate_pll, +- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000), ++ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000), + CLK_INIT(a57_pll1.c), + }, + }; diff --git a/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0001-Overclock.patch b/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0001-Overclock.patch new file mode 100644 index 00000000..ef535c0c --- /dev/null +++ b/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0001-Overclock.patch @@ -0,0 +1,307 @@ +From df33b6042093a177e2ef593f2d271dd33e1e251c Mon Sep 17 00:00:00 2001 +From: flar2 +Date: Tue, 3 Nov 2015 21:21:34 -0500 +Subject: [PATCH] msm8992 initial overclocking + +--- + arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 30 ++++++++++++-------- + arch/arm/boot/dts/qcom/msm8992.dtsi | 40 +++++++++++++++++++------- + drivers/clk/qcom/clock-cpu-8994.c | 8 +++--- + drivers/cpufreq/qcom-cpufreq.c | 41 +++++++++++++++++++++++++++ + 4 files changed, 93 insertions(+), 26 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +index d5f68601759..23b23ba4e1a 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +@@ -605,7 +605,7 @@ + regulator-name = "apc0_corner"; + qcom,cpr-fuse-corners = <4>; + regulator-min-microvolt = <1>; +- regulator-max-microvolt = <10>; ++ regulator-max-microvolt = <12>; + + qcom,cpr-voltage-ceiling = <900000 900000 1000000 1180000>; + qcom,cpr-voltage-floor = <640000 700000 800000 850000>; +@@ -669,15 +669,15 @@ + qcom,cpr-init-voltage-ref = <900000 900000 1000000 1230000>; + qcom,cpr-init-voltage-step = <10000>; + +- qcom,cpr-corner-map = <1 1 2 2 3 3 4 4 4 4>; ++ qcom,cpr-corner-map = <1 1 2 2 3 3 4 4 4 4 4 4>; + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 800000 800000 900000 900000 + 1000000 1000000 1115000 1115000 +- 1180000 1180000>; ++ 1180000 1180000 1180000 1180000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 655000 700000 735000 + 800000 835000 850000 875000 +- 950000 1000000>; ++ 950000 1000000 1000000 1000000>; + qcom,cpr-fuse-version-map = + <0 0xffffffff 0 0 0 0 0>, + <0 0xffffffff 1 0 0 0 0>, +@@ -759,10 +759,12 @@ + <7 864000000>, + <8 960000000>, + <9 1248000000>, +- <10 1440000000>; ++ <10 1440000000>, ++ <11 1536000000>, ++ <12 1632000000>; + qcom,cpr-speed-bin-max-corners = + <0 0 2 4 6 9>, +- <1 0 2 4 6 10>; ++ <1 0 2 4 6 12>; + qcom,cpr-enable; + }; + +@@ -774,7 +776,7 @@ + regulator-name = "apc1_corner"; + qcom,cpr-fuse-corners = <4>; + regulator-min-microvolt = <1>; +- regulator-max-microvolt = <15>; ++ regulator-max-microvolt = <17>; + + qcom,cpr-voltage-ceiling = <900000 900000 1000000 1180000>; + qcom,cpr-voltage-floor = <640000 640000 745000 850000>; +@@ -841,17 +843,19 @@ + qcom,cpr-init-voltage-ref = <900000 900000 1000000 1230000>; + qcom,cpr-init-voltage-step = <10000>; + +- qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4>; ++ qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4 4>; + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 900000 900000 900000 900000 + 900000 1000000 1000000 1000000 + 1115000 1115000 1115000 1115000 +- 1115000 1115000 1180000>; ++ 1115000 1115000 1180000 1180000 ++ 1180000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 640000 665000 690000 + 735000 745000 770000 785000 + 850000 860000 880000 900000 +- 920000 935000 1000000>; ++ 920000 935000 1000000 1000000 ++ 1000000>; + qcom,cpr-fuse-version-map = + <0xffffffff 0xffffffff 0 4 4 4 4>, + <0xffffffff 0xffffffff 1 4 4 4 4>, +@@ -908,9 +912,11 @@ + <12 1536000000>, + <13 1632000000>, + <14 1689600000>, +- <15 1824000000>; ++ <15 1824000000>, ++ <16 1958400000>, ++ <17 2016000000>; + qcom,cpr-speed-bin-max-corners = +- <0xFFFFFFFF 0 1 5 8 15>; ++ <0xFFFFFFFF 0 1 5 8 17>; + qcom,cpr-enable; + }; + +diff --git a/arch/arm/boot/dts/qcom/msm8992.dtsi b/arch/arm/boot/dts/qcom/msm8992.dtsi +index 5ba420c5b9c..8892b569694 100644 +--- a/arch/arm/boot/dts/qcom/msm8992.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992.dtsi +@@ -852,7 +852,9 @@ + < 787200 3509 >, + < 864000 4173 >, + < 960000 5271 >, +- < 1440000 7102 >; ++ < 1440000 7102 >, ++ < 1536000 7102 >, ++ < 1632000 7102 >; + cpu-to-dev-map-4 = + < 384000 1525 >, + < 633600 2288 >, +@@ -860,16 +862,22 @@ + < 864000 4173 >, + < 960000 5271 >, + < 1344000 5928 >, +- < 1824000 7102 >; ++ < 1824000 7102 >, ++ < 1958400 7102 >, ++ < 2016000 7102 >; + }; + + mincpubw-cpufreq { + target-dev = <&mincpubw>; + cpu-to-dev-map-0 = +- < 1440000 1525 >; ++ < 1440000 1525 >, ++ < 1536000 1525 >, ++ < 1632000 1525 >; + cpu-to-dev-map-4 = + < 1689600 1525 >, +- < 1824000 5928 >; ++ < 1824000 1525 >, ++ < 1958400 1525 >, ++ < 2016000 5928 >; + }; + + cci-cpufreq { +@@ -880,7 +888,9 @@ + < 787200 384000 >, + < 864000 556800 >, + < 960000 729600 >, +- < 1440000 787200 >; ++ < 1440000 787200 >, ++ < 1536000 787200 >, ++ < 1632000 787200 >; + cpu-to-dev-map-4 = + < 384000 134400 >, + < 480000 300000 >, +@@ -888,7 +898,9 @@ + < 768000 556800 >, + < 960000 600000 >, + < 1440000 729600 >, +- < 1824000 787200 >; ++ < 1824000 787200 >, ++ < 1958400 787200 >, ++ < 2016000 787200 >; + }; + }; + +@@ -915,7 +927,9 @@ + < 864000 >, + < 960000 >, + < 1248000 >, +- < 1440000 >; ++ < 1440000 >, ++ < 1536000 >, ++ < 1632000 >; + + qcom,cpufreq-table-4 = + < 384000 >, +@@ -930,7 +944,9 @@ + < 1536000 >, + < 1632000 >, + < 1689600 >, +- < 1824000 >; ++ < 1824000 >, ++ < 1958400 >, ++ < 2016000 >; + + }; + +@@ -968,7 +984,9 @@ + < 864000000 7>, + < 960000000 8>, + < 1248000000 9>, +- < 1440000000 10>; ++ < 1440000000 10>, ++ < 1536000000 11>, ++ < 1632000000 12>; + qcom,a57-speedbin0-v0 = + < 0 0>, + < 384000000 5>, +@@ -983,7 +1001,9 @@ + < 1536000000 12>, + < 1632000000 13>, + < 1689600000 14>, +- < 1824000000 15>; ++ < 1824000000 15>, ++ < 1958400000 16>, ++ < 2016000000 17>; + qcom,cci-speedbin0-v0 = + < 0 0>, + < 134400000 2>, +diff --git a/drivers/clk/qcom/clock-cpu-8994.c b/drivers/clk/qcom/clock-cpu-8994.c +index 7928f2ec0ca..351a66d4469 100644 +--- a/drivers/clk/qcom/clock-cpu-8994.c ++++ b/drivers/clk/qcom/clock-cpu-8994.c +@@ -191,13 +191,13 @@ static struct pll_clk a57_pll0 = { + .test_ctl_lo_val = 0x00010000, + }, + .min_rate = 1209600000, +- .max_rate = 1996800000, ++ .max_rate = 2073600000, + .base = &vbases[C1_PLL_BASE], + .c = { + .parent = &xo_ao.c, + .dbg_name = "a57_pll0", + .ops = &clk_ops_variable_rate_pll, +- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000), ++ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000), + CLK_INIT(a57_pll0.c), + }, + }; +@@ -229,13 +229,13 @@ static struct pll_clk a57_pll1 = { + /* Necessary since we'll be setting a rate before handoff on V1 */ + .src_rate = 19200000, + .min_rate = 1209600000, +- .max_rate = 1996800000, ++ .max_rate = 2073600000, + .base = &vbases[C1_PLL_BASE], + .c = { + .parent = &xo_ao.c, + .dbg_name = "a57_pll1", + .ops = &clk_ops_variable_rate_pll, +- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000), ++ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000), + CLK_INIT(a57_pll1.c), + }, + }; +diff --git a/drivers/cpufreq/qcom-cpufreq.c b/drivers/cpufreq/qcom-cpufreq.c +index e30b0cb7483..dd3a5898597 100644 +--- a/drivers/cpufreq/qcom-cpufreq.c ++++ b/drivers/cpufreq/qcom-cpufreq.c +@@ -31,6 +31,40 @@ + + static DEFINE_MUTEX(l2bw_lock); + ++static unsigned long arg_cpu_max_a53 = 1440000; ++ ++static int __init cpufreq_read_cpu_max_a53(char *cpu_max_a53) ++{ ++ unsigned long ui_khz; ++ int ret; ++ ++ ret = kstrtoul(cpu_max_a53, 0, &ui_khz); ++ if (ret) ++ return -EINVAL; ++ ++ arg_cpu_max_a53 = ui_khz; ++ printk("cpu_max_a53=%lu\n", arg_cpu_max_a53); ++ return ret; ++} ++__setup("cpu_max_a53=", cpufreq_read_cpu_max_a53); ++ ++static unsigned long arg_cpu_max_a57 = 1824000; ++ ++static int __init cpufreq_read_cpu_max_a57(char *cpu_max_a57) ++{ ++ unsigned long ui_khz; ++ int ret; ++ ++ ret = kstrtoul(cpu_max_a57, 0, &ui_khz); ++ if (ret) ++ return -EINVAL; ++ ++ arg_cpu_max_a57 = ui_khz; ++ printk("cpu_max_a57=%lu\n", arg_cpu_max_a57); ++ return ret; ++} ++__setup("cpu_max_a57=", cpufreq_read_cpu_max_a57); ++ + static struct clk *cpu_clk[NR_CPUS]; + static struct clk *l2_clk; + static DEFINE_PER_CPU(struct cpufreq_frequency_table *, freq_table); +@@ -364,6 +398,13 @@ static struct cpufreq_frequency_table *cpufreq_parse_dt(struct device *dev, + if (i > 0 && f <= ftbl[i-1].frequency) + break; + ++ //Custom max freq ++ if ((cpu < 4 && f > arg_cpu_max_a53) || ++ (cpu >= 4 && f > arg_cpu_max_a57)) { ++ nf = i; ++ break; ++ } ++ + ftbl[i].driver_data = i; + ftbl[i].frequency = f; + } diff --git a/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0002-Overclock.patch b/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0002-Overclock.patch new file mode 100644 index 00000000..6a8962a8 --- /dev/null +++ b/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0002-Overclock.patch @@ -0,0 +1,47 @@ +From a7d2988f5ec81cd5e456eddba110d0ef1f809e50 Mon Sep 17 00:00:00 2001 +From: Dan Sneddon +Date: Fri, 27 Mar 2015 16:02:02 -0600 +Subject: [PATCH] ARM: dts: msm: Adjust SPDM params on 8992 + +The current SPDM parameters cause a power increase +on 8992. This patch adjusts those parameters to +eliminate the negative power impact. + +Change-Id: Ibdfaaf4cb50c346b6433a4a7dc910713bce8125f +Signed-off-by: Dan Sneddon +--- + arch/arm/boot/dts/qcom/msm8992-bus.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-bus.dtsi b/arch/arm/boot/dts/qcom/msm8992-bus.dtsi +index 3efc2047d4a..e7b83cc11c0 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-bus.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-bus.dtsi +@@ -1516,8 +1516,8 @@ + clocks = <&clock_cpu clk_cci_clk>; + + qcom,bw-upstep = <1000>; +- qcom,bw-dwnstep = <1000>; +- qcom,max-vote = <10000>; ++ qcom,bw-dwnstep = <5000>; ++ qcom,max-vote = <5000>; + qcom,up-step-multp = <2>; + qcom,spdm-interval = <100>; + +@@ -1527,14 +1527,14 @@ + qcom,bucket-size = <8>; + + /*max pl1 freq, max pl2 freq*/ +- qcom,pl-freqs = <140000000 160000000>; ++ qcom,pl-freqs = <280000000 350000000>; + + /* pl1 low, pl1 high, pl2 low, pl2 high, pl3 low, pl3 high */ + qcom,reject-rate = <5000 5000 5000 5000 5000 5000>; + /* pl1 low, pl1 high, pl2 low, pl2 high, pl3 low, pl3 high */ + qcom,response-time-us = <10000 10000 10000 10000 3000 3000>; + /* pl1 low, pl1 high, pl2 low, pl2 high, pl3 low, pl3 high */ +- qcom,cci-response-time-us = <10000 10000 10000 10000 1000 1000>; ++ qcom,cci-response-time-us = <10000 10000 10000 10000 3000 3000>; + qcom,max-cci-freq = <787000000>; + }; + diff --git a/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0003-Overclock.patch b/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0003-Overclock.patch new file mode 100644 index 00000000..22f94e48 --- /dev/null +++ b/Patches/LineageOS-14.1/android_kernel_lge_bullhead/0003-Overclock.patch @@ -0,0 +1,43 @@ +From a288adcbf6ed14fccaa7726159b01eb9fcd74dc7 Mon Sep 17 00:00:00 2001 +From: flar2 +Date: Mon, 21 Nov 2016 21:40:09 -0500 +Subject: [PATCH] msm8992: bump oc voltages + +--- + arch/arm/boot/dts/qcom/msm8992-regulator.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +index 23b23ba4e1a..19a3c1ca720 100644 +--- a/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi ++++ b/arch/arm/boot/dts/qcom/msm8992-regulator.dtsi +@@ -673,11 +673,11 @@ + qcom,cpr-voltage-ceiling-override = + <0xFFFFFFFF 0 800000 800000 900000 900000 + 1000000 1000000 1115000 1115000 +- 1180000 1180000 1180000 1180000>; ++ 1180000 1180000 1180000 1200000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 655000 700000 735000 + 800000 835000 850000 875000 +- 950000 1000000 1000000 1000000>; ++ 950000 1000000 1000000 1100000>; + qcom,cpr-fuse-version-map = + <0 0xffffffff 0 0 0 0 0>, + <0 0xffffffff 1 0 0 0 0>, +@@ -849,13 +849,13 @@ + 900000 1000000 1000000 1000000 + 1115000 1115000 1115000 1115000 + 1115000 1115000 1180000 1180000 +- 1180000>; ++ 1200000>; + qcom,cpr-voltage-floor-override = + <0xFFFFFFFF 0 640000 640000 665000 690000 + 735000 745000 770000 785000 + 850000 860000 880000 900000 + 920000 935000 1000000 1000000 +- 1000000>; ++ 1100000>; + qcom,cpr-fuse-version-map = + <0xffffffff 0xffffffff 0 4 4 4 4>, + <0xffffffff 0xffffffff 1 4 4 4 4>, diff --git a/Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-1.patch b/Patches/LineageOS-14.1/android_kernel_lge_g3/0001-Overclock.patch similarity index 100% rename from Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-1.patch rename to Patches/LineageOS-14.1/android_kernel_lge_g3/0001-Overclock.patch diff --git a/Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-2.patch b/Patches/LineageOS-14.1/android_kernel_lge_g3/0002-Overclock.patch similarity index 100% rename from Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-2.patch rename to Patches/LineageOS-14.1/android_kernel_lge_g3/0002-Overclock.patch diff --git a/Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-3.patch b/Patches/LineageOS-14.1/android_kernel_lge_g3/0003-Overclock.patch similarity index 100% rename from Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-3.patch rename to Patches/LineageOS-14.1/android_kernel_lge_g3/0003-Overclock.patch diff --git a/Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-4.patch b/Patches/LineageOS-14.1/android_kernel_lge_g3/0004-Overclock.patch similarity index 100% rename from Patches/LineageOS-14.1/android_kernel_lge_g3/Overclock-4.patch rename to Patches/LineageOS-14.1/android_kernel_lge_g3/0004-Overclock.patch diff --git a/Patches/LineageOS-14.1/android_kernel_lge_hammerhead/0001-OverUnderClock.patch b/Patches/LineageOS-14.1/android_kernel_lge_hammerhead/0001-Overclock.patch similarity index 100% rename from Patches/LineageOS-14.1/android_kernel_lge_hammerhead/0001-OverUnderClock.patch rename to Patches/LineageOS-14.1/android_kernel_lge_hammerhead/0001-Overclock.patch diff --git a/Scripts/LineageOS-14.1/Overclock.sh b/Scripts/LineageOS-14.1/Overclock.sh index 636eeaf6..5a7bbb14 100644 --- a/Scripts/LineageOS-14.1/Overclock.sh +++ b/Scripts/LineageOS-14.1/Overclock.sh @@ -20,14 +20,22 @@ echo "Applying overclocks..." +enter "kernel/huawei/msm8994" +patch -p1 < $patches"android_kernel_huawei_msm8994/0001-Overclock.patch" + +enter "kernel/lge/bullhead" +patch -p1 < $patches"android_kernel_lge_bullhead/0001-Overclock.patch" +patch -p1 < $patches"android_kernel_lge_bullhead/0002-Overclock.patch" +patch -p1 < $patches"android_kernel_lge_bullhead/0003-Overclock.patch" + enter "kernel/lge/g3" -patch -p1 < $patches"android_kernel_lge_g3/Overclock-1.patch" #2.45Ghz -> 2.76Ghz =+1.24Ghz -patch -p1 < $patches"android_kernel_lge_g3/Overclock-2.patch" -patch -p1 < $patches"android_kernel_lge_g3/Overclock-3.patch" -patch -p1 < $patches"android_kernel_lge_g3/Overclock-4.patch" +patch -p1 < $patches"android_kernel_lge_g3/0001-Overclock.patch" #2.45Ghz -> 2.76Ghz =+1.24Ghz +patch -p1 < $patches"android_kernel_lge_g3/0002-Overclock.patch" +patch -p1 < $patches"android_kernel_lge_g3/0003-Overclock.patch" +patch -p1 < $patches"android_kernel_lge_g3/0004-Overclock.patch" enter "kernel/lge/hammerhead" -patch -p1 < $patches"android_kernel_lge_hammerhead/0001-OverUnderClock.patch" #2.26Ghz -> 2.95Ghz =+2.76Ghz XXX: Untested! +patch -p1 < $patches"android_kernel_lge_hammerhead/0001-Overclock.patch" #2.26Ghz -> 2.95Ghz =+2.76Ghz XXX: Untested! #enter "kernel/lge/mako" #patch -p1 < $patches"android_kernel_lge_mako/0001-OverUnderClock.patch" #384Mhz -> 81Mhz, 1.51Ghz -> 1.94Ghz =+1.72Ghz XXX: Disabled due to excessive thermal throttling