diff --git a/Patches/LineageOS-19.1/android_frameworks_base/0014-Automatic_Reboot.patch b/Patches/LineageOS-19.1/android_frameworks_base/0014-Automatic_Reboot.patch
index 5b8c3e8e..4e00deb2 100644
--- a/Patches/LineageOS-19.1/android_frameworks_base/0014-Automatic_Reboot.patch
+++ b/Patches/LineageOS-19.1/android_frameworks_base/0014-Automatic_Reboot.patch
@@ -57,7 +57,7 @@ index 5797aa01bfc0..cd3e8b391982 100644
diff --git a/packages/SystemUI/src/com/android/systemui/keyguard/KeyguardViewMediator.java b/packages/SystemUI/src/com/android/systemui/keyguard/KeyguardViewMediator.java
-index 532f071132fc..bb78b6cd6eee 100644
+index 1eba4cc4d16a..d267e40cfce7 100644
--- a/packages/SystemUI/src/com/android/systemui/keyguard/KeyguardViewMediator.java
+++ b/packages/SystemUI/src/com/android/systemui/keyguard/KeyguardViewMediator.java
@@ -186,6 +186,8 @@ public class KeyguardViewMediator extends SystemUI implements Dumpable,
@@ -143,7 +143,7 @@ index 532f071132fc..bb78b6cd6eee 100644
}
}
};
-@@ -2365,6 +2399,7 @@ public class KeyguardViewMediator extends SystemUI implements Dumpable,
+@@ -2367,6 +2401,7 @@ public class KeyguardViewMediator extends SystemUI implements Dumpable,
mHideAnimationRun = false;
adjustStatusBarLocked();
sendUserPresentBroadcast();
diff --git a/Patches/LineageOS-19.1/android_kernel_oneplus_sdm845/4.9.282-qc.patch b/Patches/LineageOS-19.1/android_kernel_oneplus_sdm845/4.9.282-qc.patch
new file mode 100644
index 00000000..f56356ed
--- /dev/null
+++ b/Patches/LineageOS-19.1/android_kernel_oneplus_sdm845/4.9.282-qc.patch
@@ -0,0 +1,124841 @@
+From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
+From: Tad
+Date: Wed, 6 Apr 2022 20:15:35 -0400
+Subject: [PATCH] Merge remote-tracking branch 'qc/msm-4.9' into HEAD
+
+Signed-off-by: Tad
+Change-Id: Ie4ee3fa1a2c9d22acdcb19f4d07e068ef4388513
+---
+ Documentation/ABI/testing/sysfs-bus-iio | 3 +-
+ Documentation/DocBook/libata.tmpl | 2 +-
+ .../devicetree/bindings/arm/msm/msm.txt | 6 +
+ .../display/mediatek/mediatek,dpi.txt | 6 +
+ .../devicetree/bindings/input/hall_sensor.txt | 36 +
+ .../devicetree/bindings/input/misc/bma2x2.txt | 61 +
+ .../devicetree/bindings/input/misc/ltr553.txt | 67 +
+ .../devicetree/bindings/leds/leds-aw2013.txt | 75 +
+ .../devicetree/bindings/net/nfc/nxp-nci.txt | 2 +-
+ .../devicetree/bindings/net/nfc/pn544.txt | 2 +-
+ .../devicetree/bindings/pci/msm_ep_pcie.txt | 1 +
+ .../devicetree/bindings/sound/wm8994.txt | 18 +-
+ .../devicetree/bindings/spi/spi_qsd.txt | 8 +-
+ .../devicetree/bindings/vendor-prefixes.txt | 1 +
+ Documentation/filesystems/affs.txt | 16 +-
+ .../filesystems/mandatory-locking.txt | 10 +
+ Documentation/kernel-parameters.txt | 15 +
+ .../media/uapi/dvb/fe-get-property.rst | 7 +-
+ Documentation/networking/ip-sysctl.txt | 10 +
+ Documentation/sphinx/parse-headers.pl | 2 +-
+ Documentation/target/tcm_mod_builder.py | 2 +-
+ Documentation/trace/postprocess/decode_msr.py | 2 +-
+ .../trace-pagealloc-postprocess.pl | 2 +-
+ .../postprocess/trace-vmscan-postprocess.pl | 2 +-
+ Documentation/virtual/kvm/api.txt | 2 +
+ Makefile | 50 +-
+ arch/alpha/include/asm/io.h | 8 +-
+ arch/alpha/include/asm/uaccess.h | 67 +-
+ arch/alpha/kernel/smp.c | 2 +-
+ arch/alpha/lib/Makefile | 33 +-
+ arch/alpha/lib/clear_user.S | 66 +-
+ arch/alpha/lib/copy_user.S | 82 +-
+ arch/alpha/lib/ev6-clear_user.S | 84 +-
+ arch/alpha/lib/ev6-copy_user.S | 104 +-
+ arch/arc/Makefile | 1 +
+ arch/arc/include/asm/elf.h | 2 +-
+ arch/arc/include/asm/page.h | 1 +
+ arch/arc/kernel/entry.S | 4 +-
+ arch/arc/kernel/signal.c | 4 +-
+ arch/arc/kernel/stacktrace.c | 30 +-
+ arch/arc/kernel/vmlinux.lds.S | 2 +
+ arch/arc/plat-eznps/include/plat/ctop.h | 1 -
+ arch/arm/Kconfig | 9 +-
+ arch/arm/Makefile | 6 +-
+ arch/arm/boot/compressed/head.S | 4 +-
+ arch/arm/boot/dts/am335x-cm-t335.dts | 2 +-
+ arch/arm/boot/dts/am43x-epos-evm.dts | 2 +-
+ arch/arm/boot/dts/at91-sama5d3_xplained.dts | 7 +
+ arch/arm/boot/dts/at91-sama5d4_xplained.dts | 7 +
+ arch/arm/boot/dts/at91sam9rl.dtsi | 19 +-
+ arch/arm/boot/dts/bcm63138.dtsi | 2 +-
+ arch/arm/boot/dts/bcm7445-bcm97445svmb.dts | 4 +-
+ arch/arm/boot/dts/bcm7445.dtsi | 2 +-
+ arch/arm/boot/dts/bcm963138dvt.dts | 4 +-
+ arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 +-
+ arch/arm/boot/dts/exynos5250-snow-common.dtsi | 2 +-
+ arch/arm/boot/dts/exynos5250-spring.dts | 2 +-
+ arch/arm/boot/dts/exynos5410-odroidxu.dts | 6 +-
+ arch/arm/boot/dts/exynos5410-pinctrl.dtsi | 28 +
+ arch/arm/boot/dts/exynos5410.dtsi | 4 +
+ arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 +-
+ arch/arm/boot/dts/exynos5422-odroidxu4.dts | 2 +-
+ .../boot/dts/exynos54xx-odroidxu-leds.dtsi | 4 +-
+ arch/arm/boot/dts/imx50-evk.dts | 2 +-
+ arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 5 +-
+ arch/arm/boot/dts/imx6qdl-udoo.dtsi | 2 +-
+ arch/arm/boot/dts/lpc32xx.dtsi | 3 -
+ arch/arm/boot/dts/omap3.dtsi | 3 +
+ arch/arm/boot/dts/omap4.dtsi | 5 +
+ arch/arm/boot/dts/omap443x.dtsi | 2 +
+ arch/arm/boot/dts/omap5.dtsi | 5 +
+ arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 4 +
+ arch/arm/boot/dts/qcom/pmxpoorwills.dtsi | 40 +-
+ .../boot/dts/qcom/sa415m-ccard-pcie-ep.dts | 6 +
+ .../arm/boot/dts/qcom/sa415m-ccard-usb-ep.dts | 4 +
+ arch/arm/boot/dts/qcom/sa415m-ccard.dtsi | 2 -
+ arch/arm/boot/dts/qcom/sa415m-ttp-pcie-ep.dts | 8 +-
+ arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dtsi | 4 +-
+ arch/arm/boot/dts/qcom/sdxpoorwills-pm.dtsi | 3 +-
+ arch/arm/boot/dts/qcom/sdxpoorwills.dtsi | 6 +-
+ arch/arm/boot/dts/r8a7779-marzen.dts | 2 +-
+ arch/arm/boot/dts/r8a7779.dtsi | 1 +
+ arch/arm/boot/dts/rk3036-kylin.dts | 2 +-
+ arch/arm/boot/dts/rk3288.dtsi | 10 +-
+ arch/arm/boot/dts/s5pv210.dtsi | 127 +-
+ arch/arm/boot/dts/sama5d4.dtsi | 2 +-
+ arch/arm/boot/dts/socfpga.dtsi | 2 +-
+ arch/arm/boot/dts/socfpga_arria10.dtsi | 4 +-
+ arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 4 +-
+ arch/arm/boot/dts/stm32f429.dtsi | 2 +-
+ arch/arm/boot/dts/sun4i-a10.dtsi | 2 +-
+ arch/arm/boot/dts/versatile-ab.dts | 5 +-
+ arch/arm/boot/dts/versatile-pb.dts | 2 +-
+ arch/arm/configs/msm8909-perf_defconfig | 39 +-
+ arch/arm/configs/msm8909_defconfig | 38 +-
+ arch/arm/configs/msm8937go-perf_defconfig | 75 +-
+ arch/arm/configs/msm8937go_defconfig | 13 +-
+ arch/arm/configs/sa415m-perf_defconfig | 1 -
+ arch/arm/configs/sa415m_defconfig | 1 -
+ arch/arm/configs/sdm670-perf_defconfig | 6 +
+ .../configs/vendor/msm8909go-perf_defconfig | 555 +++++++
+ arch/arm/configs/vendor/msm8909go_defconfig | 596 +++++++
+ arch/arm/include/asm/percpu.h | 2 +
+ arch/arm/include/asm/unified.h | 77 +-
+ arch/arm/kernel/head.S | 6 +-
+ arch/arm/kernel/hw_breakpoint.c | 123 +-
+ arch/arm/kernel/ptrace.c | 4 +-
+ arch/arm/kernel/setup.c | 16 +-
+ arch/arm/kernel/signal.c | 14 +-
+ arch/arm/kernel/stacktrace.c | 24 +
+ arch/arm/kvm/mmu.c | 8 +-
+ arch/arm/mach-at91/pm.c | 11 +-
+ arch/arm/mach-footbridge/dc21285.c | 12 +-
+ arch/arm/mach-imx/pm-imx5.c | 6 +-
+ arch/arm/mach-imx/pm-imx6.c | 10 +-
+ arch/arm/mach-imx/suspend-imx53.S | 4 +-
+ arch/arm/mach-imx/suspend-imx6.S | 1 +
+ arch/arm/mach-integrator/Kconfig | 7 +-
+ arch/arm/mach-keystone/keystone.c | 4 +-
+ arch/arm/mach-omap2/board-n8x0.c | 2 +-
+ arch/arm/mach-omap2/omap_device.c | 8 +-
+ arch/arm/mach-socfpga/pm.c | 8 +-
+ arch/arm/mach-tegra/tegra.c | 4 +-
+ arch/arm/mm/cache-l2x0.c | 16 +-
+ arch/arm/mm/proc-macros.S | 3 +-
+ arch/arm/plat-samsung/Kconfig | 1 +
+ arch/arm/probes/kprobes/core.c | 6 +
+ arch/arm/probes/kprobes/test-thumb.c | 10 +-
+ arch/arm/probes/uprobes/core.c | 4 +-
+ arch/arm/xen/p2m.c | 33 +-
+ arch/arm64/Kconfig.platforms | 1 +
+ arch/arm64/boot/dts/arm/juno-base.dtsi | 6 +-
+ .../boot/dts/exynos/exynos7-espresso.dts | 3 +-
+ arch/arm64/boot/dts/exynos/exynos7.dtsi | 4 +-
+ .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
+ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 +-
+ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
+ arch/arm64/boot/dts/qcom/Makefile | 10 +-
+ .../batterydata-qrd-skue-4v35-2000mah.dtsi | 121 ++
+ ...si-panel-arglass-boe-dual-1080p-video.dtsi | 99 ++
+ .../qcom/dsi-panel-hx8379c-fwvga-video.dtsi | 90 +
+ ...en3-batterydata-goertek-merlin-230mah.dtsi | 80 +
+ arch/arm64/boot/dts/qcom/msm-gdsc-sdm845.dtsi | 3 +-
+ .../arm64/boot/dts/qcom/msm8905-qrd-skub.dtsi | 18 +-
+ .../boot/dts/qcom/msm8909-1gb-qrd-skue.dts | 20 +
+ .../dts/qcom/msm8909-camera-sensor-skue.dtsi | 129 ++
+ .../boot/dts/qcom/msm8909-coresight.dtsi | 30 +-
+ .../boot/dts/qcom/msm8909-mdss-panels.dtsi | 1 +
+ arch/arm64/boot/dts/qcom/msm8909-pm8909.dtsi | 4 -
+ .../arm64/boot/dts/qcom/msm8909-qrd-skue.dtsi | 490 ++++++
+ arch/arm64/boot/dts/qcom/msm8909-qrd.dtsi | 9 +
+ arch/arm64/boot/dts/qcom/msm8909-vidc.dtsi | 4 +-
+ arch/arm64/boot/dts/qcom/msm8909.dtsi | 10 +
+ arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 12 +-
+ arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 +-
+ .../qcom/qcs605-pm660-pm8005-regulator.dtsi | 4 +-
+ arch/arm64/boot/dts/qcom/qcs605.dtsi | 17 +
+ arch/arm64/boot/dts/qcom/qm215.dtsi | 22 +-
+ arch/arm64/boot/dts/qcom/sdm429-bg-soc.dtsi | 2 +
+ arch/arm64/boot/dts/qcom/sdm429-spyro.dtsi | 1 +
+ .../qcom/sdm670-camera-sensor-arglass.dtsi | 431 +++++
+ .../dts/qcom/sdm670-camera-sensor-svr.dtsi | 2 +-
+ arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi | 7 +-
+ .../boot/dts/qcom/sdm670-sde-display.dtsi | 45 +-
+ arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi | 7 +-
+ arch/arm64/boot/dts/qcom/sdm845-v2.dtsi | 3 +-
+ arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 +-
+ .../boot/dts/qcom/sdw3100-apq8009w-alpha.dts | 4 +-
+ .../boot/dts/qcom/sdw3100-apq8009w-wtp.dts | 4 +-
+ .../dts/qcom/sdw3100-msm8909w-1gb-wtp.dts | 4 +-
+ .../boot/dts/qcom/sdw3100-msm8909w-wtp.dts | 4 +-
+ .../boot/dts/qcom/sxr1130-arglass-overlay.dts | 35 +
+ .../qcom/sxr1130-arglass-pinctrl-overlay.dtsi | 150 ++
+ arch/arm64/boot/dts/qcom/sxr1130-arglass.dts | 72 +
+ arch/arm64/boot/dts/qcom/sxr1130-arglass.dtsi | 536 ++++++
+ arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi | 28 +-
+ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 3 +
+ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 +-
+ arch/arm64/configs/cuttlefish_defconfig | 2 +-
+ arch/arm64/configs/sdm670-perf_defconfig | 3 +-
+ arch/arm64/configs/sdm670_defconfig | 1 -
+ arch/arm64/configs/sdm845-perf_defconfig | 1 -
+ arch/arm64/configs/sdm845_defconfig | 1 -
+ arch/arm64/include/asm/atomic_ll_sc.h | 109 +-
+ arch/arm64/include/asm/atomic_lse.h | 46 +-
+ arch/arm64/include/asm/checksum.h | 5 +-
+ arch/arm64/include/asm/cmpxchg.h | 116 +-
+ arch/arm64/include/asm/debug-monitors.h | 2 +
+ arch/arm64/include/asm/futex.h | 55 +-
+ arch/arm64/include/asm/kvm_arm.h | 3 +-
+ arch/arm64/include/asm/kvm_asm.h | 43 +
+ arch/arm64/include/asm/kvm_host.h | 8 +-
+ arch/arm64/include/asm/numa.h | 3 +
+ arch/arm64/include/asm/pgtable-prot.h | 2 +-
+ arch/arm64/include/asm/pgtable.h | 7 +-
+ arch/arm64/kernel/debug-monitors.c | 24 +-
+ arch/arm64/kernel/head.S | 1 +
+ arch/arm64/kernel/kgdb.c | 2 +-
+ arch/arm64/kernel/perf_event.c | 50 +-
+ arch/arm64/kernel/perf_regs.c | 25 +-
+ arch/arm64/kernel/psci.c | 5 +-
+ arch/arm64/kernel/ptrace.c | 4 +-
+ arch/arm64/kernel/traps.c | 8 -
+ arch/arm64/kernel/vdso/vdso.lds.S | 8 +-
+ arch/arm64/kernel/vmlinux.lds.S | 8 +
+ arch/arm64/kvm/hyp/entry.S | 26 +-
+ arch/arm64/kvm/hyp/hyp-entry.S | 63 +-
+ arch/arm64/kvm/hyp/switch.c | 41 +-
+ arch/arm64/kvm/sys_regs.c | 11 +-
+ arch/arm64/mm/numa.c | 6 +-
+ arch/h8300/kernel/asm-offsets.c | 3 +
+ arch/hexagon/kernel/vmlinux.lds.S | 7 +-
+ arch/ia64/include/asm/ptrace.h | 8 +-
+ arch/ia64/include/asm/syscall.h | 2 +-
+ arch/ia64/kernel/Makefile | 2 +-
+ arch/ia64/kernel/mca.c | 2 +-
+ arch/ia64/kernel/mca_drv.c | 2 +-
+ arch/ia64/kernel/ptrace.c | 24 +-
+ arch/ia64/mm/discontig.c | 6 +-
+ arch/ia64/scripts/unwcheck.py | 2 +-
+ arch/m68k/include/asm/m53xxacr.h | 6 +-
+ arch/m68k/include/asm/mac_via.h | 1 +
+ arch/m68k/mac/config.c | 21 +-
+ arch/m68k/mac/iop.c | 21 +-
+ arch/m68k/mac/via.c | 6 +-
+ arch/m68k/q40/config.c | 1 +
+ arch/mips/Kconfig | 1 +
+ arch/mips/Makefile | 15 +-
+ arch/mips/alchemy/board-xxs1500.c | 1 +
+ arch/mips/alchemy/common/clock.c | 9 +-
+ arch/mips/bcm47xx/Kconfig | 1 +
+ arch/mips/boot/compressed/Makefile | 6 +-
+ arch/mips/boot/compressed/decompress.c | 5 +-
+ arch/mips/include/asm/cpu-type.h | 1 +
+ arch/mips/include/asm/div64.h | 55 +-
+ arch/mips/include/asm/hugetlb.h | 8 +-
+ arch/mips/include/asm/kvm_host.h | 6 +-
+ arch/mips/kernel/genex.S | 6 +-
+ arch/mips/kernel/mips-cm.c | 6 +-
+ arch/mips/kernel/relocate.c | 10 +-
+ arch/mips/kernel/setup.c | 10 +
+ arch/mips/kernel/smp-bmips.c | 2 +
+ arch/mips/kernel/time.c | 65 +
+ arch/mips/kernel/topology.c | 2 +-
+ arch/mips/kernel/traps.c | 1 +
+ arch/mips/kernel/vmlinux.lds.S | 3 +-
+ arch/mips/lantiq/irq.c | 2 +-
+ arch/mips/lib/mips-atomic.c | 12 +-
+ arch/mips/mm/c-r4k.c | 6 +-
+ arch/mips/mm/tlb-r4k.c | 1 +
+ arch/mips/mti-malta/malta-platform.c | 3 +-
+ arch/mips/pci/pci-legacy.c | 9 +-
+ arch/mips/ralink/of.c | 2 +
+ arch/mips/sni/a20r.c | 9 +-
+ arch/mips/vdso/genvdso.c | 10 +
+ arch/mips/vdso/vdso.h | 2 +-
+ arch/openrisc/include/asm/barrier.h | 9 +
+ arch/openrisc/kernel/entry.S | 4 +-
+ arch/openrisc/kernel/setup.c | 2 +
+ arch/parisc/include/asm/atomic.h | 2 +
+ arch/parisc/include/asm/cmpxchg.h | 2 +
+ arch/parisc/lib/bitops.c | 12 +
+ arch/powerpc/Kconfig | 2 +-
+ arch/powerpc/Kconfig.debug | 1 +
+ arch/powerpc/boot/devtree.c | 59 +-
+ arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 8 +
+ arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 16 +
+ arch/powerpc/boot/ns16550.c | 9 +-
+ arch/powerpc/configs/pasemi_defconfig | 1 -
+ arch/powerpc/configs/ppc6xx_defconfig | 1 -
+ arch/powerpc/include/asm/barrier.h | 2 +
+ arch/powerpc/include/asm/book3s/32/pgtable.h | 4 +-
+ .../powerpc/include/asm/book3s/64/kup-radix.h | 23 +
+ arch/powerpc/include/asm/book3s/64/pgtable.h | 23 +-
+ arch/powerpc/include/asm/code-patching.h | 2 +-
+ arch/powerpc/include/asm/cpu_has_feature.h | 4 +-
+ arch/powerpc/include/asm/cputable.h | 5 -
+ arch/powerpc/include/asm/dcr-native.h | 8 +-
+ arch/powerpc/include/asm/exception-64s.h | 13 +-
+ arch/powerpc/include/asm/feature-fixups.h | 19 +
+ arch/powerpc/include/asm/futex.h | 4 +
+ arch/powerpc/include/asm/kprobes.h | 3 +-
+ arch/powerpc/include/asm/kup.h | 40 +
+ arch/powerpc/include/asm/nohash/pgtable.h | 4 +-
+ arch/powerpc/include/asm/percpu.h | 4 +-
+ arch/powerpc/include/asm/ps3.h | 2 +
+ arch/powerpc/include/asm/reg.h | 2 +-
+ arch/powerpc/include/asm/security_features.h | 7 +
+ arch/powerpc/include/asm/setup.h | 4 +
+ arch/powerpc/include/asm/uaccess.h | 143 +-
+ arch/powerpc/include/uapi/asm/errno.h | 1 +
+ arch/powerpc/kernel/dma-iommu.c | 3 +-
+ arch/powerpc/kernel/eeh.c | 11 +-
+ arch/powerpc/kernel/exceptions-64s.S | 130 +-
+ arch/powerpc/kernel/head_8xx.S | 8 +-
+ arch/powerpc/kernel/iommu.c | 4 +-
+ arch/powerpc/kernel/machine_kexec.c | 8 +-
+ arch/powerpc/kernel/prom.c | 2 +-
+ arch/powerpc/kernel/setup_64.c | 120 ++
+ arch/powerpc/kernel/sysfs.c | 42 +-
+ arch/powerpc/kernel/tau_6xx.c | 82 +-
+ arch/powerpc/kernel/vdso.c | 2 +-
+ arch/powerpc/kernel/vmlinux.lds.S | 14 +
+ arch/powerpc/kvm/book3s_rtas.c | 25 +-
+ arch/powerpc/lib/checksum_wrappers.c | 4 +
+ arch/powerpc/lib/feature-fixups.c | 119 ++
+ arch/powerpc/lib/string.S | 4 +-
+ arch/powerpc/lib/string_64.S | 6 +-
+ arch/powerpc/mm/fault.c | 7 +-
+ arch/powerpc/perf/core-book3s.c | 27 +-
+ arch/powerpc/perf/hv-24x7.c | 10 -
+ arch/powerpc/perf/hv-gpci-requests.h | 6 +-
+ arch/powerpc/perf/isa207-common.c | 14 +-
+ arch/powerpc/platforms/52xx/lite5200_sleep.S | 2 +-
+ arch/powerpc/platforms/Kconfig | 9 +-
+ arch/powerpc/platforms/cell/Kconfig | 1 +
+ arch/powerpc/platforms/cell/spufs/file.c | 113 +-
+ arch/powerpc/platforms/powernv/opal-dump.c | 50 +-
+ arch/powerpc/platforms/powernv/opal-elog.c | 33 +-
+ arch/powerpc/platforms/powernv/setup.c | 15 +
+ arch/powerpc/platforms/powernv/smp.c | 2 +-
+ arch/powerpc/platforms/ps3/mm.c | 34 +-
+ arch/powerpc/platforms/pseries/dlpar.c | 7 +-
+ arch/powerpc/platforms/pseries/hotplug-cpu.c | 3 -
+ .../platforms/pseries/hotplug-memory.c | 2 +-
+ arch/powerpc/platforms/pseries/pci_dlpar.c | 4 +-
+ arch/powerpc/platforms/pseries/ras.c | 6 +-
+ arch/powerpc/platforms/pseries/rng.c | 1 +
+ arch/powerpc/platforms/pseries/setup.c | 8 +
+ arch/powerpc/platforms/pseries/suspend.c | 1 -
+ arch/powerpc/sysdev/mpic_msgr.c | 2 +-
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+ scripts/analyze_suspend.py | 2 +-
+ scripts/bloat-o-meter | 2 +-
+ scripts/bootgraph.pl | 2 +-
+ scripts/checkincludes.pl | 2 +-
+ scripts/checkpatch.pl | 6 +-
+ scripts/checkstack.pl | 2 +-
+ scripts/config | 2 +-
+ scripts/decode_stacktrace.sh | 4 +-
+ scripts/depmod.sh | 2 +
+ scripts/diffconfig | 2 +-
+ scripts/dtc/dt_to_config | 2 +-
+ scripts/extract_xc3028.pl | 2 +-
+ scripts/gdb/linux/dmesg.py | 22 +-
+ scripts/gdb/linux/proc.py | 2 +-
+ scripts/get_dvb_firmware | 2 +-
+ scripts/kconfig/nconf.c | 2 +-
+ scripts/markup_oops.pl | 2 +-
+ scripts/mkcompile_h | 14 +-
+ scripts/mksysmap | 2 +-
+ scripts/profile2linkerlist.pl | 2 +-
+ scripts/recordmcount.c | 2 +-
+ scripts/recordmcount.pl | 19 +-
+ scripts/setlocalversion | 21 +-
+ scripts/show_delta | 2 +-
+ scripts/stackdelta | 2 +-
+ scripts/tracing/draw_functrace.py | 8 +-
+ security/integrity/evm/evm_crypto.c | 2 +-
+ security/integrity/ima/ima.h | 7 +-
+ security/integrity/ima/ima_crypto.c | 2 +
+ security/integrity/ima/ima_policy.c | 3 +-
+ security/keys/trusted.c | 2 +-
+ security/lsm_audit.c | 7 +-
+ security/selinux/include/classmap.h | 3 +-
+ security/selinux/include/security.h | 1 +
+ security/selinux/nlmsgtab.c | 24 +-
+ security/selinux/selinuxfs.c | 1 +
+ security/selinux/ss/policydb.c | 4 +
+ security/selinux/ss/policydb.h | 2 +
+ security/selinux/ss/services.c | 6 +
+ security/smack/smackfs.c | 52 +-
+ sound/core/compress_offload.c | 4 +
+ sound/core/control.c | 2 +-
+ sound/core/info.c | 4 +-
+ sound/core/init.c | 2 -
+ sound/core/oss/mulaw.c | 4 +-
+ sound/core/oss/pcm_oss.c | 28 +-
+ sound/core/pcm_native.c | 5 +
+ sound/core/seq/oss/seq_oss.c | 11 +-
+ sound/core/seq/oss/seq_oss_synth.c | 3 +-
+ sound/core/seq/seq_ports.c | 39 +-
+ sound/core/seq/seq_queue.h | 8 +-
+ sound/core/timer.c | 3 +-
+ sound/drivers/aloop.c | 11 +-
+ sound/drivers/opl3/opl3_synth.c | 2 +
+ sound/firewire/Kconfig | 5 +-
+ sound/firewire/bebob/bebob.c | 5 +-
+ sound/firewire/bebob/bebob_hwdep.c | 3 +-
+ sound/firewire/digi00x/digi00x.c | 5 +
+ sound/firewire/oxfw/oxfw.c | 3 +-
+ sound/firewire/tascam/tascam.c | 30 +-
+ sound/hda/ext/hdac_ext_controller.c | 2 +
+ sound/hda/hdac_bus.c | 4 +
+ sound/hda/hdac_device.c | 2 +
+ sound/isa/cmi8330.c | 2 +-
+ sound/isa/es1688/es1688.c | 4 +-
+ sound/isa/sb/emu8000.c | 4 +-
+ sound/isa/sb/sb16_csp.c | 20 +-
+ sound/isa/sb/sb8.c | 4 -
+ sound/isa/wavefront/wavefront_synth.c | 8 +-
+ sound/pci/asihpi/hpioctl.c | 4 +-
+ sound/pci/ca0106/ca0106_main.c | 3 +-
+ sound/pci/cs46xx/cs46xx_lib.c | 2 +-
+ sound/pci/cs46xx/dsp_spos_scb_lib.c | 2 +-
+ sound/pci/ctxfi/cthw20k2.c | 2 +-
+ sound/pci/echoaudio/echoaudio.c | 2 -
+ sound/pci/hda/hda_auto_parser.c | 6 +
+ sound/pci/hda/hda_bind.c | 4 +
+ sound/pci/hda/hda_codec.c | 2 +-
+ sound/pci/hda/hda_controller.c | 11 +-
+ sound/pci/hda/hda_generic.c | 40 +-
+ sound/pci/hda/hda_generic.h | 1 +
+ sound/pci/hda/hda_tegra.c | 3 +
+ sound/pci/hda/patch_ca0132.c | 16 +-
+ sound/pci/hda/patch_conexant.c | 1 +
+ sound/pci/hda/patch_hdmi.c | 108 +-
+ sound/pci/hda/patch_realtek.c | 48 +-
+ sound/pci/hda/patch_sigmatel.c | 2 +-
+ sound/pci/hda/patch_via.c | 1 +
+ sound/pci/ice1712/prodigy192.c | 2 +-
+ sound/pci/mixart/mixart_core.c | 5 +-
+ sound/pci/oxygen/xonar_dg.c | 2 +-
+ sound/pci/rme9652/hdsp.c | 3 +-
+ sound/pci/rme9652/hdspm.c | 3 +-
+ sound/pci/rme9652/rme9652.c | 3 +-
+ sound/ppc/powermac.c | 6 +-
+ sound/soc/codecs/cs35l33.c | 1 +
+ sound/soc/codecs/cs42l56.c | 3 +-
+ sound/soc/codecs/rt286.c | 23 +-
+ sound/soc/codecs/rt5640.c | 4 +-
+ sound/soc/codecs/rt5651.c | 4 +-
+ sound/soc/codecs/rt5659.c | 5 +
+ sound/soc/codecs/rt5670.h | 2 +-
+ sound/soc/codecs/sgtl5000.c | 2 +-
+ sound/soc/codecs/sti-sas.c | 1 +
+ sound/soc/codecs/wm_adsp.c | 5 +-
+ sound/soc/fsl/fsl_asrc_dma.c | 1 +
+ sound/soc/fsl/fsl_esai.c | 8 +-
+ sound/soc/intel/atom/sst-mfld-platform-pcm.c | 14 +-
+ sound/soc/intel/boards/haswell.c | 1 +
+ sound/soc/jz4740/jz4740-i2s.c | 4 +
+ sound/soc/kirkwood/kirkwood-dma.c | 2 +-
+ sound/soc/qcom/lpass-platform.c | 3 +-
+ sound/soc/soc-core.c | 2 +-
+ sound/soc/soc-dapm.c | 1 +
+ sound/soc/soc-pcm.c | 2 +
+ sound/soc/tegra/tegra30_ahub.c | 4 +-
+ sound/soc/tegra/tegra30_i2s.c | 4 +-
+ sound/soc/tegra/tegra_alc5632.c | 1 +
+ sound/soc/tegra/tegra_max98090.c | 1 +
+ sound/soc/tegra/tegra_rt5640.c | 1 +
+ sound/soc/tegra/tegra_rt5677.c | 1 +
+ sound/soc/tegra/tegra_sgtl5000.c | 1 +
+ sound/soc/tegra/tegra_wm8753.c | 1 +
+ sound/soc/tegra/tegra_wm8903.c | 1 +
+ sound/soc/tegra/tegra_wm9712.c | 1 +
+ sound/soc/tegra/trimslice.c | 1 +
+ sound/usb/card.c | 34 +-
+ sound/usb/card.h | 1 +
+ sound/usb/clock.c | 6 +
+ sound/usb/format.c | 4 +
+ sound/usb/line6/capture.c | 2 +
+ sound/usb/line6/driver.c | 4 +
+ sound/usb/line6/playback.c | 2 +
+ sound/usb/line6/pod.c | 5 -
+ sound/usb/line6/variax.c | 6 -
+ sound/usb/midi.c | 54 +-
+ sound/usb/mixer.c | 34 +-
+ sound/usb/mixer.h | 15 +-
+ sound/usb/mixer_quirks.c | 6 +-
+ sound/usb/mixer_scarlett.c | 6 +-
+ sound/usb/pcm.c | 59 +-
+ sound/usb/quirks-table.h | 124 ++
+ sound/usb/quirks.c | 29 +-
+ sound/usb/stream.c | 7 +-
+ sound/usb/usbaudio.h | 4 +-
+ tools/arch/ia64/include/asm/barrier.h | 3 -
+ tools/gpio/gpio-hammer.c | 17 +-
+ tools/kvm/kvm_stat/kvm_stat | 2 +-
+ tools/lib/traceevent/event-parse.c | 1 +
+ tools/objtool/arch/x86/include/asm/insn.h | 15 +
+ tools/objtool/check.c | 8 +-
+ tools/objtool/elf.c | 7 +-
+ tools/perf/Documentation/perf-record.txt | 4 +
+ tools/perf/Documentation/perf-stat.txt | 4 +
+ tools/perf/builtin-lock.c | 2 +-
+ tools/perf/builtin-probe.c | 3 +
+ tools/perf/builtin-report.c | 3 +-
+ tools/perf/builtin-script.c | 24 +-
+ tools/perf/builtin-top.c | 4 +-
+ tools/perf/pmu-events/jevents.c | 2 +-
+ tools/perf/python/tracepoint.py | 2 +-
+ tools/perf/python/twatch.py | 2 +-
+ tools/perf/scripts/python/sched-migration.py | 2 +-
+ tools/perf/tests/attr.c | 4 +-
+ tools/perf/tests/bpf.c | 2 +
+ tools/perf/tests/pmu.c | 3 +-
+ tools/perf/tests/sample-parsing.c | 2 +-
+ tools/perf/util/annotate.c | 17 +-
+ tools/perf/util/auxtrace.c | 4 -
+ tools/perf/util/cgroup.c | 2 +-
+ tools/perf/util/dso.c | 16 +
+ tools/perf/util/dso.h | 1 +
+ tools/perf/util/dwarf-aux.c | 8 +
+ tools/perf/util/event.c | 9 +-
+ .../util/intel-pt-decoder/intel-pt-decoder.c | 3 +
+ tools/perf/util/intel-pt.c | 8 +-
+ tools/perf/util/lzma.c | 8 +-
+ tools/perf/util/map.c | 7 +-
+ tools/perf/util/parse-events.c | 4 +-
+ tools/perf/util/parse-regs-options.c | 2 +-
+ tools/perf/util/pmu.c | 13 +-
+ tools/perf/util/pmu.h | 1 +
+ tools/perf/util/probe-event.c | 21 +-
+ tools/perf/util/probe-file.c | 4 +-
+ tools/perf/util/probe-finder.c | 3 +-
+ tools/perf/util/session.c | 2 +
+ tools/perf/util/setup.py | 2 +-
+ tools/perf/util/sort.c | 2 +-
+ tools/perf/util/srcline.c | 16 +-
+ tools/perf/util/stat.c | 6 +-
+ tools/perf/util/symbol-elf.c | 7 +
+ tools/perf/util/symbol.c | 2 +
+ tools/perf/util/symbol_fprintf.c | 2 +-
+ tools/testing/ktest/compare-ktest-sample.pl | 2 +-
+ tools/testing/selftests/lib.mk | 4 +
+ .../networking/timestamping/timestamping.c | 10 +-
+ .../powerpc/benchmarks/context_switch.c | 21 +-
+ .../powerpc/pmu/ebb/back_to_back_ebbs_test.c | 2 -
+ .../selftests/powerpc/pmu/ebb/cycles_test.c | 2 -
+ .../powerpc/pmu/ebb/cycles_with_freeze_test.c | 2 -
+ .../powerpc/pmu/ebb/cycles_with_mmcr2_test.c | 2 -
+ tools/testing/selftests/powerpc/pmu/ebb/ebb.c | 2 -
+ .../pmu/ebb/ebb_on_willing_child_test.c | 2 -
+ .../powerpc/pmu/ebb/lost_exception_test.c | 1 -
+ .../powerpc/pmu/ebb/multi_counter_test.c | 7 -
+ .../powerpc/pmu/ebb/multi_ebb_procs_test.c | 2 -
+ .../powerpc/pmu/ebb/no_handler_test.c | 2 -
+ .../powerpc/pmu/ebb/pmae_handling_test.c | 2 -
+ .../powerpc/pmu/ebb/pmc56_overflow_test.c | 2 -
+ tools/testing/selftests/powerpc/utils.c | 37 +-
+ tools/testing/selftests/x86/protection_keys.c | 4 +-
+ tools/testing/selftests/x86/syscall_nt.c | 1 +
+ tools/usb/usbip/libsrc/usbip_host_common.c | 2 +-
+ virt/kvm/kvm_main.c | 25 +-
+ 3015 files changed, 35155 insertions(+), 14779 deletions(-)
+ create mode 100644 Documentation/devicetree/bindings/input/hall_sensor.txt
+ create mode 100644 Documentation/devicetree/bindings/input/misc/bma2x2.txt
+ create mode 100644 Documentation/devicetree/bindings/input/misc/ltr553.txt
+ create mode 100644 Documentation/devicetree/bindings/leds/leds-aw2013.txt
+ mode change 100755 => 100644 arch/arm/configs/msm8909-perf_defconfig
+ mode change 100755 => 100644 arch/arm/configs/msm8937go-perf_defconfig
+ create mode 100644 arch/arm/configs/vendor/msm8909go-perf_defconfig
+ create mode 100644 arch/arm/configs/vendor/msm8909go_defconfig
+ create mode 100644 arch/arm64/boot/dts/qcom/batterydata-qrd-skue-4v35-2000mah.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-arglass-boe-dual-1080p-video.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/dsi-panel-hx8379c-fwvga-video.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/fg-gen3-batterydata-goertek-merlin-230mah.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/msm8909-1gb-qrd-skue.dts
+ create mode 100644 arch/arm64/boot/dts/qcom/msm8909-camera-sensor-skue.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/msm8909-qrd-skue.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/sdm670-camera-sensor-arglass.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/sxr1130-arglass-overlay.dts
+ create mode 100644 arch/arm64/boot/dts/qcom/sxr1130-arglass-pinctrl-overlay.dtsi
+ create mode 100644 arch/arm64/boot/dts/qcom/sxr1130-arglass.dts
+ create mode 100644 arch/arm64/boot/dts/qcom/sxr1130-arglass.dtsi
+ create mode 100644 arch/openrisc/include/asm/barrier.h
+ create mode 100644 arch/powerpc/include/asm/book3s/64/kup-radix.h
+ create mode 100644 arch/powerpc/include/asm/kup.h
+ mode change 100644 => 100755 drivers/irqchip/irq-gic.c
+ create mode 100644 drivers/media/platform/msm/camera/cam_jpeg/jpeg_hw/jpeg_dma_hw/cam_jpeg_dma_hw_info_ver_4_2_0.h
+ mode change 100644 => 100755 drivers/usb/host/xhci-plat.c
+ mode change 100644 => 100755 include/linux/overflow.h
+ create mode 100644 include/linux/prandom.h
+ delete mode 100644 kernel/elfcore.c
+ delete mode 100644 kernel/futex_compat.c
+ mode change 100644 => 100755 net/netlink/genetlink.c
+ create mode 100644 net/sunrpc/auth_gss/auth_gss_internal.h
+ create mode 100644 net/unix/scm.c
+ create mode 100644 net/unix/scm.h
+ create mode 100644 net/xfrm/xfrm_compat.c
+
+diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio
+index 0406076e4405..743ffbcc6b5f 100644
+--- a/Documentation/ABI/testing/sysfs-bus-iio
++++ b/Documentation/ABI/testing/sysfs-bus-iio
+@@ -1491,7 +1491,8 @@ What: /sys/bus/iio/devices/iio:deviceX/in_concentrationX_voc_raw
+ KernelVersion: 4.3
+ Contact: linux-iio@vger.kernel.org
+ Description:
+- Raw (unscaled no offset etc.) percentage reading of a substance.
++ Raw (unscaled no offset etc.) reading of a substance. Units
++ after application of scale and offset are percents.
+
+ What: /sys/bus/iio/devices/iio:deviceX/in_resistance_raw
+ What: /sys/bus/iio/devices/iio:deviceX/in_resistanceX_raw
+diff --git a/Documentation/DocBook/libata.tmpl b/Documentation/DocBook/libata.tmpl
+index d7fcdc5a4379..9b55778ab024 100644
+--- a/Documentation/DocBook/libata.tmpl
++++ b/Documentation/DocBook/libata.tmpl
+@@ -324,7 +324,7 @@ Many legacy IDE drivers use ata_bmdma_status() as the bmdma_status() hook.
+
+ High-level taskfile hooks
+
+-void (*qc_prep) (struct ata_queued_cmd *qc);
++enum ata_completion_errors (*qc_prep) (struct ata_queued_cmd *qc);
+ int (*qc_issue) (struct ata_queued_cmd *qc);
+
+
+diff --git a/Documentation/devicetree/bindings/arm/msm/msm.txt b/Documentation/devicetree/bindings/arm/msm/msm.txt
+index 36b7a575ba1b..67a2d31a6740 100644
+--- a/Documentation/devicetree/bindings/arm/msm/msm.txt
++++ b/Documentation/devicetree/bindings/arm/msm/msm.txt
+@@ -113,6 +113,9 @@ SoCs:
+ - SMVWR1130
+ compatible = "qcom,sxr1130-smrtvwr"
+
++- ARGLASS1130
++ compatible = "qcom,sxr1130-arglass"
++
+ - MSM8952
+ compatible = "qcom,msm8952"
+
+@@ -223,6 +226,9 @@ Generic board variants:
+ - SMVWR device:
+ compatible = "qcom,xr-smrtvwr"
+
++- ARGlass device:
++ compatible = "qcom,xr-arglass"
++
+ - HDK device:
+ compatible = "qcom,hdk"
+
+diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt
+index b6a7e7397b8b..b944fe067188 100644
+--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt
++++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt
+@@ -16,6 +16,9 @@ Required properties:
+ Documentation/devicetree/bindings/graph.txt. This port should be connected
+ to the input port of an attached HDMI or LVDS encoder chip.
+
++Optional properties:
++- pinctrl-names: Contain "default" and "sleep".
++
+ Example:
+
+ dpi0: dpi@1401d000 {
+@@ -26,6 +29,9 @@ dpi0: dpi@1401d000 {
+ <&mmsys CLK_MM_DPI_ENGINE>,
+ <&apmixedsys CLK_APMIXED_TVDPLL>;
+ clock-names = "pixel", "engine", "pll";
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&dpi_pin_func>;
++ pinctrl-1 = <&dpi_pin_idle>;
+
+ port {
+ dpi0_out: endpoint {
+diff --git a/Documentation/devicetree/bindings/input/hall_sensor.txt b/Documentation/devicetree/bindings/input/hall_sensor.txt
+new file mode 100644
+index 000000000000..e4401886a0b8
+--- /dev/null
++++ b/Documentation/devicetree/bindings/input/hall_sensor.txt
+@@ -0,0 +1,36 @@
++Hall sensor driver
++
++Hall sensor is a switch. It senses magnetic field change and trigger interrupts to cpu.
++
++Required properties:
++
++ - compatible : Should be "hall-switch".
++ - pinctrl-names : Pinctrl configuration names of this sensor driver.
++ Should be "default".
++ - interrupt-parent : Parent of interrupt.
++ - interrupts : Hall Sensor interrupts to indicate new data ready or events.
++ - vddio-supply : Analog power supply needed to power device.
++ - linux,gpio-int : Irq gpio which is to provide interrupts to host.
++ - linux,min-uv : Device required minimum voltage.
++ - linux,max-uv : Device required max voltage.
++
++Optional properties:
++
++ - linux,wakeup : Boolean to select interrupt wakeup or not, if this property is defined
++ device will wakeup system.
++
++Example:
++ &soc {
++ hall {
++ compatible = "hall-switch";
++ pinctrl-names = "default";
++ pinctrl-0 = <&hall_sensor_int_default>;
++ interrupt-parent = <&msm_gpio>;
++ interrupts = <36 0x2003>;
++ vddio-supply = <&pm8909_l6>;
++ linux,gpio-int = <&msm_gpio 36 0x1>;
++ linux,wakeup;
++ linux,min-uv = <1650000>;
++ linux,max-uv = <3300000>;
++ };
++ };
+diff --git a/Documentation/devicetree/bindings/input/misc/bma2x2.txt b/Documentation/devicetree/bindings/input/misc/bma2x2.txt
+new file mode 100644
+index 000000000000..40629abf8f9d
+--- /dev/null
++++ b/Documentation/devicetree/bindings/input/misc/bma2x2.txt
+@@ -0,0 +1,61 @@
++BOSCH bma2x2 3-axis accelerometer sensor driver.
++
++Required properties:
++
++ - compatible : Should be "bosch,bma2x2".
++ - reg : i2c slave address of the device.
++ - pinctrl-names : Pinctrl configuration names of this sensor driver.
++ Should be "default".
++ - pinctrl-0 : The pinctrl node corresponding to "default",
++ should be <&bma2x2_int1_default &bma2x2_int2_default>.
++ - interrupt-parent : Parent of interrupt.
++ - interrupts : Accelerometer interrupts to indicate new data ready or events.
++ - vdd-supply : Analog power supply needed to power device.
++ - vio-supply : Digital IO power supply needed for IO and I2C.
++ - bosch,init-interval : Initial data polling interval in millisecond.
++ - bosch,place : The placing of the accelerometer on board. There are 8
++ patterns of placing described as below:
++ 0: 1st pin is right down
++ 1: 1st pin is left down
++ 2: 1st pin is left top
++ 3: 1st pin is right top
++ 4: 1st pin is left down (from top view)
++ 5: 1st pin is left top (from top view)
++ 6: 1st pin is right top (from top view)
++ 7: 1st pin is right down (from top view)
++
++Optional properties:
++
++ - bosch,gpio-int1 : 1st irq gpio which is to provide interrupts
++ to host, interrupt events can be route to any of
++ these two irq pins according device configuration.
++ - bosch,gpio-int2 : 2nd irq gpio which is to provide interrupts
++ to host.
++ - bosch,use-interrupt : Use device interrupt to trigger data acquisition
++ instead of polling data.
++ - bosch,use-int2 : Map interrupt signal to 2nd interrupt pin of device.
++ If this property is defined, data ready, fifo full and
++ other event will trigger level change on interrupt pin2
++ instead of interrupt pin1.
++ - bosch,use-smd : enable signification motion detection(SMD). Enable this
++ will create a new sensor which triggers an event each time
++ significant motion is detected.
++ - bosch,use-hrtimer : Use hrtimer to report data. Hrtimer can report data more timely.
++
++Example:
++&i2c_0 { /* BLSP1 QUP2 */
++ bosch@18 { /* Accelerometer sensor */
++ compatible = "bosch,bma2x2";
++ reg = <0x18>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&bma2x2_int1_default &bma2x2_int2_default>;
++ interrupt-parent = <&msm_gpio>;
++ interrupts = <112 0x2002>;
++ vdd-supply = <&pm8916_l17>;
++ vio-supply = <&pm8916_l6>;
++ bosch,init-interval = <200>;
++ bosch,place = <1>;
++ bosch,gpio-int1 = <&msm_gpio 112 0x2002>;
++ bosch,gpio-int2 = <&msm_gpio 114 0x2002>;
++ };
++};
+diff --git a/Documentation/devicetree/bindings/input/misc/ltr553.txt b/Documentation/devicetree/bindings/input/misc/ltr553.txt
+new file mode 100644
+index 000000000000..a89cb00b990b
+--- /dev/null
++++ b/Documentation/devicetree/bindings/input/misc/ltr553.txt
+@@ -0,0 +1,67 @@
++LTR-553ALS-01 optical sensor
++
++LTR553 is an ambient light and proximity sensor. It connects to host SoC via
++I2C bus.
++
++Abbreviation:
++ALS: ambient light sensor
++PS: proximity sensor
++ALPS: ambient light and proximity sensor
++
++Required properties:
++ - compatible : Should be "liteon,ltr553".
++ - reg : i2c slave address of this device.
++ - vdd-supply : Analog power supply needed to power up this device.
++ - vio-supply : Digital IO power supply needed for IO and i2c.
++ - interrupt-parent : The interrupt controller this device is connected to.
++ - interrupts : L/P sample interrupt to indicate new data ready.
++ - pinctrl-names : pinctrl configuration names of this device. Should be
++ "default" and "sleep".
++ - pinctrl-0 : Should specify pin control groups used for this sensor.
++ - pinctrl-1 : Should specify pin control groups used for this sensor.
++ - liteon,irq-gpio : GPIO pin for interrupt of this device.
++ - liteon,als-ps-persist: The number of data out of range to trigger interrupt.
++ - liteon,ps-led : Proximity sensor LED settings.
++ - liteon,ps-pulses : Controls the number of LED pulses to be emitted.
++ - liteon,als-integration-time : ALS integration time configuration. The
++ maximum value is 7.
++
++ Optional properties:
++ - liteon,ps-distance-table : Proximity sensor ADC value to transfer into
++ distance in centimeter.
++ - liteon,als-equation-0 : Equation to convert ALS data into lux for
++ light ratio below 0.45.
++ - liteon,als-equation-1 : Equation to convert ALS data into lux for
++ light ratio between 0.45 and 0.68.
++ - liteon,als-equation-2 : Equation to convert ALS data into lux for
++ light ratio between 0.68 and 0.99.
++ - liteon,als-equation-3 : Equation to convert ALS data into lux for
++ light ratio above 0.99.
++ - liteon,wakeup-threshold : Threshold in centimeter to wake up SoC in
++ suspend mode when proximity is enabled.
++ - liteon,als-sensitivity : Ambient light sensitivity in lux. This array
++ configures how much light intensity change will trigger a light sensor
++ event under different als gain configuration. The array size must be 8.
++
++ Example:
++
++ i2c@78b5000 { /* BLSP1 QUP1 */
++ liteon@23 {
++ compatible = "liteon,ltr553";
++ reg = <0x23>;
++ vdd-supply = <&pm8916_l17>;
++ vio-supply = <&pm8916_l6>;
++ interrupt-parent = <&msm_gpio>;
++ interrupts = <113 0x2002>;
++ pinctrl-names = "default","sleep";
++ pinctrl-0 = <<r553_default>;
++ pinctrl-1 = <<r553_sleep>;
++ liteon,irq-gpio = <&msm_gpio 113 0x2002>;
++ liteon,als-ps-persist = <0>;
++ liteon,ps-led = <0x7f>;
++ liteon,ps-pulses = <4>;
++ liteon,wakeup-threshold = <4>;
++ liteon,als-integration-time = <0>;
++ liteon,als-sensitivity = <6000 3200 1600 800 0 0 130 1>;
++ };
++ }
+diff --git a/Documentation/devicetree/bindings/leds/leds-aw2013.txt b/Documentation/devicetree/bindings/leds/leds-aw2013.txt
+new file mode 100644
+index 000000000000..4b18135d6318
+--- /dev/null
++++ b/Documentation/devicetree/bindings/leds/leds-aw2013.txt
+@@ -0,0 +1,75 @@
++Binding for RGB LEDs connected to AW2013.
++
++AWINIC AW2013 RGB LED driver is used to provide red/green/blue
++led blink or glowing to notify user for different system events,
++such as missed call, new sms, low battery. AW2013 RGB LED is
++connected through I2C.
++
++Required properties:
++ - compatible : should be compatible = "awinic,aw2013"
++ - reg : i2c slave address of the device
++ - vdd-supply : Power supply needed to power up the device
++ - vcc-supply : Power source required to power up i2c bus
++
++LED required sub-node properties:
++ - aw2013,name : name of the LED
++ - aw2013,id : id of the LED
++ - aw2013,max-brightness: max brightness set of the LED
++ - aw2013,max-current : max current set of the LED
++ - aw2013,rise-time-ms : the rise time when led in breathe mode
++ - aw2013,hold-time-ms : the hold time when led in breathe mode
++ - aw2013,fall-time-ms : the fall time when led in breathe mode
++ - aw2013,off-time-ms : the off time when led in breathe mode
++ The definition of each time described as
++ shown in figure:
++
++ /-----------\
++ / | \
++ /| | |\
++ / | | | \-----------
++ |hold_time_ms | |
++ | | |
++ rise_time_ms fall_time_ms |
++ off_time_ms
++
++Example:
++
++ aw2013@45 {
++ compatible = "awinic,aw2013";
++ reg = <0x45>;
++ vdd-supply = <&pm8909_l17>;
++ vcc-supply = <&pm8909_l6>;
++
++ aw2013,red {
++ aw2013,name = "red";
++ aw2013,id = <0>;
++ aw2013,max-brightness = <255>;
++ aw2013,max-current = <1>;
++ aw2013,rise-time-ms = <2>;
++ aw2013,hold-time-ms = <1>;
++ aw2013,fall-time-ms = <2>;
++ aw2013,off-time-ms = <1>;
++ };
++
++ aw2013,green {
++ aw2013,name = "green";
++ aw2013,id = <1>;
++ aw2013,max-brightness = <255>;
++ aw2013,max-current = <1>;
++ aw2013,rise-time-ms = <2>;
++ aw2013,hold-time-ms = <1>;
++ aw2013,fall-time-ms = <2>;
++ aw2013,off-time-ms = <1>;
++ };
++
++ aw2013,blue {
++ aw2013,name = "blue";
++ aw2013,id = <2>;
++ aw2013,max-brightness = <255>;
++ aw2013,max-current = <1>;
++ aw2013,rise-time-ms = <2>;
++ aw2013,hold-time-ms = <1>;
++ aw2013,fall-time-ms = <2>;
++ aw2013,off-time-ms = <1>;
++ };
++ };
+diff --git a/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt b/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt
+index 5b6cd9b3f628..0188bbd2e35f 100644
+--- a/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt
++++ b/Documentation/devicetree/bindings/net/nfc/nxp-nci.txt
+@@ -27,7 +27,7 @@ Example (for ARM-based BeagleBone with NPC100 NFC controller on I2C2):
+ clock-frequency = <100000>;
+
+ interrupt-parent = <&gpio1>;
+- interrupts = <29 GPIO_ACTIVE_HIGH>;
++ interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
+
+ enable-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
+ firmware-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
+diff --git a/Documentation/devicetree/bindings/net/nfc/pn544.txt b/Documentation/devicetree/bindings/net/nfc/pn544.txt
+index dab69f36167c..8541e8dafd55 100644
+--- a/Documentation/devicetree/bindings/net/nfc/pn544.txt
++++ b/Documentation/devicetree/bindings/net/nfc/pn544.txt
+@@ -27,7 +27,7 @@ Example (for ARM-based BeagleBone with PN544 on I2C2):
+ clock-frequency = <400000>;
+
+ interrupt-parent = <&gpio1>;
+- interrupts = <17 GPIO_ACTIVE_HIGH>;
++ interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+
+ enable-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
+ firmware-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+diff --git a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt
+index 138fb7e8516b..4fb30ba56279 100644
+--- a/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt
++++ b/Documentation/devicetree/bindings/pci/msm_ep_pcie.txt
+@@ -67,6 +67,7 @@ Optional Properties:
+ - qcom,msm-bus,num-cases
+ - qcom,msm-bus,num-paths
+ - qcom,msm-bus,vectors-KBps
++ - qcom,pcie-m2-autonomous: Enable L1ss sleep/exit to support M2 autonomous mode.
+
+ Example:
+
+diff --git a/Documentation/devicetree/bindings/sound/wm8994.txt b/Documentation/devicetree/bindings/sound/wm8994.txt
+index 68c4e8d96bed..b309de00cd83 100644
+--- a/Documentation/devicetree/bindings/sound/wm8994.txt
++++ b/Documentation/devicetree/bindings/sound/wm8994.txt
+@@ -14,9 +14,15 @@ Required properties:
+ - #gpio-cells : Must be 2. The first cell is the pin number and the
+ second cell is used to specify optional parameters (currently unused).
+
+- - AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply, CPVDD-supply,
+- SPKVDD1-supply, SPKVDD2-supply : power supplies for the device, as covered
+- in Documentation/devicetree/bindings/regulator/regulator.txt
++ - power supplies for the device, as covered in
++ Documentation/devicetree/bindings/regulator/regulator.txt, depending
++ on compatible:
++ - for wlf,wm1811 and wlf,wm8958:
++ AVDD1-supply, AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply,
++ DCVDD-supply, CPVDD-supply, SPKVDD1-supply, SPKVDD2-supply
++ - for wlf,wm8994:
++ AVDD1-supply, AVDD2-supply, DBVDD-supply, DCVDD-supply, CPVDD-supply,
++ SPKVDD1-supply, SPKVDD2-supply
+
+ Optional properties:
+
+@@ -68,11 +74,11 @@ codec: wm8994@1a {
+
+ lineout1-se;
+
++ AVDD1-supply = <®ulator>;
+ AVDD2-supply = <®ulator>;
+ CPVDD-supply = <®ulator>;
+- DBVDD1-supply = <®ulator>;
+- DBVDD2-supply = <®ulator>;
+- DBVDD3-supply = <®ulator>;
++ DBVDD-supply = <®ulator>;
++ DCVDD-supply = <®ulator>;
+ SPKVDD1-supply = <®ulator>;
+ SPKVDD2-supply = <®ulator>;
+ };
+diff --git a/Documentation/devicetree/bindings/spi/spi_qsd.txt b/Documentation/devicetree/bindings/spi/spi_qsd.txt
+index 1edf0820398a..7c0b2a4df208 100644
+--- a/Documentation/devicetree/bindings/spi/spi_qsd.txt
++++ b/Documentation/devicetree/bindings/spi/spi_qsd.txt
+@@ -36,7 +36,13 @@ Optional properties:
+ - qcom,rt-priority : whether spi message queue is set to run as a realtime task.
+ With this spi transaction message pump with high (realtime) priority to reduce
+ the transfer latency on the bus by minimising the delay between a transfer request
+- - qcom,shared : whether this qup is shared with other ee's
++ - qcom,shared : whether this qup is shared with other ee's and client driver is not
++ in control of the spi driver get_sync/put_sync_suspend. Spi driver will
++ take care of resources management like clock, gpios and bam for EE switching.
++ - qcom,shared_ee : whether this qup is used by other ee's and client driver is in
++ control of the spi driver get_sync/put_sync_suspend. Resources management
++ of clock, gpios and bam for EE switching will be taken care when client calls spi
++ get_sync/put_sync_suspend APIs.
+
+ Optional properties which are required for support of BAM-mode:
+ - qcom,ver-reg-exists : Boolean. When present, allows driver to verify if HW
+diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
+index 3b0b909c6fab..c00ba8c43126 100644
+--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
++++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
+@@ -161,6 +161,7 @@ lenovo Lenovo Group Ltd.
+ lg LG Corporation
+ linaro Linaro Limited
+ linux Linux-specific binding
++liteon Lite-On Technology Corporation
+ lltc Linear Technology Corporation
+ lsi LSI Corp. (LSI Logic)
+ lt Lontium Semiconductor Corporation
+diff --git a/Documentation/filesystems/affs.txt b/Documentation/filesystems/affs.txt
+index 71b63c2b9841..a8f1a58e3692 100644
+--- a/Documentation/filesystems/affs.txt
++++ b/Documentation/filesystems/affs.txt
+@@ -93,13 +93,15 @@ The Amiga protection flags RWEDRWEDHSPARWED are handled as follows:
+
+ - R maps to r for user, group and others. On directories, R implies x.
+
+- - If both W and D are allowed, w will be set.
++ - W maps to w.
+
+ - E maps to x.
+
+- - H and P are always retained and ignored under Linux.
++ - D is ignored.
+
+- - A is always reset when a file is written to.
++ - H, S and P are always retained and ignored under Linux.
++
++ - A is cleared when a file is written to.
+
+ User id and group id will be used unless set[gu]id are given as mount
+ options. Since most of the Amiga file systems are single user systems
+@@ -111,11 +113,13 @@ Linux -> Amiga:
+
+ The Linux rwxrwxrwx file mode is handled as follows:
+
+- - r permission will set R for user, group and others.
++ - r permission will allow R for user, group and others.
++
++ - w permission will allow W for user, group and others.
+
+- - w permission will set W and D for user, group and others.
++ - x permission of the user will allow E for plain files.
+
+- - x permission of the user will set E for plain files.
++ - D will be allowed for user, group and others.
+
+ - All other flags (suid, sgid, ...) are ignored and will
+ not be retained.
+diff --git a/Documentation/filesystems/mandatory-locking.txt b/Documentation/filesystems/mandatory-locking.txt
+index 0979d1d2ca8b..a251ca33164a 100644
+--- a/Documentation/filesystems/mandatory-locking.txt
++++ b/Documentation/filesystems/mandatory-locking.txt
+@@ -169,3 +169,13 @@ havoc if they lock crucial files. The way around it is to change the file
+ permissions (remove the setgid bit) before trying to read or write to it.
+ Of course, that might be a bit tricky if the system is hung :-(
+
++7. The "mand" mount option
++--------------------------
++Mandatory locking is disabled on all filesystems by default, and must be
++administratively enabled by mounting with "-o mand". That mount option
++is only allowed if the mounting task has the CAP_SYS_ADMIN capability.
++
++Since kernel v4.5, it is possible to disable mandatory locking
++altogether by setting CONFIG_MANDATORY_FILE_LOCKING to "n". A kernel
++with this disabled will reject attempts to mount filesystems with the
++"mand" mount option with the error status EPERM.
+diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
+index a2bff3173088..a55b528cdf1e 100644
+--- a/Documentation/kernel-parameters.txt
++++ b/Documentation/kernel-parameters.txt
+@@ -2549,6 +2549,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
+ mds=off [X86]
+ tsx_async_abort=off [X86]
+ kvm.nx_huge_pages=off [X86]
++ no_entry_flush [PPC]
++ no_uaccess_flush [PPC]
+
+ Exceptions:
+ This does not have any effect on
+@@ -2855,6 +2857,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
+
+ noefi Disable EFI runtime services support.
+
++ no_entry_flush [PPC] Don't flush the L1-D cache when entering the kernel.
++
+ noexec [IA-64]
+
+ noexec [X86]
+@@ -2904,6 +2908,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
+ nospec_store_bypass_disable
+ [HW] Disable all mitigations for the Speculative Store Bypass vulnerability
+
++ no_uaccess_flush
++ [PPC] Don't flush the L1-D cache after accessing user data.
++
+ noxsave [BUGS=X86] Disables x86 extended register state save
+ and restore using xsave. The kernel will fallback to
+ enabling legacy floating-point and sse state.
+@@ -5054,6 +5061,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
+ Disables the PV optimizations forcing the HVM guest to
+ run as generic HVM guest with no PV drivers.
+
++ xen.event_eoi_delay= [XEN]
++ How long to delay EOI handling in case of event
++ storms (jiffies). Default is 10.
++
++ xen.event_loop_timeout= [XEN]
++ After which time (jiffies) the event handling loop
++ should start to delay EOI handling. Default is 2.
++
+ xirc2ps_cs= [NET,PCMCIA]
+ Format:
+ ,,,,,[,[,[,]]]
+diff --git a/Documentation/media/uapi/dvb/fe-get-property.rst b/Documentation/media/uapi/dvb/fe-get-property.rst
+index 015d4db597b5..c80c5fc6e916 100644
+--- a/Documentation/media/uapi/dvb/fe-get-property.rst
++++ b/Documentation/media/uapi/dvb/fe-get-property.rst
+@@ -48,8 +48,11 @@ depends on the delivery system and on the device:
+
+ - This call requires read/write access to the device.
+
+- - At return, the values are updated to reflect the actual parameters
+- used.
++.. note::
++
++ At return, the values aren't updated to reflect the actual
++ parameters used. If the actual parameters are needed, an explicit
++ call to ``FE_GET_PROPERTY`` is needed.
+
+ - ``FE_GET_PROPERTY:``
+
+diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt
+index 54de8ff14627..f29ca1c89375 100644
+--- a/Documentation/networking/ip-sysctl.txt
++++ b/Documentation/networking/ip-sysctl.txt
+@@ -1752,6 +1752,16 @@ stable_secret - IPv6 address
+
+ By default the stable secret is unset.
+
++addr_gen_mode - INTEGER
++ Defines how link-local and autoconf addresses are generated.
++
++ 0: generate address based on EUI64 (default)
++ 1: do no generate a link-local address, use EUI64 for addresses generated
++ from autoconf
++ 2: generate stable privacy addresses, using the secret from
++ stable_secret (RFC7217)
++ 3: generate stable privacy addresses, using a random secret if unset
++
+ drop_unicast_in_l2_multicast - BOOLEAN
+ Drop any unicast IPv6 packets that are received in link-layer
+ multicast (or broadcast) frames.
+diff --git a/Documentation/sphinx/parse-headers.pl b/Documentation/sphinx/parse-headers.pl
+index db0186a7618f..299b0f82af27 100755
+--- a/Documentation/sphinx/parse-headers.pl
++++ b/Documentation/sphinx/parse-headers.pl
+@@ -1,4 +1,4 @@
+-#!/usr/bin/perl
++#!/usr/bin/env perl
+ use strict;
+ use Text::Tabs;
+
+diff --git a/Documentation/target/tcm_mod_builder.py b/Documentation/target/tcm_mod_builder.py
+index 94bf6944bb1e..7e79ff6b09e0 100755
+--- a/Documentation/target/tcm_mod_builder.py
++++ b/Documentation/target/tcm_mod_builder.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/python
++#!/usr/bin/env python
+ # The TCM v4 multi-protocol fabric module generation script for drivers/target/$NEW_MOD
+ #
+ # Copyright (c) 2010 Rising Tide Systems
+diff --git a/Documentation/trace/postprocess/decode_msr.py b/Documentation/trace/postprocess/decode_msr.py
+index 0ab40e0db580..aa9cc7abd5c2 100644
+--- a/Documentation/trace/postprocess/decode_msr.py
++++ b/Documentation/trace/postprocess/decode_msr.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/python
++#!/usr/bin/env python
+ # add symbolic names to read_msr / write_msr in trace
+ # decode_msr msr-index.h < trace
+ import sys
+diff --git a/Documentation/trace/postprocess/trace-pagealloc-postprocess.pl b/Documentation/trace/postprocess/trace-pagealloc-postprocess.pl
+index 0a120aae33ce..b9b7d80c2f9d 100644
+--- a/Documentation/trace/postprocess/trace-pagealloc-postprocess.pl
++++ b/Documentation/trace/postprocess/trace-pagealloc-postprocess.pl
+@@ -1,4 +1,4 @@
+-#!/usr/bin/perl
++#!/usr/bin/env perl
+ # This is a POC (proof of concept or piece of crap, take your pick) for reading the
+ # text representation of trace output related to page allocation. It makes an attempt
+ # to extract some high-level information on what is going on. The accuracy of the parser
+diff --git a/Documentation/trace/postprocess/trace-vmscan-postprocess.pl b/Documentation/trace/postprocess/trace-vmscan-postprocess.pl
+index 8f961ef2b457..7749cdf372f7 100644
+--- a/Documentation/trace/postprocess/trace-vmscan-postprocess.pl
++++ b/Documentation/trace/postprocess/trace-vmscan-postprocess.pl
+@@ -1,4 +1,4 @@
+-#!/usr/bin/perl
++#!/usr/bin/env perl
+ # This is a POC for reading the text representation of trace output related to
+ # page reclaim. It makes an attempt to extract some high-level information on
+ # what is going on. The accuracy of the parser may vary
+diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
+index d1908e50b506..b8f5bf2a890a 100644
+--- a/Documentation/virtual/kvm/api.txt
++++ b/Documentation/virtual/kvm/api.txt
+@@ -3534,9 +3534,11 @@ EOI was received.
+ #define KVM_EXIT_HYPERV_SYNIC 1
+ #define KVM_EXIT_HYPERV_HCALL 2
+ __u32 type;
++ __u32 pad1;
+ union {
+ struct {
+ __u32 msr;
++ __u32 pad2;
+ __u64 control;
+ __u64 evt_page;
+ __u64 msg_page;
+diff --git a/Makefile b/Makefile
+index 63779eb0dde7..2c6dddb6edf7 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 9
+-SUBLEVEL = 227
++SUBLEVEL = 282
+ EXTRAVERSION =
+ NAME = Roaring Lionus
+
+@@ -318,12 +318,8 @@ KBUILD_MODULES :=
+ KBUILD_BUILTIN := 1
+
+ # If we have only "make modules", don't compile built-in objects.
+-# When we're building modules with modversions, we need to consider
+-# the built-in objects during the descend as well, in order to
+-# make sure the checksums are up to date before we record them.
+-
+ ifeq ($(MAKECMDGOALS),modules)
+- KBUILD_BUILTIN := $(if $(CONFIG_MODVERSIONS),1)
++ KBUILD_BUILTIN :=
+ endif
+
+ # If we have "make modules", compile modules
+@@ -359,7 +355,7 @@ OBJDUMP = $(CROSS_COMPILE)objdump
+ AWK = awk
+ GENKSYMS = scripts/genksyms/genksyms
+ INSTALLKERNEL := installkernel
+-DEPMOD = /sbin/depmod
++DEPMOD = depmod
+ PERL = perl
+ PYTHON = python
+ CHECK = sparse
+@@ -801,12 +797,11 @@ KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare)
+ # See modpost pattern 2
+ KBUILD_CFLAGS += $(call cc-option, -mno-global-merge,)
+ KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior)
+-else
++endif
+
+ # These warnings generated too much noise in a regular build.
+ # Use make W=1 to enable them (see scripts/Makefile.extrawarn)
+ KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
+-endif
+
+ KBUILD_CFLAGS += $(call cc-disable-warning, unused-const-variable)
+ ifdef CONFIG_FRAME_POINTER
+@@ -845,6 +840,13 @@ ifdef CONFIG_FUNCTION_TRACER
+ ifndef CC_FLAGS_FTRACE
+ CC_FLAGS_FTRACE := -pg
+ endif
++ifdef CONFIG_FTRACE_MCOUNT_RECORD
++ # gcc 5 supports generating the mcount tables directly
++ ifeq ($(call cc-option-yn,-mrecord-mcount),y)
++ CC_FLAGS_FTRACE += -mrecord-mcount
++ export CC_USING_RECORD_MCOUNT := 1
++ endif
++endif
+ export CC_FLAGS_FTRACE
+ ifdef CONFIG_HAVE_FENTRY
+ CC_USING_FENTRY := $(call cc-option, -mfentry -DCC_USING_FENTRY)
+@@ -924,12 +926,6 @@ KBUILD_CFLAGS += $(call cc-option,-Werror=designated-init)
+ # change __FILE__ to the relative path from the srctree
+ KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
+
+-# ensure -fcf-protection is disabled when using retpoline as it is
+-# incompatible with -mindirect-branch=thunk-extern
+-ifdef CONFIG_RETPOLINE
+-KBUILD_CFLAGS += $(call cc-option,-fcf-protection=none)
+-endif
+-
+ # use the deterministic mode of AR if available
+ KBUILD_ARFLAGS := $(call ar-option,D)
+
+@@ -1235,17 +1231,22 @@ endif
+ # needs to be updated, so this check is forced on all builds
+
+ uts_len := 64
++ifneq (,$(BUILD_NUMBER))
++ UTS_RELEASE=$(KERNELRELEASE)-ab$(BUILD_NUMBER)
++else
++ UTS_RELEASE=$(KERNELRELEASE)
++endif
+ define filechk_utsrelease.h
+- if [ `echo -n "$(KERNELRELEASE)" | wc -c ` -gt $(uts_len) ]; then \
+- echo '"$(KERNELRELEASE)" exceeds $(uts_len) characters' >&2; \
+- exit 1; \
+- fi; \
+- (echo \#define UTS_RELEASE \"$(KERNELRELEASE)\";)
++ if [ `echo -n "$(UTS_RELEASE)" | wc -c ` -gt $(uts_len) ]; then \
++ echo '"$(UTS_RELEASE)" exceeds $(uts_len) characters' >&2; \
++ exit 1; \
++ fi; \
++ (echo \#define UTS_RELEASE \"$(UTS_RELEASE)\";)
+ endef
+
+ define filechk_version.h
+ (echo \#define LINUX_VERSION_CODE $(shell \
+- expr $(VERSION) \* 65536 + 0$(PATCHLEVEL) \* 256 + 0$(SUBLEVEL)); \
++ expr $(VERSION) \* 65536 + 0$(PATCHLEVEL) \* 256 + 255); \
+ echo '#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))';)
+ endef
+
+@@ -1339,6 +1340,13 @@ ifdef CONFIG_MODULES
+
+ all: modules
+
++# When we're building modules with modversions, we need to consider
++# the built-in objects during the descend as well, in order to
++# make sure the checksums are up to date before we record them.
++ifdef CONFIG_MODVERSIONS
++ KBUILD_BUILTIN := 1
++endif
++
+ # Build modules
+ #
+ # A module can be listed more than once in obj-m resulting in
+diff --git a/arch/alpha/include/asm/io.h b/arch/alpha/include/asm/io.h
+index ff4049155c84..355aec0867f4 100644
+--- a/arch/alpha/include/asm/io.h
++++ b/arch/alpha/include/asm/io.h
+@@ -491,10 +491,10 @@ extern inline void writeq(u64 b, volatile void __iomem *addr)
+ }
+ #endif
+
+-#define ioread16be(p) be16_to_cpu(ioread16(p))
+-#define ioread32be(p) be32_to_cpu(ioread32(p))
+-#define iowrite16be(v,p) iowrite16(cpu_to_be16(v), (p))
+-#define iowrite32be(v,p) iowrite32(cpu_to_be32(v), (p))
++#define ioread16be(p) swab16(ioread16(p))
++#define ioread32be(p) swab32(ioread32(p))
++#define iowrite16be(v,p) iowrite16(swab16(v), (p))
++#define iowrite32be(v,p) iowrite32(swab32(v), (p))
+
+ #define inb_p inb
+ #define inw_p inw
+diff --git a/arch/alpha/include/asm/uaccess.h b/arch/alpha/include/asm/uaccess.h
+index 94f587535dee..181254a20a2a 100644
+--- a/arch/alpha/include/asm/uaccess.h
++++ b/arch/alpha/include/asm/uaccess.h
+@@ -341,45 +341,17 @@ __asm__ __volatile__("1: stb %r2,%1\n" \
+ * Complex access routines
+ */
+
+-/* This little bit of silliness is to get the GP loaded for a function
+- that ordinarily wouldn't. Otherwise we could have it done by the macro
+- directly, which can be optimized the linker. */
+-#ifdef MODULE
+-#define __module_address(sym) "r"(sym),
+-#define __module_call(ra, arg, sym) "jsr $" #ra ",(%" #arg ")," #sym
+-#else
+-#define __module_address(sym)
+-#define __module_call(ra, arg, sym) "bsr $" #ra "," #sym " !samegp"
+-#endif
+-
+-extern void __copy_user(void);
+-
+-extern inline long
+-__copy_tofrom_user_nocheck(void *to, const void *from, long len)
+-{
+- register void * __cu_to __asm__("$6") = to;
+- register const void * __cu_from __asm__("$7") = from;
+- register long __cu_len __asm__("$0") = len;
+-
+- __asm__ __volatile__(
+- __module_call(28, 3, __copy_user)
+- : "=r" (__cu_len), "=r" (__cu_from), "=r" (__cu_to)
+- : __module_address(__copy_user)
+- "0" (__cu_len), "1" (__cu_from), "2" (__cu_to)
+- : "$1", "$2", "$3", "$4", "$5", "$28", "memory");
+-
+- return __cu_len;
+-}
++extern long __copy_user(void *to, const void *from, long len);
+
+-#define __copy_to_user(to, from, n) \
+-({ \
+- __chk_user_ptr(to); \
+- __copy_tofrom_user_nocheck((__force void *)(to), (from), (n)); \
++#define __copy_to_user(to, from, n) \
++({ \
++ __chk_user_ptr(to); \
++ __copy_user((__force void *)(to), (from), (n)); \
+ })
+-#define __copy_from_user(to, from, n) \
+-({ \
+- __chk_user_ptr(from); \
+- __copy_tofrom_user_nocheck((to), (__force void *)(from), (n)); \
++#define __copy_from_user(to, from, n) \
++({ \
++ __chk_user_ptr(from); \
++ __copy_user((to), (__force void *)(from), (n)); \
+ })
+
+ #define __copy_to_user_inatomic __copy_to_user
+@@ -389,7 +361,7 @@ extern inline long
+ copy_to_user(void __user *to, const void *from, long n)
+ {
+ if (likely(__access_ok((unsigned long)to, n, get_fs())))
+- n = __copy_tofrom_user_nocheck((__force void *)to, from, n);
++ n = __copy_user((__force void *)to, from, n);
+ return n;
+ }
+
+@@ -404,21 +376,7 @@ copy_from_user(void *to, const void __user *from, long n)
+ return res;
+ }
+
+-extern void __do_clear_user(void);
+-
+-extern inline long
+-__clear_user(void __user *to, long len)
+-{
+- register void __user * __cl_to __asm__("$6") = to;
+- register long __cl_len __asm__("$0") = len;
+- __asm__ __volatile__(
+- __module_call(28, 2, __do_clear_user)
+- : "=r"(__cl_len), "=r"(__cl_to)
+- : __module_address(__do_clear_user)
+- "0"(__cl_len), "1"(__cl_to)
+- : "$1", "$2", "$3", "$4", "$5", "$28", "memory");
+- return __cl_len;
+-}
++extern long __clear_user(void __user *to, long len);
+
+ extern inline long
+ clear_user(void __user *to, long len)
+@@ -428,9 +386,6 @@ clear_user(void __user *to, long len)
+ return len;
+ }
+
+-#undef __module_address
+-#undef __module_call
+-
+ #define user_addr_max() \
+ (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
+
+diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
+index 46bf263c3153..d2477a502ce7 100644
+--- a/arch/alpha/kernel/smp.c
++++ b/arch/alpha/kernel/smp.c
+@@ -584,7 +584,7 @@ void
+ smp_send_stop(void)
+ {
+ cpumask_t to_whom;
+- cpumask_copy(&to_whom, cpu_possible_mask);
++ cpumask_copy(&to_whom, cpu_online_mask);
+ cpumask_clear_cpu(smp_processor_id(), &to_whom);
+ #ifdef DEBUG_IPI_MSG
+ if (hard_smp_processor_id() != boot_cpu_id)
+diff --git a/arch/alpha/lib/Makefile b/arch/alpha/lib/Makefile
+index 59660743237c..a80815960364 100644
+--- a/arch/alpha/lib/Makefile
++++ b/arch/alpha/lib/Makefile
+@@ -20,12 +20,8 @@ lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \
+ checksum.o \
+ csum_partial_copy.o \
+ $(ev67-y)strlen.o \
+- $(ev67-y)strcat.o \
+- strcpy.o \
+- $(ev67-y)strncat.o \
+- strncpy.o \
+- $(ev6-y)stxcpy.o \
+- $(ev6-y)stxncpy.o \
++ stycpy.o \
++ styncpy.o \
+ $(ev67-y)strchr.o \
+ $(ev67-y)strrchr.o \
+ $(ev6-y)memchr.o \
+@@ -46,11 +42,20 @@ AFLAGS___remqu.o = -DREM
+ AFLAGS___divlu.o = -DDIV -DINTSIZE
+ AFLAGS___remlu.o = -DREM -DINTSIZE
+
+-$(obj)/__divqu.o: $(obj)/$(ev6-y)divide.S
+- $(cmd_as_o_S)
+-$(obj)/__remqu.o: $(obj)/$(ev6-y)divide.S
+- $(cmd_as_o_S)
+-$(obj)/__divlu.o: $(obj)/$(ev6-y)divide.S
+- $(cmd_as_o_S)
+-$(obj)/__remlu.o: $(obj)/$(ev6-y)divide.S
+- $(cmd_as_o_S)
++$(addprefix $(obj)/,__divqu.o __remqu.o __divlu.o __remlu.o): \
++ $(src)/$(ev6-y)divide.S FORCE
++ $(call if_changed_rule,as_o_S)
++
++# There are direct branches between {str*cpy,str*cat} and stx*cpy.
++# Ensure the branches are within range by merging these objects.
++
++LDFLAGS_stycpy.o := -r
++LDFLAGS_styncpy.o := -r
++
++$(obj)/stycpy.o: $(obj)/strcpy.o $(obj)/$(ev67-y)strcat.o \
++ $(obj)/$(ev6-y)stxcpy.o FORCE
++ $(call if_changed,ld)
++
++$(obj)/styncpy.o: $(obj)/strncpy.o $(obj)/$(ev67-y)strncat.o \
++ $(obj)/$(ev6-y)stxncpy.o FORCE
++ $(call if_changed,ld)
+diff --git a/arch/alpha/lib/clear_user.S b/arch/alpha/lib/clear_user.S
+index bf5b931866ba..006f469fef73 100644
+--- a/arch/alpha/lib/clear_user.S
++++ b/arch/alpha/lib/clear_user.S
+@@ -8,21 +8,6 @@
+ * right "bytes left to zero" value (and that it is updated only _after_
+ * a successful copy). There is also some rather minor exception setup
+ * stuff.
+- *
+- * NOTE! This is not directly C-callable, because the calling semantics
+- * are different:
+- *
+- * Inputs:
+- * length in $0
+- * destination address in $6
+- * exception pointer in $7
+- * return address in $28 (exceptions expect it there)
+- *
+- * Outputs:
+- * bytes left to copy in $0
+- *
+- * Clobbers:
+- * $1,$2,$3,$4,$5,$6
+ */
+ #include
+
+@@ -38,62 +23,63 @@
+ .set noreorder
+ .align 4
+
+- .globl __do_clear_user
+- .ent __do_clear_user
+- .frame $30, 0, $28
++ .globl __clear_user
++ .ent __clear_user
++ .frame $30, 0, $26
+ .prologue 0
+
+ $loop:
+ and $1, 3, $4 # e0 :
+ beq $4, 1f # .. e1 :
+
+-0: EX( stq_u $31, 0($6) ) # e0 : zero one word
++0: EX( stq_u $31, 0($16) ) # e0 : zero one word
+ subq $0, 8, $0 # .. e1 :
+ subq $4, 1, $4 # e0 :
+- addq $6, 8, $6 # .. e1 :
++ addq $16, 8, $16 # .. e1 :
+ bne $4, 0b # e1 :
+ unop # :
+
+ 1: bic $1, 3, $1 # e0 :
+ beq $1, $tail # .. e1 :
+
+-2: EX( stq_u $31, 0($6) ) # e0 : zero four words
++2: EX( stq_u $31, 0($16) ) # e0 : zero four words
+ subq $0, 8, $0 # .. e1 :
+- EX( stq_u $31, 8($6) ) # e0 :
++ EX( stq_u $31, 8($16) ) # e0 :
+ subq $0, 8, $0 # .. e1 :
+- EX( stq_u $31, 16($6) ) # e0 :
++ EX( stq_u $31, 16($16) ) # e0 :
+ subq $0, 8, $0 # .. e1 :
+- EX( stq_u $31, 24($6) ) # e0 :
++ EX( stq_u $31, 24($16) ) # e0 :
+ subq $0, 8, $0 # .. e1 :
+ subq $1, 4, $1 # e0 :
+- addq $6, 32, $6 # .. e1 :
++ addq $16, 32, $16 # .. e1 :
+ bne $1, 2b # e1 :
+
+ $tail:
+ bne $2, 1f # e1 : is there a tail to do?
+- ret $31, ($28), 1 # .. e1 :
++ ret $31, ($26), 1 # .. e1 :
+
+-1: EX( ldq_u $5, 0($6) ) # e0 :
++1: EX( ldq_u $5, 0($16) ) # e0 :
+ clr $0 # .. e1 :
+ nop # e1 :
+ mskqh $5, $0, $5 # e0 :
+- EX( stq_u $5, 0($6) ) # e0 :
+- ret $31, ($28), 1 # .. e1 :
++ EX( stq_u $5, 0($16) ) # e0 :
++ ret $31, ($26), 1 # .. e1 :
+
+-__do_clear_user:
+- and $6, 7, $4 # e0 : find dest misalignment
++__clear_user:
++ and $17, $17, $0
++ and $16, 7, $4 # e0 : find dest misalignment
+ beq $0, $zerolength # .. e1 :
+ addq $0, $4, $1 # e0 : bias counter
+ and $1, 7, $2 # e1 : number of bytes in tail
+ srl $1, 3, $1 # e0 :
+ beq $4, $loop # .. e1 :
+
+- EX( ldq_u $5, 0($6) ) # e0 : load dst word to mask back in
++ EX( ldq_u $5, 0($16) ) # e0 : load dst word to mask back in
+ beq $1, $oneword # .. e1 : sub-word store?
+
+- mskql $5, $6, $5 # e0 : take care of misaligned head
+- addq $6, 8, $6 # .. e1 :
+- EX( stq_u $5, -8($6) ) # e0 :
++ mskql $5, $16, $5 # e0 : take care of misaligned head
++ addq $16, 8, $16 # .. e1 :
++ EX( stq_u $5, -8($16) ) # e0 :
+ addq $0, $4, $0 # .. e1 : bytes left -= 8 - misalignment
+ subq $1, 1, $1 # e0 :
+ subq $0, 8, $0 # .. e1 :
+@@ -101,15 +87,15 @@ __do_clear_user:
+ unop # :
+
+ $oneword:
+- mskql $5, $6, $4 # e0 :
++ mskql $5, $16, $4 # e0 :
+ mskqh $5, $2, $5 # e0 :
+ or $5, $4, $5 # e1 :
+- EX( stq_u $5, 0($6) ) # e0 :
++ EX( stq_u $5, 0($16) ) # e0 :
+ clr $0 # .. e1 :
+
+ $zerolength:
+ $exception:
+- ret $31, ($28), 1 # .. e1 :
++ ret $31, ($26), 1 # .. e1 :
+
+- .end __do_clear_user
+- EXPORT_SYMBOL(__do_clear_user)
++ .end __clear_user
++ EXPORT_SYMBOL(__clear_user)
+diff --git a/arch/alpha/lib/copy_user.S b/arch/alpha/lib/copy_user.S
+index 509f62b65311..159f1b7e6e49 100644
+--- a/arch/alpha/lib/copy_user.S
++++ b/arch/alpha/lib/copy_user.S
+@@ -9,21 +9,6 @@
+ * contains the right "bytes left to copy" value (and that it is updated
+ * only _after_ a successful copy). There is also some rather minor
+ * exception setup stuff..
+- *
+- * NOTE! This is not directly C-callable, because the calling semantics are
+- * different:
+- *
+- * Inputs:
+- * length in $0
+- * destination address in $6
+- * source address in $7
+- * return address in $28
+- *
+- * Outputs:
+- * bytes left to copy in $0
+- *
+- * Clobbers:
+- * $1,$2,$3,$4,$5,$6,$7
+ */
+
+ #include
+@@ -49,58 +34,59 @@
+ .ent __copy_user
+ __copy_user:
+ .prologue 0
+- and $6,7,$3
++ and $18,$18,$0
++ and $16,7,$3
+ beq $0,$35
+ beq $3,$36
+ subq $3,8,$3
+ .align 4
+ $37:
+- EXI( ldq_u $1,0($7) )
+- EXO( ldq_u $2,0($6) )
+- extbl $1,$7,$1
+- mskbl $2,$6,$2
+- insbl $1,$6,$1
++ EXI( ldq_u $1,0($17) )
++ EXO( ldq_u $2,0($16) )
++ extbl $1,$17,$1
++ mskbl $2,$16,$2
++ insbl $1,$16,$1
+ addq $3,1,$3
+ bis $1,$2,$1
+- EXO( stq_u $1,0($6) )
++ EXO( stq_u $1,0($16) )
+ subq $0,1,$0
+- addq $6,1,$6
+- addq $7,1,$7
++ addq $16,1,$16
++ addq $17,1,$17
+ beq $0,$41
+ bne $3,$37
+ $36:
+- and $7,7,$1
++ and $17,7,$1
+ bic $0,7,$4
+ beq $1,$43
+ beq $4,$48
+- EXI( ldq_u $3,0($7) )
++ EXI( ldq_u $3,0($17) )
+ .align 4
+ $50:
+- EXI( ldq_u $2,8($7) )
++ EXI( ldq_u $2,8($17) )
+ subq $4,8,$4
+- extql $3,$7,$3
+- extqh $2,$7,$1
++ extql $3,$17,$3
++ extqh $2,$17,$1
+ bis $3,$1,$1
+- EXO( stq $1,0($6) )
+- addq $7,8,$7
++ EXO( stq $1,0($16) )
++ addq $17,8,$17
+ subq $0,8,$0
+- addq $6,8,$6
++ addq $16,8,$16
+ bis $2,$2,$3
+ bne $4,$50
+ $48:
+ beq $0,$41
+ .align 4
+ $57:
+- EXI( ldq_u $1,0($7) )
+- EXO( ldq_u $2,0($6) )
+- extbl $1,$7,$1
+- mskbl $2,$6,$2
+- insbl $1,$6,$1
++ EXI( ldq_u $1,0($17) )
++ EXO( ldq_u $2,0($16) )
++ extbl $1,$17,$1
++ mskbl $2,$16,$2
++ insbl $1,$16,$1
+ bis $1,$2,$1
+- EXO( stq_u $1,0($6) )
++ EXO( stq_u $1,0($16) )
+ subq $0,1,$0
+- addq $6,1,$6
+- addq $7,1,$7
++ addq $16,1,$16
++ addq $17,1,$17
+ bne $0,$57
+ br $31,$41
+ .align 4
+@@ -108,27 +94,27 @@ $43:
+ beq $4,$65
+ .align 4
+ $66:
+- EXI( ldq $1,0($7) )
++ EXI( ldq $1,0($17) )
+ subq $4,8,$4
+- EXO( stq $1,0($6) )
+- addq $7,8,$7
++ EXO( stq $1,0($16) )
++ addq $17,8,$17
+ subq $0,8,$0
+- addq $6,8,$6
++ addq $16,8,$16
+ bne $4,$66
+ $65:
+ beq $0,$41
+- EXI( ldq $2,0($7) )
+- EXO( ldq $1,0($6) )
++ EXI( ldq $2,0($17) )
++ EXO( ldq $1,0($16) )
+ mskql $2,$0,$2
+ mskqh $1,$0,$1
+ bis $2,$1,$2
+- EXO( stq $2,0($6) )
++ EXO( stq $2,0($16) )
+ bis $31,$31,$0
+ $41:
+ $35:
+ $exitin:
+ $exitout:
+- ret $31,($28),1
++ ret $31,($26),1
+
+ .end __copy_user
+ EXPORT_SYMBOL(__copy_user)
+diff --git a/arch/alpha/lib/ev6-clear_user.S b/arch/alpha/lib/ev6-clear_user.S
+index 05bef6b50598..e179e4757ef8 100644
+--- a/arch/alpha/lib/ev6-clear_user.S
++++ b/arch/alpha/lib/ev6-clear_user.S
+@@ -9,21 +9,6 @@
+ * a successful copy). There is also some rather minor exception setup
+ * stuff.
+ *
+- * NOTE! This is not directly C-callable, because the calling semantics
+- * are different:
+- *
+- * Inputs:
+- * length in $0
+- * destination address in $6
+- * exception pointer in $7
+- * return address in $28 (exceptions expect it there)
+- *
+- * Outputs:
+- * bytes left to copy in $0
+- *
+- * Clobbers:
+- * $1,$2,$3,$4,$5,$6
+- *
+ * Much of the information about 21264 scheduling/coding comes from:
+ * Compiler Writer's Guide for the Alpha 21264
+ * abbreviated as 'CWG' in other comments here
+@@ -56,14 +41,15 @@
+ .set noreorder
+ .align 4
+
+- .globl __do_clear_user
+- .ent __do_clear_user
+- .frame $30, 0, $28
++ .globl __clear_user
++ .ent __clear_user
++ .frame $30, 0, $26
+ .prologue 0
+
+ # Pipeline info : Slotting & Comments
+-__do_clear_user:
+- and $6, 7, $4 # .. E .. .. : find dest head misalignment
++__clear_user:
++ and $17, $17, $0
++ and $16, 7, $4 # .. E .. .. : find dest head misalignment
+ beq $0, $zerolength # U .. .. .. : U L U L
+
+ addq $0, $4, $1 # .. .. .. E : bias counter
+@@ -75,14 +61,14 @@ __do_clear_user:
+
+ /*
+ * Head is not aligned. Write (8 - $4) bytes to head of destination
+- * This means $6 is known to be misaligned
++ * This means $16 is known to be misaligned
+ */
+- EX( ldq_u $5, 0($6) ) # .. .. .. L : load dst word to mask back in
++ EX( ldq_u $5, 0($16) ) # .. .. .. L : load dst word to mask back in
+ beq $1, $onebyte # .. .. U .. : sub-word store?
+- mskql $5, $6, $5 # .. U .. .. : take care of misaligned head
+- addq $6, 8, $6 # E .. .. .. : L U U L
++ mskql $5, $16, $5 # .. U .. .. : take care of misaligned head
++ addq $16, 8, $16 # E .. .. .. : L U U L
+
+- EX( stq_u $5, -8($6) ) # .. .. .. L :
++ EX( stq_u $5, -8($16) ) # .. .. .. L :
+ subq $1, 1, $1 # .. .. E .. :
+ addq $0, $4, $0 # .. E .. .. : bytes left -= 8 - misalignment
+ subq $0, 8, $0 # E .. .. .. : U L U L
+@@ -93,11 +79,11 @@ __do_clear_user:
+ * values upon initial entry to the loop
+ * $1 is number of quadwords to clear (zero is a valid value)
+ * $2 is number of trailing bytes (0..7) ($2 never used...)
+- * $6 is known to be aligned 0mod8
++ * $16 is known to be aligned 0mod8
+ */
+ $headalign:
+ subq $1, 16, $4 # .. .. .. E : If < 16, we can not use the huge loop
+- and $6, 0x3f, $2 # .. .. E .. : Forward work for huge loop
++ and $16, 0x3f, $2 # .. .. E .. : Forward work for huge loop
+ subq $2, 0x40, $3 # .. E .. .. : bias counter (huge loop)
+ blt $4, $trailquad # U .. .. .. : U L U L
+
+@@ -114,21 +100,21 @@ $headalign:
+ beq $3, $bigalign # U .. .. .. : U L U L : Aligned 0mod64
+
+ $alignmod64:
+- EX( stq_u $31, 0($6) ) # .. .. .. L
++ EX( stq_u $31, 0($16) ) # .. .. .. L
+ addq $3, 8, $3 # .. .. E ..
+ subq $0, 8, $0 # .. E .. ..
+ nop # E .. .. .. : U L U L
+
+ nop # .. .. .. E
+ subq $1, 1, $1 # .. .. E ..
+- addq $6, 8, $6 # .. E .. ..
++ addq $16, 8, $16 # .. E .. ..
+ blt $3, $alignmod64 # U .. .. .. : U L U L
+
+ $bigalign:
+ /*
+ * $0 is the number of bytes left
+ * $1 is the number of quads left
+- * $6 is aligned 0mod64
++ * $16 is aligned 0mod64
+ * we know that we'll be taking a minimum of one trip through
+ * CWG Section 3.7.6: do not expect a sustained store rate of > 1/cycle
+ * We are _not_ going to update $0 after every single store. That
+@@ -145,39 +131,39 @@ $bigalign:
+ nop # E :
+ nop # E :
+ nop # E :
+- bis $6,$6,$3 # E : U L U L : Initial wh64 address is dest
++ bis $16,$16,$3 # E : U L U L : Initial wh64 address is dest
+ /* This might actually help for the current trip... */
+
+ $do_wh64:
+ wh64 ($3) # .. .. .. L1 : memory subsystem hint
+ subq $1, 16, $4 # .. .. E .. : Forward calculation - repeat the loop?
+- EX( stq_u $31, 0($6) ) # .. L .. ..
++ EX( stq_u $31, 0($16) ) # .. L .. ..
+ subq $0, 8, $0 # E .. .. .. : U L U L
+
+- addq $6, 128, $3 # E : Target address of wh64
+- EX( stq_u $31, 8($6) ) # L :
+- EX( stq_u $31, 16($6) ) # L :
++ addq $16, 128, $3 # E : Target address of wh64
++ EX( stq_u $31, 8($16) ) # L :
++ EX( stq_u $31, 16($16) ) # L :
+ subq $0, 16, $0 # E : U L L U
+
+ nop # E :
+- EX( stq_u $31, 24($6) ) # L :
+- EX( stq_u $31, 32($6) ) # L :
++ EX( stq_u $31, 24($16) ) # L :
++ EX( stq_u $31, 32($16) ) # L :
+ subq $0, 168, $5 # E : U L L U : two trips through the loop left?
+ /* 168 = 192 - 24, since we've already completed some stores */
+
+ subq $0, 16, $0 # E :
+- EX( stq_u $31, 40($6) ) # L :
+- EX( stq_u $31, 48($6) ) # L :
+- cmovlt $5, $6, $3 # E : U L L U : Latency 2, extra mapping cycle
++ EX( stq_u $31, 40($16) ) # L :
++ EX( stq_u $31, 48($16) ) # L :
++ cmovlt $5, $16, $3 # E : U L L U : Latency 2, extra mapping cycle
+
+ subq $1, 8, $1 # E :
+ subq $0, 16, $0 # E :
+- EX( stq_u $31, 56($6) ) # L :
++ EX( stq_u $31, 56($16) ) # L :
+ nop # E : U L U L
+
+ nop # E :
+ subq $0, 8, $0 # E :
+- addq $6, 64, $6 # E :
++ addq $16, 64, $16 # E :
+ bge $4, $do_wh64 # U : U L U L
+
+ $trailquad:
+@@ -190,14 +176,14 @@ $trailquad:
+ beq $1, $trailbytes # U .. .. .. : U L U L : Only 0..7 bytes to go
+
+ $onequad:
+- EX( stq_u $31, 0($6) ) # .. .. .. L
++ EX( stq_u $31, 0($16) ) # .. .. .. L
+ subq $1, 1, $1 # .. .. E ..
+ subq $0, 8, $0 # .. E .. ..
+ nop # E .. .. .. : U L U L
+
+ nop # .. .. .. E
+ nop # .. .. E ..
+- addq $6, 8, $6 # .. E .. ..
++ addq $16, 8, $16 # .. E .. ..
+ bgt $1, $onequad # U .. .. .. : U L U L
+
+ # We have an unknown number of bytes left to go.
+@@ -211,9 +197,9 @@ $trailbytes:
+ # so we will use $0 as the loop counter
+ # We know for a fact that $0 > 0 zero due to previous context
+ $onebyte:
+- EX( stb $31, 0($6) ) # .. .. .. L
++ EX( stb $31, 0($16) ) # .. .. .. L
+ subq $0, 1, $0 # .. .. E .. :
+- addq $6, 1, $6 # .. E .. .. :
++ addq $16, 1, $16 # .. E .. .. :
+ bgt $0, $onebyte # U .. .. .. : U L U L
+
+ $zerolength:
+@@ -221,6 +207,6 @@ $exception: # Destination for exception recovery(?)
+ nop # .. .. .. E :
+ nop # .. .. E .. :
+ nop # .. E .. .. :
+- ret $31, ($28), 1 # L0 .. .. .. : L U L U
+- .end __do_clear_user
+- EXPORT_SYMBOL(__do_clear_user)
++ ret $31, ($26), 1 # L0 .. .. .. : L U L U
++ .end __clear_user
++ EXPORT_SYMBOL(__clear_user)
+diff --git a/arch/alpha/lib/ev6-copy_user.S b/arch/alpha/lib/ev6-copy_user.S
+index be720b518af9..35e6710d0700 100644
+--- a/arch/alpha/lib/ev6-copy_user.S
++++ b/arch/alpha/lib/ev6-copy_user.S
+@@ -12,21 +12,6 @@
+ * only _after_ a successful copy). There is also some rather minor
+ * exception setup stuff..
+ *
+- * NOTE! This is not directly C-callable, because the calling semantics are
+- * different:
+- *
+- * Inputs:
+- * length in $0
+- * destination address in $6
+- * source address in $7
+- * return address in $28
+- *
+- * Outputs:
+- * bytes left to copy in $0
+- *
+- * Clobbers:
+- * $1,$2,$3,$4,$5,$6,$7
+- *
+ * Much of the information about 21264 scheduling/coding comes from:
+ * Compiler Writer's Guide for the Alpha 21264
+ * abbreviated as 'CWG' in other comments here
+@@ -60,10 +45,11 @@
+ # Pipeline info: Slotting & Comments
+ __copy_user:
+ .prologue 0
+- subq $0, 32, $1 # .. E .. .. : Is this going to be a small copy?
++ andq $18, $18, $0
++ subq $18, 32, $1 # .. E .. .. : Is this going to be a small copy?
+ beq $0, $zerolength # U .. .. .. : U L U L
+
+- and $6,7,$3 # .. .. .. E : is leading dest misalignment
++ and $16,7,$3 # .. .. .. E : is leading dest misalignment
+ ble $1, $onebyteloop # .. .. U .. : 1st branch : small amount of data
+ beq $3, $destaligned # .. U .. .. : 2nd (one cycle fetcher stall)
+ subq $3, 8, $3 # E .. .. .. : L U U L : trip counter
+@@ -73,17 +59,17 @@ __copy_user:
+ * We know we have at least one trip through this loop
+ */
+ $aligndest:
+- EXI( ldbu $1,0($7) ) # .. .. .. L : Keep loads separate from stores
+- addq $6,1,$6 # .. .. E .. : Section 3.8 in the CWG
++ EXI( ldbu $1,0($17) ) # .. .. .. L : Keep loads separate from stores
++ addq $16,1,$16 # .. .. E .. : Section 3.8 in the CWG
+ addq $3,1,$3 # .. E .. .. :
+ nop # E .. .. .. : U L U L
+
+ /*
+- * the -1 is to compensate for the inc($6) done in a previous quadpack
++ * the -1 is to compensate for the inc($16) done in a previous quadpack
+ * which allows us zero dependencies within either quadpack in the loop
+ */
+- EXO( stb $1,-1($6) ) # .. .. .. L :
+- addq $7,1,$7 # .. .. E .. : Section 3.8 in the CWG
++ EXO( stb $1,-1($16) ) # .. .. .. L :
++ addq $17,1,$17 # .. .. E .. : Section 3.8 in the CWG
+ subq $0,1,$0 # .. E .. .. :
+ bne $3, $aligndest # U .. .. .. : U L U L
+
+@@ -92,29 +78,29 @@ $aligndest:
+ * If we arrived via branch, we have a minimum of 32 bytes
+ */
+ $destaligned:
+- and $7,7,$1 # .. .. .. E : Check _current_ source alignment
++ and $17,7,$1 # .. .. .. E : Check _current_ source alignment
+ bic $0,7,$4 # .. .. E .. : number bytes as a quadword loop
+- EXI( ldq_u $3,0($7) ) # .. L .. .. : Forward fetch for fallthrough code
++ EXI( ldq_u $3,0($17) ) # .. L .. .. : Forward fetch for fallthrough code
+ beq $1,$quadaligned # U .. .. .. : U L U L
+
+ /*
+- * In the worst case, we've just executed an ldq_u here from 0($7)
++ * In the worst case, we've just executed an ldq_u here from 0($17)
+ * and we'll repeat it once if we take the branch
+ */
+
+ /* Misaligned quadword loop - not unrolled. Leave it that way. */
+ $misquad:
+- EXI( ldq_u $2,8($7) ) # .. .. .. L :
++ EXI( ldq_u $2,8($17) ) # .. .. .. L :
+ subq $4,8,$4 # .. .. E .. :
+- extql $3,$7,$3 # .. U .. .. :
+- extqh $2,$7,$1 # U .. .. .. : U U L L
++ extql $3,$17,$3 # .. U .. .. :
++ extqh $2,$17,$1 # U .. .. .. : U U L L
+
+ bis $3,$1,$1 # .. .. .. E :
+- EXO( stq $1,0($6) ) # .. .. L .. :
+- addq $7,8,$7 # .. E .. .. :
++ EXO( stq $1,0($16) ) # .. .. L .. :
++ addq $17,8,$17 # .. E .. .. :
+ subq $0,8,$0 # E .. .. .. : U L L U
+
+- addq $6,8,$6 # .. .. .. E :
++ addq $16,8,$16 # .. .. .. E :
+ bis $2,$2,$3 # .. .. E .. :
+ nop # .. E .. .. :
+ bne $4,$misquad # U .. .. .. : U L U L
+@@ -125,8 +111,8 @@ $misquad:
+ beq $0,$zerolength # U .. .. .. : U L U L
+
+ /* We know we have at least one trip through the byte loop */
+- EXI ( ldbu $2,0($7) ) # .. .. .. L : No loads in the same quad
+- addq $6,1,$6 # .. .. E .. : as the store (Section 3.8 in CWG)
++ EXI ( ldbu $2,0($17) ) # .. .. .. L : No loads in the same quad
++ addq $16,1,$16 # .. .. E .. : as the store (Section 3.8 in CWG)
+ nop # .. E .. .. :
+ br $31, $dirtyentry # L0 .. .. .. : L U U L
+ /* Do the trailing byte loop load, then hop into the store part of the loop */
+@@ -136,8 +122,8 @@ $misquad:
+ * Based upon the usage context, it's worth the effort to unroll this loop
+ * $0 - number of bytes to be moved
+ * $4 - number of bytes to move as quadwords
+- * $6 is current destination address
+- * $7 is current source address
++ * $16 is current destination address
++ * $17 is current source address
+ */
+ $quadaligned:
+ subq $4, 32, $2 # .. .. .. E : do not unroll for small stuff
+@@ -155,29 +141,29 @@ $quadaligned:
+ * instruction memory hint instruction).
+ */
+ $unroll4:
+- EXI( ldq $1,0($7) ) # .. .. .. L
+- EXI( ldq $2,8($7) ) # .. .. L ..
++ EXI( ldq $1,0($17) ) # .. .. .. L
++ EXI( ldq $2,8($17) ) # .. .. L ..
+ subq $4,32,$4 # .. E .. ..
+ nop # E .. .. .. : U U L L
+
+- addq $7,16,$7 # .. .. .. E
+- EXO( stq $1,0($6) ) # .. .. L ..
+- EXO( stq $2,8($6) ) # .. L .. ..
++ addq $17,16,$17 # .. .. .. E
++ EXO( stq $1,0($16) ) # .. .. L ..
++ EXO( stq $2,8($16) ) # .. L .. ..
+ subq $0,16,$0 # E .. .. .. : U L L U
+
+- addq $6,16,$6 # .. .. .. E
+- EXI( ldq $1,0($7) ) # .. .. L ..
+- EXI( ldq $2,8($7) ) # .. L .. ..
++ addq $16,16,$16 # .. .. .. E
++ EXI( ldq $1,0($17) ) # .. .. L ..
++ EXI( ldq $2,8($17) ) # .. L .. ..
+ subq $4, 32, $3 # E .. .. .. : U U L L : is there enough for another trip?
+
+- EXO( stq $1,0($6) ) # .. .. .. L
+- EXO( stq $2,8($6) ) # .. .. L ..
++ EXO( stq $1,0($16) ) # .. .. .. L
++ EXO( stq $2,8($16) ) # .. .. L ..
+ subq $0,16,$0 # .. E .. ..
+- addq $7,16,$7 # E .. .. .. : U L L U
++ addq $17,16,$17 # E .. .. .. : U L L U
+
+ nop # .. .. .. E
+ nop # .. .. E ..
+- addq $6,16,$6 # .. E .. ..
++ addq $16,16,$16 # .. E .. ..
+ bgt $3,$unroll4 # U .. .. .. : U L U L
+
+ nop
+@@ -186,14 +172,14 @@ $unroll4:
+ beq $4, $noquads
+
+ $onequad:
+- EXI( ldq $1,0($7) )
++ EXI( ldq $1,0($17) )
+ subq $4,8,$4
+- addq $7,8,$7
++ addq $17,8,$17
+ nop
+
+- EXO( stq $1,0($6) )
++ EXO( stq $1,0($16) )
+ subq $0,8,$0
+- addq $6,8,$6
++ addq $16,8,$16
+ bne $4,$onequad
+
+ $noquads:
+@@ -207,23 +193,23 @@ $noquads:
+ * There's no point in doing a lot of complex alignment calculations to try to
+ * to quadword stuff for a small amount of data.
+ * $0 - remaining number of bytes left to copy
+- * $6 - current dest addr
+- * $7 - current source addr
++ * $16 - current dest addr
++ * $17 - current source addr
+ */
+
+ $onebyteloop:
+- EXI ( ldbu $2,0($7) ) # .. .. .. L : No loads in the same quad
+- addq $6,1,$6 # .. .. E .. : as the store (Section 3.8 in CWG)
++ EXI ( ldbu $2,0($17) ) # .. .. .. L : No loads in the same quad
++ addq $16,1,$16 # .. .. E .. : as the store (Section 3.8 in CWG)
+ nop # .. E .. .. :
+ nop # E .. .. .. : U L U L
+
+ $dirtyentry:
+ /*
+- * the -1 is to compensate for the inc($6) done in a previous quadpack
++ * the -1 is to compensate for the inc($16) done in a previous quadpack
+ * which allows us zero dependencies within either quadpack in the loop
+ */
+- EXO ( stb $2,-1($6) ) # .. .. .. L :
+- addq $7,1,$7 # .. .. E .. : quadpack as the load
++ EXO ( stb $2,-1($16) ) # .. .. .. L :
++ addq $17,1,$17 # .. .. E .. : quadpack as the load
+ subq $0,1,$0 # .. E .. .. : change count _after_ copy
+ bgt $0,$onebyteloop # U .. .. .. : U L U L
+
+@@ -233,7 +219,7 @@ $exitout: # Destination for exception recovery(?)
+ nop # .. .. .. E
+ nop # .. .. E ..
+ nop # .. E .. ..
+- ret $31,($28),1 # L0 .. .. .. : L U L U
++ ret $31,($26),1 # L0 .. .. .. : L U L U
+
+ .end __copy_user
+ EXPORT_SYMBOL(__copy_user)
+diff --git a/arch/arc/Makefile b/arch/arc/Makefile
+index fd79faab7892..5dc2d73c6499 100644
+--- a/arch/arc/Makefile
++++ b/arch/arc/Makefile
+@@ -108,6 +108,7 @@ bootpImage: vmlinux
+
+ boot_targets += uImage uImage.bin uImage.gz
+
++PHONY += $(boot_targets)
+ $(boot_targets): vmlinux
+ $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
+
+diff --git a/arch/arc/include/asm/elf.h b/arch/arc/include/asm/elf.h
+index aa2d6da9d187..12c74e826530 100644
+--- a/arch/arc/include/asm/elf.h
++++ b/arch/arc/include/asm/elf.h
+@@ -26,7 +26,7 @@
+ #define R_ARC_32_PCREL 0x31
+
+ /*to set parameters in the core dumps */
+-#define ELF_ARCH EM_ARCOMPACT
++#define ELF_ARCH EM_ARC_INUSE
+ #define ELF_CLASS ELFCLASS32
+
+ #ifdef CONFIG_CPU_BIG_ENDIAN
+diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
+index ffb5f33475f1..f0f43eb709d2 100644
+--- a/arch/arc/include/asm/page.h
++++ b/arch/arc/include/asm/page.h
+@@ -13,6 +13,7 @@
+ #ifndef __ASSEMBLY__
+
+ #define clear_page(paddr) memset((paddr), 0, PAGE_SIZE)
++#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
+ #define copy_page(to, from) memcpy((to), (from), PAGE_SIZE)
+
+ struct vm_area_struct;
+diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
+index 85d9ea4a0acc..37ad245cf989 100644
+--- a/arch/arc/kernel/entry.S
++++ b/arch/arc/kernel/entry.S
+@@ -169,7 +169,7 @@ tracesys:
+
+ ; Do the Sys Call as we normally would.
+ ; Validate the Sys Call number
+- cmp r8, NR_syscalls
++ cmp r8, NR_syscalls - 1
+ mov.hi r0, -ENOSYS
+ bhi tracesys_exit
+
+@@ -252,7 +252,7 @@ ENTRY(EV_Trap)
+ ;============ Normal syscall case
+
+ ; syscall num shd not exceed the total system calls avail
+- cmp r8, NR_syscalls
++ cmp r8, NR_syscalls - 1
+ mov.hi r0, -ENOSYS
+ bhi .Lret_from_system_call
+
+diff --git a/arch/arc/kernel/signal.c b/arch/arc/kernel/signal.c
+index d347bbc086fe..16cdb471d3db 100644
+--- a/arch/arc/kernel/signal.c
++++ b/arch/arc/kernel/signal.c
+@@ -97,7 +97,7 @@ stash_usr_regs(struct rt_sigframe __user *sf, struct pt_regs *regs,
+ sizeof(sf->uc.uc_mcontext.regs.scratch));
+ err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(sigset_t));
+
+- return err;
++ return err ? -EFAULT : 0;
+ }
+
+ static int restore_usr_regs(struct pt_regs *regs, struct rt_sigframe __user *sf)
+@@ -111,7 +111,7 @@ static int restore_usr_regs(struct pt_regs *regs, struct rt_sigframe __user *sf)
+ &(sf->uc.uc_mcontext.regs.scratch),
+ sizeof(sf->uc.uc_mcontext.regs.scratch));
+ if (err)
+- return err;
++ return -EFAULT;
+
+ set_current_blocked(&set);
+ regs->bta = uregs.scratch.bta;
+diff --git a/arch/arc/kernel/stacktrace.c b/arch/arc/kernel/stacktrace.c
+index b9192a653b7e..3ee19b1e79be 100644
+--- a/arch/arc/kernel/stacktrace.c
++++ b/arch/arc/kernel/stacktrace.c
+@@ -39,15 +39,15 @@
+
+ #ifdef CONFIG_ARC_DW2_UNWIND
+
+-static void seed_unwind_frame_info(struct task_struct *tsk,
+- struct pt_regs *regs,
+- struct unwind_frame_info *frame_info)
++static int
++seed_unwind_frame_info(struct task_struct *tsk, struct pt_regs *regs,
++ struct unwind_frame_info *frame_info)
+ {
+ /*
+ * synchronous unwinding (e.g. dump_stack)
+ * - uses current values of SP and friends
+ */
+- if (tsk == NULL && regs == NULL) {
++ if (regs == NULL && (tsk == NULL || tsk == current)) {
+ unsigned long fp, sp, blink, ret;
+ frame_info->task = current;
+
+@@ -66,11 +66,15 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
+ frame_info->call_frame = 0;
+ } else if (regs == NULL) {
+ /*
+- * Asynchronous unwinding of sleeping task
+- * - Gets SP etc from task's pt_regs (saved bottom of kernel
+- * mode stack of task)
++ * Asynchronous unwinding of a likely sleeping task
++ * - first ensure it is actually sleeping
++ * - if so, it will be in __switch_to, kernel mode SP of task
++ * is safe-kept and BLINK at a well known location in there
+ */
+
++ if (tsk->state == TASK_RUNNING)
++ return -1;
++
+ frame_info->task = tsk;
+
+ frame_info->regs.r27 = TSK_K_FP(tsk);
+@@ -104,6 +108,8 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
+ frame_info->regs.r63 = regs->ret;
+ frame_info->call_frame = 0;
+ }
++
++ return 0;
+ }
+
+ #endif
+@@ -113,11 +119,12 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
+ int (*consumer_fn) (unsigned int, void *), void *arg)
+ {
+ #ifdef CONFIG_ARC_DW2_UNWIND
+- int ret = 0;
++ int ret = 0, cnt = 0;
+ unsigned int address;
+ struct unwind_frame_info frame_info;
+
+- seed_unwind_frame_info(tsk, regs, &frame_info);
++ if (seed_unwind_frame_info(tsk, regs, &frame_info))
++ return 0;
+
+ while (1) {
+ address = UNW_PC(&frame_info);
+@@ -133,6 +140,11 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
+ break;
+
+ frame_info.regs.r63 = frame_info.regs.r31;
++
++ if (cnt++ > 128) {
++ printk("unwinder looping too long, aborting !\n");
++ return 0;
++ }
+ }
+
+ return address; /* return the last address it saw */
+diff --git a/arch/arc/kernel/vmlinux.lds.S b/arch/arc/kernel/vmlinux.lds.S
+index f35ed578e007..4d823d3f65bb 100644
+--- a/arch/arc/kernel/vmlinux.lds.S
++++ b/arch/arc/kernel/vmlinux.lds.S
+@@ -92,6 +92,8 @@ SECTIONS
+ CPUIDLE_TEXT
+ LOCK_TEXT
+ KPROBES_TEXT
++ IRQENTRY_TEXT
++ SOFTIRQENTRY_TEXT
+ *(.fixup)
+ *(.gnu.warning)
+ }
+diff --git a/arch/arc/plat-eznps/include/plat/ctop.h b/arch/arc/plat-eznps/include/plat/ctop.h
+index 3c401ce0351e..fb959828630c 100644
+--- a/arch/arc/plat-eznps/include/plat/ctop.h
++++ b/arch/arc/plat-eznps/include/plat/ctop.h
+@@ -42,7 +42,6 @@
+ #define CTOP_AUX_HW_COMPLY (CTOP_AUX_BASE + 0x024)
+ #define CTOP_AUX_LPC (CTOP_AUX_BASE + 0x030)
+ #define CTOP_AUX_EFLAGS (CTOP_AUX_BASE + 0x080)
+-#define CTOP_AUX_IACK (CTOP_AUX_BASE + 0x088)
+ #define CTOP_AUX_GPA1 (CTOP_AUX_BASE + 0x08C)
+ #define CTOP_AUX_UDMC (CTOP_AUX_BASE + 0x300)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 76b0f4131eaf..767c8b14ca2d 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -633,7 +633,9 @@ config ARCH_S3C24XX
+ select HAVE_S3C_RTC if RTC_CLASS
+ select MULTI_IRQ_HANDLER
+ select NEED_MACH_IO_H
++ select S3C2410_WATCHDOG
+ select SAMSUNG_ATAGS
++ select WATCHDOG
+ help
+ Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
+ and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
+@@ -1587,12 +1589,10 @@ config THUMB2_KERNEL
+ depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
+ default y if CPU_THUMBONLY
+ select AEABI
+- select ARM_ASM_UNIFIED
+ select ARM_UNWIND
+ help
+ By enabling this option, the kernel will be compiled in
+- Thumb-2 mode. A compiler/assembler that understand the unified
+- ARM-Thumb syntax is needed.
++ Thumb-2 mode.
+
+ If unsure, say N.
+
+@@ -1627,9 +1627,6 @@ config THUMB2_AVOID_R_ARM_THM_JUMP11
+
+ Unless you are sure your tools don't have this problem, say Y.
+
+-config ARM_ASM_UNIFIED
+- bool
+-
+ config ARM_PATCH_IDIV
+ bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
+ depends on CPU_32v7 && !XIP_KERNEL
+diff --git a/arch/arm/Makefile b/arch/arm/Makefile
+index 963a87972cc8..d212d6b8f2e1 100644
+--- a/arch/arm/Makefile
++++ b/arch/arm/Makefile
+@@ -126,9 +126,11 @@ ifeq ($(CONFIG_ARM_UNWIND),y)
+ CFLAGS_ABI +=-funwind-tables
+ endif
+
++# Accept old syntax despite ".syntax unified"
++AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
++
+ ifeq ($(CONFIG_THUMB2_KERNEL),y)
+ AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it)
+-AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
+ CFLAGS_ISA :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)
+ AFLAGS_ISA :=$(CFLAGS_ISA) -Wa$(comma)-mthumb
+ # Work around buggy relocation from gas if requested:
+@@ -136,7 +138,7 @@ ifeq ($(CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11),y)
+ CFLAGS_MODULE +=-fno-optimize-sibling-calls
+ endif
+ else
+-CFLAGS_ISA :=$(call cc-option,-marm,)
++CFLAGS_ISA :=$(call cc-option,-marm,) $(AFLAGS_NOWARN)
+ AFLAGS_ISA :=$(CFLAGS_ISA)
+ endif
+
+diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
+index f1b4ea9700b8..658efefff545 100644
+--- a/arch/arm/boot/compressed/head.S
++++ b/arch/arm/boot/compressed/head.S
+@@ -1082,9 +1082,9 @@ __armv4_mmu_cache_off:
+ __armv7_mmu_cache_off:
+ mrc p15, 0, r0, c1, c0
+ #ifdef CONFIG_MMU
+- bic r0, r0, #0x000d
++ bic r0, r0, #0x0005
+ #else
+- bic r0, r0, #0x000c
++ bic r0, r0, #0x0004
+ #endif
+ mcr p15, 0, r0, c1, c0 @ turn MMU and cache off
+ mov r12, lr
+diff --git a/arch/arm/boot/dts/am335x-cm-t335.dts b/arch/arm/boot/dts/am335x-cm-t335.dts
+index 947c81b7aaaf..56a04d3086c3 100644
+--- a/arch/arm/boot/dts/am335x-cm-t335.dts
++++ b/arch/arm/boot/dts/am335x-cm-t335.dts
+@@ -552,7 +552,7 @@ status = "okay";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+- ti,pindir-d0-out-d1-in = <1>;
++ ti,pindir-d0-out-d1-in;
+ /* WLS1271 WiFi */
+ wlcore: wlcore@1 {
+ compatible = "ti,wl1271";
+diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
+index 21918807c9f6..f42a92391289 100644
+--- a/arch/arm/boot/dts/am43x-epos-evm.dts
++++ b/arch/arm/boot/dts/am43x-epos-evm.dts
+@@ -411,7 +411,7 @@
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+- clock-frequency = <400000>;
++ clock-frequency = <100000>;
+
+ tps65218: tps65218@24 {
+ reg = <0x24>;
+diff --git a/arch/arm/boot/dts/at91-sama5d3_xplained.dts b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
+index 5a53fcf542ab..07133c5ad294 100644
+--- a/arch/arm/boot/dts/at91-sama5d3_xplained.dts
++++ b/arch/arm/boot/dts/at91-sama5d3_xplained.dts
+@@ -231,6 +231,11 @@
+ atmel,pins =
+ ; /* PE9, conflicts with A9 */
+ };
++ pinctrl_usb_default: usb_default {
++ atmel,pins =
++ ;
++ };
+ };
+ };
+ };
+@@ -288,6 +293,8 @@
+ &pioE 3 GPIO_ACTIVE_LOW
+ &pioE 4 GPIO_ACTIVE_LOW
+ >;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+ };
+
+diff --git a/arch/arm/boot/dts/at91-sama5d4_xplained.dts b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
+index 44d1171c7fc0..4ce865629383 100644
+--- a/arch/arm/boot/dts/at91-sama5d4_xplained.dts
++++ b/arch/arm/boot/dts/at91-sama5d4_xplained.dts
+@@ -152,6 +152,11 @@
+ atmel,pins =
+ ;
+ };
++ pinctrl_usb_default: usb_default {
++ atmel,pins =
++ ;
++ };
+ pinctrl_key_gpio: key_gpio_0 {
+ atmel,pins =
+ ;
+@@ -177,6 +182,8 @@
+ &pioE 11 GPIO_ACTIVE_HIGH
+ &pioE 14 GPIO_ACTIVE_HIGH
+ >;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+ };
+
+diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
+index 70adf940d98c..620aa3f555f8 100644
+--- a/arch/arm/boot/dts/at91sam9rl.dtsi
++++ b/arch/arm/boot/dts/at91sam9rl.dtsi
+@@ -266,23 +266,26 @@
+ atmel,adc-use-res = "highres";
+
+ trigger0 {
+- trigger-name = "timer-counter-0";
++ trigger-name = "external-rising";
+ trigger-value = <0x1>;
++ trigger-external;
+ };
++
+ trigger1 {
+- trigger-name = "timer-counter-1";
+- trigger-value = <0x3>;
++ trigger-name = "external-falling";
++ trigger-value = <0x2>;
++ trigger-external;
+ };
+
+ trigger2 {
+- trigger-name = "timer-counter-2";
+- trigger-value = <0x5>;
++ trigger-name = "external-any";
++ trigger-value = <0x3>;
++ trigger-external;
+ };
+
+ trigger3 {
+- trigger-name = "external";
+- trigger-value = <0x13>;
+- trigger-external;
++ trigger-name = "continuous";
++ trigger-value = <0x6>;
+ };
+ };
+
+diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
+index 547369c69e96..aedbea888684 100644
+--- a/arch/arm/boot/dts/bcm63138.dtsi
++++ b/arch/arm/boot/dts/bcm63138.dtsi
+@@ -174,7 +174,7 @@
+ status = "disabled";
+ };
+
+- nand: nand@2000 {
++ nand_controller: nand-controller@2000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";
+diff --git a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
+index 0bb8d17e4c2d..e51c9b079432 100644
+--- a/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
++++ b/arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
+@@ -13,10 +13,10 @@
+ };
+ };
+
+-&nand {
++&nand_controller {
+ status = "okay";
+
+- nandcs@1 {
++ nand@1 {
+ compatible = "brcm,nandcs";
+ reg = <1>;
+ nand-ecc-step-size = <512>;
+diff --git a/arch/arm/boot/dts/bcm7445.dtsi b/arch/arm/boot/dts/bcm7445.dtsi
+index 4791321969b3..3f002f2047f1 100644
+--- a/arch/arm/boot/dts/bcm7445.dtsi
++++ b/arch/arm/boot/dts/bcm7445.dtsi
+@@ -149,7 +149,7 @@
+ reg-names = "aon-ctrl", "aon-sram";
+ };
+
+- nand: nand@3e2800 {
++ nand_controller: nand-controller@3e2800 {
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts
+index 370aa2cfddf2..439cff69e948 100644
+--- a/arch/arm/boot/dts/bcm963138dvt.dts
++++ b/arch/arm/boot/dts/bcm963138dvt.dts
+@@ -29,10 +29,10 @@
+ status = "okay";
+ };
+
+-&nand {
++&nand_controller {
+ status = "okay";
+
+- nandcs@0 {
++ nand@0 {
+ compatible = "brcm,nandcs";
+ reg = <0>;
+ nand-ecc-strength = <4>;
+diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
+index a97a785ccc6b..f0906d67a107 100644
+--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
++++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
+@@ -134,7 +134,7 @@
+ compatible = "maxim,max77686";
+ reg = <0x09>;
+ interrupt-parent = <&gpx3>;
+- interrupts = <2 IRQ_TYPE_NONE>;
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&max77686_irq>;
+ wakeup-source;
+diff --git a/arch/arm/boot/dts/exynos5250-snow-common.dtsi b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
+index d5d51916bb74..b24a77781e75 100644
+--- a/arch/arm/boot/dts/exynos5250-snow-common.dtsi
++++ b/arch/arm/boot/dts/exynos5250-snow-common.dtsi
+@@ -280,7 +280,7 @@
+ max77686: max77686@09 {
+ compatible = "maxim,max77686";
+ interrupt-parent = <&gpx3>;
+- interrupts = <2 IRQ_TYPE_NONE>;
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&max77686_irq>;
+ wakeup-source;
+diff --git a/arch/arm/boot/dts/exynos5250-spring.dts b/arch/arm/boot/dts/exynos5250-spring.dts
+index 4d7bdb735ed3..e4433ecd9fe4 100644
+--- a/arch/arm/boot/dts/exynos5250-spring.dts
++++ b/arch/arm/boot/dts/exynos5250-spring.dts
+@@ -112,7 +112,7 @@
+ compatible = "samsung,s5m8767-pmic";
+ reg = <0x66>;
+ interrupt-parent = <&gpx3>;
+- interrupts = <2 IRQ_TYPE_NONE>;
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&s5m8767_irq &s5m8767_dvs &s5m8767_ds>;
+ wakeup-source;
+diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts
+index 3c271cb4b2be..a2f94cb2ded8 100644
+--- a/arch/arm/boot/dts/exynos5410-odroidxu.dts
++++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts
+@@ -271,6 +271,8 @@
+ regulator-name = "vddq_lcd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
++ /* Supplies also GPK and GPJ */
++ regulator-always-on;
+ };
+
+ ldo8_reg: LDO8 {
+@@ -560,11 +562,11 @@
+ };
+
+ &usbdrd_dwc3_0 {
+- dr_mode = "host";
++ dr_mode = "peripheral";
+ };
+
+ &usbdrd_dwc3_1 {
+- dr_mode = "peripheral";
++ dr_mode = "host";
+ };
+
+ &usbdrd3_0 {
+diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi
+index a083d23fdee3..872096edd77f 100644
+--- a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi
++++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi
+@@ -563,6 +563,34 @@
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
++
++ usb3_1_oc: usb3-1-oc {
++ samsung,pins = "gpk2-4", "gpk2-5";
++ samsung,pin-function = ;
++ samsung,pin-pud = ;
++ samsung,pin-drv = ;
++ };
++
++ usb3_1_vbusctrl: usb3-1-vbusctrl {
++ samsung,pins = "gpk2-6", "gpk2-7";
++ samsung,pin-function = ;
++ samsung,pin-pud = ;
++ samsung,pin-drv = ;
++ };
++
++ usb3_0_oc: usb3-0-oc {
++ samsung,pins = "gpk3-0", "gpk3-1";
++ samsung,pin-function = ;
++ samsung,pin-pud = ;
++ samsung,pin-drv = ;
++ };
++
++ usb3_0_vbusctrl: usb3-0-vbusctrl {
++ samsung,pins = "gpk3-2", "gpk3-3";
++ samsung,pin-function = ;
++ samsung,pin-pud = ;
++ samsung,pin-drv = ;
++ };
+ };
+
+ &pinctrl_2 {
+diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
+index bb59fee072c0..132b83052439 100644
+--- a/arch/arm/boot/dts/exynos5410.dtsi
++++ b/arch/arm/boot/dts/exynos5410.dtsi
+@@ -314,6 +314,8 @@
+ &usbdrd3_0 {
+ clocks = <&clock CLK_USBD300>;
+ clock-names = "usbdrd30";
++ pinctrl-names = "default";
++ pinctrl-0 = <&usb3_0_oc>, <&usb3_0_vbusctrl>;
+ };
+
+ &usbdrd_phy0 {
+@@ -325,6 +327,8 @@
+ &usbdrd3_1 {
+ clocks = <&clock CLK_USBD301>;
+ clock-names = "usbdrd30";
++ pinctrl-names = "default";
++ pinctrl-0 = <&usb3_1_oc>, <&usb3_1_vbusctrl>;
+ };
+
+ &usbdrd_dwc3_1 {
+diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+index e664c33c3c64..4a71bbe1ce54 100644
+--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
++++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+@@ -88,7 +88,7 @@
+ reg = <0x66>;
+
+ interrupt-parent = <&gpx3>;
+- interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&s2mps11_irq>;
+
+diff --git a/arch/arm/boot/dts/exynos5422-odroidxu4.dts b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+index 2faf88627a48..b45e2a0c3908 100644
+--- a/arch/arm/boot/dts/exynos5422-odroidxu4.dts
++++ b/arch/arm/boot/dts/exynos5422-odroidxu4.dts
+@@ -26,7 +26,7 @@
+ label = "blue:heartbeat";
+ pwms = <&pwm 2 2000000 0>;
+ pwm-names = "pwm2";
+- max_brightness = <255>;
++ max-brightness = <255>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+diff --git a/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi b/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi
+index 0ed30206625c..f547f67f2783 100644
+--- a/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi
++++ b/arch/arm/boot/dts/exynos54xx-odroidxu-leds.dtsi
+@@ -25,7 +25,7 @@
+ * Green LED is much brighter than the others
+ * so limit its max brightness
+ */
+- max_brightness = <127>;
++ max-brightness = <127>;
+ linux,default-trigger = "mmc0";
+ };
+
+@@ -33,7 +33,7 @@
+ label = "blue:heartbeat";
+ pwms = <&pwm 2 2000000 0>;
+ pwm-names = "pwm2";
+- max_brightness = <255>;
++ max-brightness = <255>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+diff --git a/arch/arm/boot/dts/imx50-evk.dts b/arch/arm/boot/dts/imx50-evk.dts
+index 27d763c7a307..4dbd180e72ba 100644
+--- a/arch/arm/boot/dts/imx50-evk.dts
++++ b/arch/arm/boot/dts/imx50-evk.dts
+@@ -66,7 +66,7 @@
+ MX50_PAD_CSPI_MISO__CSPI_MISO 0x00
+ MX50_PAD_CSPI_MOSI__CSPI_MOSI 0x00
+ MX50_PAD_CSPI_SS0__GPIO4_11 0xc4
+- MX50_PAD_ECSPI1_MOSI__CSPI_SS1 0xf4
++ MX50_PAD_ECSPI1_MOSI__GPIO4_13 0x84
+ >;
+ };
+
+diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+index fed72a5f3ffa..4dede1fbfadb 100644
+--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+@@ -307,8 +307,8 @@
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+- MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1
+- MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
++ MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
++ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
+ >;
+ };
+
+@@ -395,6 +395,7 @@
+ &uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
++ uart-has-rtscts;
+ status = "disabled";
+ };
+
+diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+index c96c91d83678..fc4ae2e423bd 100644
+--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
++++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+@@ -94,7 +94,7 @@
+ &fec {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_enet>;
+- phy-mode = "rgmii";
++ phy-mode = "rgmii-id";
+ status = "okay";
+ };
+
+diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
+index 2802c9565b6c..976a75a4eb2c 100644
+--- a/arch/arm/boot/dts/lpc32xx.dtsi
++++ b/arch/arm/boot/dts/lpc32xx.dtsi
+@@ -323,9 +323,6 @@
+
+ clocks = <&xtal_32k>, <&xtal>;
+ clock-names = "xtal_32k", "xtal";
+-
+- assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>;
+- assigned-clock-rates = <208000000>;
+ };
+ };
+
+diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
+index 2008648b8c9f..0a7600d06fb5 100644
+--- a/arch/arm/boot/dts/omap3.dtsi
++++ b/arch/arm/boot/dts/omap3.dtsi
+@@ -23,6 +23,9 @@
+ i2c0 = &i2c1;
+ i2c1 = &i2c2;
+ i2c2 = &i2c3;
++ mmc0 = &mmc1;
++ mmc1 = &mmc2;
++ mmc2 = &mmc3;
+ serial0 = &uart1;
+ serial1 = &uart2;
+ serial2 = &uart3;
+diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
+index 4d6584f15b17..7e5a09c3d2a6 100644
+--- a/arch/arm/boot/dts/omap4.dtsi
++++ b/arch/arm/boot/dts/omap4.dtsi
+@@ -22,6 +22,11 @@
+ i2c1 = &i2c2;
+ i2c2 = &i2c3;
+ i2c3 = &i2c4;
++ mmc0 = &mmc1;
++ mmc1 = &mmc2;
++ mmc2 = &mmc3;
++ mmc3 = &mmc4;
++ mmc4 = &mmc5;
+ serial0 = &uart1;
+ serial1 = &uart2;
+ serial2 = &uart3;
+diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi
+index fc6a8610c24c..adcf9d141db6 100644
+--- a/arch/arm/boot/dts/omap443x.dtsi
++++ b/arch/arm/boot/dts/omap443x.dtsi
+@@ -35,10 +35,12 @@
+ };
+
+ ocp {
++ /* 4430 has only gpio_86 tshut and no talert interrupt */
+ bandgap: bandgap@4a002260 {
+ reg = <0x4a002260 0x4
+ 0x4a00232C 0x4>;
+ compatible = "ti,omap4430-bandgap";
++ gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
+
+ #thermal-sensor-cells = <0>;
+ };
+diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
+index a76266f242a1..586fe60b9921 100644
+--- a/arch/arm/boot/dts/omap5.dtsi
++++ b/arch/arm/boot/dts/omap5.dtsi
+@@ -25,6 +25,11 @@
+ i2c2 = &i2c3;
+ i2c3 = &i2c4;
+ i2c4 = &i2c5;
++ mmc0 = &mmc1;
++ mmc1 = &mmc2;
++ mmc2 = &mmc3;
++ mmc3 = &mmc4;
++ mmc4 = &mmc5;
+ serial0 = &uart1;
+ serial1 = &uart2;
+ serial2 = &uart3;
+diff --git a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
+index 533919e96eae..f22a6b436317 100644
+--- a/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
++++ b/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
+@@ -54,18 +54,21 @@
+ emac: gem@30000 {
+ compatible = "cadence,gem";
+ reg = <0x30000 0x10000>;
++ interrupt-parent = <&vic0>;
+ interrupts = <31>;
+ };
+
+ dmac1: dmac@40000 {
+ compatible = "snps,dw-dmac";
+ reg = <0x40000 0x10000>;
++ interrupt-parent = <&vic0>;
+ interrupts = <25>;
+ };
+
+ dmac2: dmac@50000 {
+ compatible = "snps,dw-dmac";
+ reg = <0x50000 0x10000>;
++ interrupt-parent = <&vic0>;
+ interrupts = <26>;
+ };
+
+@@ -243,6 +246,7 @@
+ axi2pico@c0000000 {
+ compatible = "picochip,axi2pico-pc3x2";
+ reg = <0xc0000000 0x10000>;
++ interrupt-parent = <&vic0>;
+ interrupts = <13 14 15 16 17 18 19 20 21>;
+ };
+ };
+diff --git a/arch/arm/boot/dts/qcom/pmxpoorwills.dtsi b/arch/arm/boot/dts/qcom/pmxpoorwills.dtsi
+index fb88e76df546..991059869094 100644
+--- a/arch/arm/boot/dts/qcom/pmxpoorwills.dtsi
++++ b/arch/arm/boot/dts/qcom/pmxpoorwills.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2017-2019, 2021, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -90,6 +90,16 @@
+ };
+ };
+
++ pmxpoorwills_tz: qcom,temp-alarm@2400 {
++ compatible = "qcom,qpnp-temp-alarm";
++ reg = <0x2400 0x100>;
++ interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
++ label = "pmxpoorwills_tz";
++ qcom,channel-num = <6>;
++ qcom,temp_alarm-vadc = <&pmxpoorwills_vadc>;
++ #thermal-sensor-cells = <0>;
++ };
++
+ pmxpoorwills_vadc: vadc@3100 {
+ compatible = "qcom,qpnp-vadc-hc";
+ reg = <0x3100 0x100>;
+@@ -188,3 +198,31 @@
+ };
+ };
+ };
++
++&thermal_zones {
++ pmxpoorwills_temp_alarm: pmxpoorwills_tz {
++ polling-delay-passive = <0>;
++ polling-delay = <0>;
++ thermal-governor = "step_wise";
++ thermal-sensors = <&pmxpoorwills_tz>;
++ wake-capable-sensor;
++
++ trips {
++ pmxpoorwills_trip0: pmxpoorwills-trip0 {
++ temperature = <105000>;
++ hysteresis = <0>;
++ type = "passive";
++ };
++ pmxpoorwills_trip1: pmxpoorwills-trip1 {
++ temperature = <125000>;
++ hysteresis = <0>;
++ type = "passive";
++ };
++ pmxpoorwills_trip2: pmxpoorwills-trip2 {
++ temperature = <145000>;
++ hysteresis = <0>;
++ type = "critical";
++ };
++ };
++ };
++};
+diff --git a/arch/arm/boot/dts/qcom/sa415m-ccard-pcie-ep.dts b/arch/arm/boot/dts/qcom/sa415m-ccard-pcie-ep.dts
+index 36fad2ae98ac..07d4494e764f 100644
+--- a/arch/arm/boot/dts/qcom/sa415m-ccard-pcie-ep.dts
++++ b/arch/arm/boot/dts/qcom/sa415m-ccard-pcie-ep.dts
+@@ -46,6 +46,12 @@
+ qcom,mhi-event-ring-id-limits = <7 11>; /* start and end */
+ };
+
++&emac_hw {
++ emac_emb_smmu: emac_emb_smmu {
++ qcom,smmu-s1-bypass;
++ };
++};
++
+ &cnss_pcie {
+ status = "disabled";
+ };
+diff --git a/arch/arm/boot/dts/qcom/sa415m-ccard-usb-ep.dts b/arch/arm/boot/dts/qcom/sa415m-ccard-usb-ep.dts
+index cc091b1d0d54..5d4fc1f55d41 100644
+--- a/arch/arm/boot/dts/qcom/sa415m-ccard-usb-ep.dts
++++ b/arch/arm/boot/dts/qcom/sa415m-ccard-usb-ep.dts
+@@ -43,3 +43,7 @@
+ &usb {
+ qcom,gadget-imod-val = <250>;
+ };
++
++&sdx_ext_ipc {
++ qcom,default-policy-nop;
++};
+diff --git a/arch/arm/boot/dts/qcom/sa415m-ccard.dtsi b/arch/arm/boot/dts/qcom/sa415m-ccard.dtsi
+index 38cb8b9dd074..c5d8a25eb8b3 100644
+--- a/arch/arm/boot/dts/qcom/sa415m-ccard.dtsi
++++ b/arch/arm/boot/dts/qcom/sa415m-ccard.dtsi
+@@ -149,7 +149,6 @@
+
+ sdx_ext_ipc: qcom,sdx_ext_ipc {
+ compatible = "qcom,sdx-ext-ipc";
+- qcom,default-policy-nop;
+ qcom,ap2mdm-status-gpio = <&tlmm 95 0x00>;
+ qcom,mdm2ap-status-gpio = <&tlmm 36 0x00>;
+ qcom,mdm2ap-status2-gpio = <&tlmm 88 0x00>;
+@@ -465,7 +464,6 @@
+ /delete-property/ vreg_rgmii-supply;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vreg_rgmii_off_default>;
+- qcom,phy-reset-delay-msecs = <10>;
+ };
+
+ &vreg_rgmii_io_pads {
+diff --git a/arch/arm/boot/dts/qcom/sa415m-ttp-pcie-ep.dts b/arch/arm/boot/dts/qcom/sa415m-ttp-pcie-ep.dts
+index 619a60169a10..00bd10ed27b1 100644
+--- a/arch/arm/boot/dts/qcom/sa415m-ttp-pcie-ep.dts
++++ b/arch/arm/boot/dts/qcom/sa415m-ttp-pcie-ep.dts
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -58,6 +58,12 @@
+ status = "disabled";
+ };
+
++&emac_hw {
++ emac_emb_smmu: emac_emb_smmu {
++ qcom,smmu-s1-bypass;
++ };
++};
++
+ &mhi_device {
+ status = "okay";
+ };
+diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dtsi
+index df7f8fa2489c..2d64b3910818 100644
+--- a/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dtsi
++++ b/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2018-2019, 2021, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -61,7 +61,7 @@
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <4>;
+- qcom,hw-settle-time = <2>;
++ qcom,hw-settle-time = <8>;
+ qcom,fast-avg-setup = <0>;
+ qcom,vadc-thermal-node;
+ };
+diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-pm.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-pm.dtsi
+index 2c227b3cbd44..7e6f46f268a6 100644
+--- a/arch/arm/boot/dts/qcom/sdxpoorwills-pm.dtsi
++++ b/arch/arm/boot/dts/qcom/sdxpoorwills-pm.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2018, 2021, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -103,5 +103,6 @@
+ qcom,rpmh-master-stats@b211200 {
+ compatible = "qcom,rpmh-master-stats-v1";
+ reg = <0xb211200 0x60>;
++ qcom,use-alt-unit = <3>;
+ };
+ };
+diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
+index 2c6e485ef1e0..3252ff01b87b 100644
+--- a/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
++++ b/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -85,7 +85,7 @@
+ compatible = "shared-dma-pool";
+ reusable;
+ alignment = <0x400000>;
+- size = <0x400000>;
++ size = <0x700000>;
+ status = "disabled";
+ };
+
+@@ -1397,6 +1397,8 @@
+ gdsc_emac-supply = <&gdsc_emac>;
+ mboxes = <&qmp_aop 0>;
+ mbox-names = "emac_aop";
++ ipa-dma-rx-desc-cnt = <256>;
++ ipa-dma-tx-desc-cnt = <256>;
+ io-macro-info {
+ io-macro-bypass-mode = <0>;
+ io-interface = "rgmii";
+diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
+index 541678df90a9..50ec24bb1d79 100644
+--- a/arch/arm/boot/dts/r8a7779-marzen.dts
++++ b/arch/arm/boot/dts/r8a7779-marzen.dts
+@@ -136,7 +136,7 @@
+ status = "okay";
+
+ clocks = <&mstp1_clks R8A7779_CLK_DU>, <&x3_clk>;
+- clock-names = "du", "dclkin.0";
++ clock-names = "du.0", "dclkin.0";
+
+ ports {
+ port@0 {
+diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
+index 6c6d4893e92d..3fb0a8d2530b 100644
+--- a/arch/arm/boot/dts/r8a7779.dtsi
++++ b/arch/arm/boot/dts/r8a7779.dtsi
+@@ -431,6 +431,7 @@
+ reg = <0 0xfff80000 0 0x40000>;
+ interrupts = ;
+ clocks = <&mstp1_clks R8A7779_CLK_DU>;
++ clock-names = "du.0";
+ power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
+ status = "disabled";
+
+diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
+index 1df1557a46c3..3080915cfa5f 100644
+--- a/arch/arm/boot/dts/rk3036-kylin.dts
++++ b/arch/arm/boot/dts/rk3036-kylin.dts
+@@ -426,7 +426,7 @@
+ };
+ };
+
+- sleep {
++ suspend {
+ global_pwroff: global-pwroff {
+ rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;
+ };
+diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
+index 30f1384f619b..7b727d738b69 100644
+--- a/arch/arm/boot/dts/rk3288.dtsi
++++ b/arch/arm/boot/dts/rk3288.dtsi
+@@ -735,7 +735,7 @@
+ * *_HDMI HDMI
+ * *_MIPI_* MIPI
+ */
+- pd_vio@RK3288_PD_VIO {
++ power-domain@RK3288_PD_VIO {
+ reg = ;
+ clocks = <&cru ACLK_IEP>,
+ <&cru ACLK_ISP>,
+@@ -768,7 +768,7 @@
+ * Note: The following 3 are HEVC(H.265) clocks,
+ * and on the ACLK_HEVC_NIU (NOC).
+ */
+- pd_hevc@RK3288_PD_HEVC {
++ power-domain@RK3288_PD_HEVC {
+ reg = ;
+ clocks = <&cru ACLK_HEVC>,
+ <&cru SCLK_HEVC_CABAC>,
+@@ -780,7 +780,7 @@
+ * (video endecoder & decoder) clocks that on the
+ * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
+ */
+- pd_video@RK3288_PD_VIDEO {
++ power-domain@RK3288_PD_VIDEO {
+ reg = ;
+ clocks = <&cru ACLK_VCODEC>,
+ <&cru HCLK_VCODEC>;
+@@ -790,7 +790,7 @@
+ * Note: ACLK_GPU is the GPU clock,
+ * and on the ACLK_GPU_NIU (NOC).
+ */
+- pd_gpu@RK3288_PD_GPU {
++ power-domain@RK3288_PD_GPU {
+ reg = ;
+ clocks = <&cru ACLK_GPU>;
+ };
+@@ -1278,7 +1278,7 @@
+ drive-strength = <12>;
+ };
+
+- sleep {
++ suspend {
+ global_pwroff: global-pwroff {
+ rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>;
+ };
+diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
+index 0c10ba517cd0..798f676041e0 100644
+--- a/arch/arm/boot/dts/s5pv210.dtsi
++++ b/arch/arm/boot/dts/s5pv210.dtsi
+@@ -101,19 +101,16 @@
+ };
+
+ clocks: clock-controller@e0100000 {
+- compatible = "samsung,s5pv210-clock", "simple-bus";
++ compatible = "samsung,s5pv210-clock";
+ reg = <0xe0100000 0x10000>;
+ clock-names = "xxti", "xusbxti";
+ clocks = <&xxti>, <&xusbxti>;
+ #clock-cells = <1>;
+- #address-cells = <1>;
+- #size-cells = <1>;
+- ranges;
++ };
+
+- pmu_syscon: syscon@e0108000 {
+- compatible = "samsung-s5pv210-pmu", "syscon";
+- reg = <0xe0108000 0x8000>;
+- };
++ pmu_syscon: syscon@e0108000 {
++ compatible = "samsung-s5pv210-pmu", "syscon";
++ reg = <0xe0108000 0x8000>;
+ };
+
+ pinctrl0: pinctrl@e0200000 {
+@@ -129,35 +126,28 @@
+ };
+ };
+
+- amba {
+- #address-cells = <1>;
+- #size-cells = <1>;
+- compatible = "simple-bus";
+- ranges;
+-
+- pdma0: dma@e0900000 {
+- compatible = "arm,pl330", "arm,primecell";
+- reg = <0xe0900000 0x1000>;
+- interrupt-parent = <&vic0>;
+- interrupts = <19>;
+- clocks = <&clocks CLK_PDMA0>;
+- clock-names = "apb_pclk";
+- #dma-cells = <1>;
+- #dma-channels = <8>;
+- #dma-requests = <32>;
+- };
++ pdma0: dma@e0900000 {
++ compatible = "arm,pl330", "arm,primecell";
++ reg = <0xe0900000 0x1000>;
++ interrupt-parent = <&vic0>;
++ interrupts = <19>;
++ clocks = <&clocks CLK_PDMA0>;
++ clock-names = "apb_pclk";
++ #dma-cells = <1>;
++ #dma-channels = <8>;
++ #dma-requests = <32>;
++ };
+
+- pdma1: dma@e0a00000 {
+- compatible = "arm,pl330", "arm,primecell";
+- reg = <0xe0a00000 0x1000>;
+- interrupt-parent = <&vic0>;
+- interrupts = <20>;
+- clocks = <&clocks CLK_PDMA1>;
+- clock-names = "apb_pclk";
+- #dma-cells = <1>;
+- #dma-channels = <8>;
+- #dma-requests = <32>;
+- };
++ pdma1: dma@e0a00000 {
++ compatible = "arm,pl330", "arm,primecell";
++ reg = <0xe0a00000 0x1000>;
++ interrupt-parent = <&vic0>;
++ interrupts = <20>;
++ clocks = <&clocks CLK_PDMA1>;
++ clock-names = "apb_pclk";
++ #dma-cells = <1>;
++ #dma-channels = <8>;
++ #dma-requests = <32>;
+ };
+
+ spi0: spi@e1300000 {
+@@ -230,43 +220,36 @@
+ status = "disabled";
+ };
+
+- audio-subsystem {
+- compatible = "samsung,s5pv210-audss", "simple-bus";
+- #address-cells = <1>;
+- #size-cells = <1>;
+- ranges;
+-
+- clk_audss: clock-controller@eee10000 {
+- compatible = "samsung,s5pv210-audss-clock";
+- reg = <0xeee10000 0x1000>;
+- clock-names = "hclk", "xxti",
+- "fout_epll",
+- "sclk_audio0";
+- clocks = <&clocks DOUT_HCLKP>, <&xxti>,
+- <&clocks FOUT_EPLL>,
+- <&clocks SCLK_AUDIO0>;
+- #clock-cells = <1>;
+- };
++ clk_audss: clock-controller@eee10000 {
++ compatible = "samsung,s5pv210-audss-clock";
++ reg = <0xeee10000 0x1000>;
++ clock-names = "hclk", "xxti",
++ "fout_epll",
++ "sclk_audio0";
++ clocks = <&clocks DOUT_HCLKP>, <&xxti>,
++ <&clocks FOUT_EPLL>,
++ <&clocks SCLK_AUDIO0>;
++ #clock-cells = <1>;
++ };
+
+- i2s0: i2s@eee30000 {
+- compatible = "samsung,s5pv210-i2s";
+- reg = <0xeee30000 0x1000>;
+- interrupt-parent = <&vic2>;
+- interrupts = <16>;
+- dma-names = "rx", "tx", "tx-sec";
+- dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
+- clock-names = "iis",
+- "i2s_opclk0",
+- "i2s_opclk1";
+- clocks = <&clk_audss CLK_I2S>,
+- <&clk_audss CLK_I2S>,
+- <&clk_audss CLK_DOUT_AUD_BUS>;
+- samsung,idma-addr = <0xc0010000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&i2s0_bus>;
+- #sound-dai-cells = <0>;
+- status = "disabled";
+- };
++ i2s0: i2s@eee30000 {
++ compatible = "samsung,s5pv210-i2s";
++ reg = <0xeee30000 0x1000>;
++ interrupt-parent = <&vic2>;
++ interrupts = <16>;
++ dma-names = "rx", "tx", "tx-sec";
++ dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
++ clock-names = "iis",
++ "i2s_opclk0",
++ "i2s_opclk1";
++ clocks = <&clk_audss CLK_I2S>,
++ <&clk_audss CLK_I2S>,
++ <&clk_audss CLK_DOUT_AUD_BUS>;
++ samsung,idma-addr = <0xc0010000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s0_bus>;
++ #sound-dai-cells = <0>;
++ status = "disabled";
+ };
+
+ i2s1: i2s@e2100000 {
+diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
+index de0e189711f6..8c94bf57a38c 100644
+--- a/arch/arm/boot/dts/sama5d4.dtsi
++++ b/arch/arm/boot/dts/sama5d4.dtsi
+@@ -1371,7 +1371,7 @@
+ 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
+ 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
+ 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
+- 0x0003ff00 0x8002a800 0x00000000 /* pioD */
++ 0xb003ff00 0x8002a800 0x00000000 /* pioD */
+ 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
+ >;
+
+diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
+index f0702d8063d9..9a2db3df5ede 100644
+--- a/arch/arm/boot/dts/socfpga.dtsi
++++ b/arch/arm/boot/dts/socfpga.dtsi
+@@ -676,7 +676,7 @@
+ };
+ };
+
+- L2: l2-cache@fffef000 {
++ L2: cache-controller@fffef000 {
+ compatible = "arm,pl310-cache";
+ reg = <0xfffef000 0x1000>;
+ interrupts = <0 38 0x04>;
+diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
+index f520cbff5e1c..342ae7ef9f08 100644
+--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
++++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
+@@ -567,7 +567,7 @@
+ reg = <0xffcfb100 0x80>;
+ };
+
+- L2: l2-cache@fffff000 {
++ L2: cache-controller@fffff000 {
+ compatible = "arm,pl310-cache";
+ reg = <0xfffff000 0x1000>;
+ interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
+@@ -710,7 +710,7 @@
+ timer3: timer3@ffd00100 {
+ compatible = "snps,dw-apb-timer";
+ interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
+- reg = <0xffd01000 0x100>;
++ reg = <0xffd00100 0x100>;
+ clocks = <&l4_sys_free_clk>;
+ clock-names = "timer";
+ };
+diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+index 1077ceebb2d6..87494773f409 100644
+--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
++++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+@@ -755,14 +755,14 @@
+ status = "disabled";
+ };
+
+- vica: intc@10140000 {
++ vica: interrupt-controller@10140000 {
+ compatible = "arm,versatile-vic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x10140000 0x20>;
+ };
+
+- vicb: intc@10140020 {
++ vicb: interrupt-controller@10140020 {
+ compatible = "arm,versatile-vic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
+index 336ee4fb587d..64dc50afc385 100644
+--- a/arch/arm/boot/dts/stm32f429.dtsi
++++ b/arch/arm/boot/dts/stm32f429.dtsi
+@@ -334,7 +334,7 @@
+ };
+ };
+
+- rcc: rcc@40023810 {
++ rcc: rcc@40023800 {
+ #reset-cells = <1>;
+ #clock-cells = <2>;
+ compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
+diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
+index 7e7dfc2b43db..d1af56d2f25e 100644
+--- a/arch/arm/boot/dts/sun4i-a10.dtsi
++++ b/arch/arm/boot/dts/sun4i-a10.dtsi
+@@ -144,7 +144,7 @@
+ trips {
+ cpu_alert0: cpu_alert0 {
+ /* milliCelsius */
+- temperature = <850000>;
++ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
+index 00d7d28e86f0..4633b79bf5ea 100644
+--- a/arch/arm/boot/dts/versatile-ab.dts
++++ b/arch/arm/boot/dts/versatile-ab.dts
+@@ -154,16 +154,15 @@
+ #size-cells = <1>;
+ ranges;
+
+- vic: intc@10140000 {
++ vic: interrupt-controller@10140000 {
+ compatible = "arm,versatile-vic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x10140000 0x1000>;
+- clear-mask = <0xffffffff>;
+ valid-mask = <0xffffffff>;
+ };
+
+- sic: intc@10003000 {
++ sic: interrupt-controller@10003000 {
+ compatible = "arm,versatile-sic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts
+index 33a8eb28374e..3a23164c2c2d 100644
+--- a/arch/arm/boot/dts/versatile-pb.dts
++++ b/arch/arm/boot/dts/versatile-pb.dts
+@@ -6,7 +6,7 @@
+
+ amba {
+ /* The Versatile PB is using more SIC IRQ lines than the AB */
+- sic: intc@10003000 {
++ sic: interrupt-controller@10003000 {
+ clear-mask = <0xffffffff>;
+ /*
+ * Valid interrupt lines mask according to
+diff --git a/arch/arm/configs/msm8909-perf_defconfig b/arch/arm/configs/msm8909-perf_defconfig
+old mode 100755
+new mode 100644
+index c9cf52896037..912ad9e8c494
+--- a/arch/arm/configs/msm8909-perf_defconfig
++++ b/arch/arm/configs/msm8909-perf_defconfig
+@@ -16,12 +16,9 @@ CONFIG_IKCONFIG=y
+ CONFIG_IKCONFIG_PROC=y
+ CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
+ CONFIG_CGROUP_FREEZER=y
+-CONFIG_CGROUP_DEVICE=y
+ CONFIG_CPUSETS=y
+ CONFIG_CGROUP_CPUACCT=y
+ CONFIG_CGROUP_SCHEDTUNE=y
+-CONFIG_MEMCG=y
+-CONFIG_MEMCG_SWAP=y
+ CONFIG_RT_GROUP_SCHED=y
+ CONFIG_CGROUP_BPF=y
+ CONFIG_SCHED_CORE_CTL=y
+@@ -62,9 +59,11 @@ CONFIG_PREEMPT=y
+ CONFIG_AEABI=y
+ CONFIG_HIGHMEM=y
+ CONFIG_ARM_MODULE_PLTS=y
++CONFIG_KSM=y
+ CONFIG_CMA=y
+ CONFIG_ZSMALLOC=y
+ CONFIG_BALANCE_ANON_FILE_RECLAIM=y
++CONFIG_PROCESS_RECLAIM=y
+ CONFIG_SECCOMP=y
+ CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
+ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+@@ -223,7 +222,6 @@ CONFIG_IPC_ROUTER=y
+ CONFIG_IPC_ROUTER_SECURITY=y
+ CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
+ CONFIG_DMA_CMA=y
+-CONFIG_CMA_SIZE_MBYTES=8
+ CONFIG_ZRAM=y
+ CONFIG_BLK_DEV_LOOP=y
+ CONFIG_BLK_DEV_RAM=y
+@@ -231,14 +229,12 @@ CONFIG_BLK_DEV_RAM_SIZE=8192
+ CONFIG_HDCP_QSEECOM=y
+ CONFIG_QSEECOM=y
+ CONFIG_UID_SYS_STATS=y
+-CONFIG_MEMORY_STATE_TIME=y
+ CONFIG_MD=y
+ CONFIG_BLK_DEV_MD=y
+ CONFIG_MD_LINEAR=y
+ CONFIG_BLK_DEV_DM=y
+ CONFIG_DM_CRYPT=y
+ CONFIG_DM_REQ_CRYPT=y
+-CONFIG_DM_DEFAULT_KEY=y
+ CONFIG_DM_UEVENT=y
+ CONFIG_DM_VERITY=y
+ CONFIG_DM_VERITY_FEC=y
+@@ -266,8 +262,6 @@ CONFIG_INPUT_EVDEV=y
+ CONFIG_KEYBOARD_GPIO=y
+ CONFIG_KEYBOARD_MATRIX=y
+ # CONFIG_INPUT_MOUSE is not set
+-CONFIG_INPUT_JOYSTICK=y
+-CONFIG_JOYSTICK_XPAD=y
+ CONFIG_INPUT_TOUCHSCREEN=y
+ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE_v26=y
+ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV_v26=y
+@@ -371,7 +365,8 @@ CONFIG_SND=y
+ CONFIG_SND_DYNAMIC_MINORS=y
+ CONFIG_SND_SOC=y
+ CONFIG_UHID=y
+-CONFIG_USB_HIDDEV=y
++CONFIG_HID_MULTITOUCH=y
++CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+@@ -407,7 +402,6 @@ CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
+ CONFIG_MMC_SDHCI=y
+ CONFIG_MMC_SDHCI_PLTFM=y
+ CONFIG_MMC_SDHCI_MSM=y
+-CONFIG_MMC_SDHCI_MSM_ICE=y
+ CONFIG_LEDS_CLASS_FLASH=y
+ CONFIG_LEDS_QPNP=y
+ CONFIG_LEDS_MSM_GPIO_FLASH=y
+@@ -422,6 +416,7 @@ CONFIG_UIO_MSM_SHAREDMEM=y
+ CONFIG_STAGING=y
+ CONFIG_ASHMEM=y
+ CONFIG_ANDROID_LOW_MEMORY_KILLER=y
++CONFIG_ANDROID_LMK_NOTIFY_TRIGGER=y
+ CONFIG_ION=y
+ CONFIG_ION_MSM=y
+ CONFIG_IPA=y
+@@ -466,6 +461,7 @@ CONFIG_MSM_PIL_SSR_GENERIC=y
+ CONFIG_MSM_PIL_MSS_QDSP6V5=y
+ CONFIG_MSM_EVENT_TIMER=y
+ CONFIG_MSM_AVTIMER=y
++CONFIG_MSM_PM=y
+ CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
+ CONFIG_MEM_SHARE_QMI_SERVICE=y
+ CONFIG_MSM_BAM_DMUX=y
+@@ -479,19 +475,13 @@ CONFIG_PWM=y
+ CONFIG_PWM_QPNP=y
+ CONFIG_QCOM_SHOW_RESUME_IRQ=y
+ CONFIG_QTI_MPM=y
++CONFIG_PHY_QCOM_UFS=y
+ CONFIG_ANDROID=y
+ CONFIG_ANDROID_BINDER_IPC=y
+ CONFIG_ANDROID_BINDER_IPC_32BIT=y
+-CONFIG_STM=y
+ CONFIG_SENSORS_SSC=y
+ CONFIG_EXT4_FS=y
+ CONFIG_EXT4_FS_SECURITY=y
+-CONFIG_EXT4_ENCRYPTION=y
+-CONFIG_EXT4_FS_ENCRYPTION=y
+-CONFIG_EXT4_FS_ICE_ENCRYPTION=y
+-CONFIG_F2FS_FS=y
+-CONFIG_F2FS_FS_SECURITY=y
+-CONFIG_F2FS_FS_ENCRYPTION=y
+ CONFIG_FANOTIFY=y
+ CONFIG_QUOTA=y
+ CONFIG_QUOTA_NETLINK_INTERFACE=y
+@@ -523,11 +513,21 @@ CONFIG_QCOM_RTB=y
+ CONFIG_QCOM_RTB_SEPARATE_CPUS=y
+ CONFIG_CPU_FREQ_SWITCH_PROFILER=y
+ CONFIG_LKDTM=y
+-CONFIG_MEMTEST=y
+ CONFIG_PANIC_ON_DATA_CORRUPTION=y
+ CONFIG_PID_IN_CONTEXTIDR=y
+ CONFIG_CORESIGHT=y
+-CONFIG_PFK=y
++CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
++CONFIG_CORESIGHT_SINK_TPIU=y
++CONFIG_CORESIGHT_SOURCE_ETM3X=y
++CONFIG_CORESIGHT_REMOTE_ETM=y
++CONFIG_CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE=0
++CONFIG_CORESIGHT_QCOM_REPLICATOR=y
++CONFIG_CORESIGHT_DBGUI=y
++CONFIG_CORESIGHT_STM=y
++CONFIG_CORESIGHT_CTI=y
++CONFIG_CORESIGHT_EVENT=y
++CONFIG_CORESIGHT_HWEVENT=y
++CONFIG_CORESIGHT_DUMMY=y
+ CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
+ CONFIG_SECURITY=y
+ CONFIG_LSM_MMAP_MIN_ADDR=4096
+@@ -536,6 +536,7 @@ CONFIG_SECURITY_SELINUX=y
+ CONFIG_SECURITY_SMACK=y
+ CONFIG_SECURITY_APPARMOR=y
+ CONFIG_CRYPTO_XCBC=y
++CONFIG_CRYPTO_CRC32=y
+ CONFIG_CRYPTO_MD4=y
+ CONFIG_CRYPTO_TWOFISH=y
+ CONFIG_CRYPTO_ANSI_CPRNG=y
+diff --git a/arch/arm/configs/msm8909_defconfig b/arch/arm/configs/msm8909_defconfig
+index b9df76428a96..18e5534652b5 100644
+--- a/arch/arm/configs/msm8909_defconfig
++++ b/arch/arm/configs/msm8909_defconfig
+@@ -17,12 +17,9 @@ CONFIG_IKCONFIG_PROC=y
+ CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
+ CONFIG_CGROUP_DEBUG=y
+ CONFIG_CGROUP_FREEZER=y
+-CONFIG_CGROUP_DEVICE=y
+ CONFIG_CPUSETS=y
+ CONFIG_CGROUP_CPUACCT=y
+ CONFIG_CGROUP_SCHEDTUNE=y
+-CONFIG_MEMCG=y
+-CONFIG_MEMCG_SWAP=y
+ CONFIG_RT_GROUP_SCHED=y
+ CONFIG_CGROUP_BPF=y
+ CONFIG_SCHED_CORE_CTL=y
+@@ -38,6 +35,7 @@ CONFIG_EMBEDDED=y
+ CONFIG_PROFILING=y
+ CONFIG_OPROFILE=m
+ CONFIG_KPROBES=y
++CONFIG_CC_STACKPROTECTOR_REGULAR=y
+ CONFIG_ARCH_MMAP_RND_BITS=16
+ CONFIG_MODULES=y
+ CONFIG_MODULE_UNLOAD=y
+@@ -55,10 +53,12 @@ CONFIG_PREEMPT=y
+ CONFIG_AEABI=y
+ CONFIG_HIGHMEM=y
+ CONFIG_ARM_MODULE_PLTS=y
++CONFIG_KSM=y
+ CONFIG_CMA=y
+ CONFIG_CMA_DEBUGFS=y
+ CONFIG_ZSMALLOC=y
+ CONFIG_BALANCE_ANON_FILE_RECLAIM=y
++CONFIG_PROCESS_RECLAIM=y
+ CONFIG_SECCOMP=y
+ CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
+ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+@@ -219,7 +219,6 @@ CONFIG_IPC_ROUTER=y
+ CONFIG_IPC_ROUTER_SECURITY=y
+ CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
+ CONFIG_DMA_CMA=y
+-CONFIG_CMA_SIZE_MBYTES=8
+ CONFIG_ZRAM=y
+ CONFIG_BLK_DEV_LOOP=y
+ CONFIG_BLK_DEV_RAM=y
+@@ -235,7 +234,6 @@ CONFIG_BLK_DEV_DM=y
+ CONFIG_DM_DEBUG=y
+ CONFIG_DM_CRYPT=y
+ CONFIG_DM_REQ_CRYPT=y
+-CONFIG_DM_DEFAULT_KEY=y
+ CONFIG_DM_UEVENT=y
+ CONFIG_DM_VERITY=y
+ CONFIG_DM_VERITY_FEC=y
+@@ -264,8 +262,6 @@ CONFIG_INPUT_EVBUG=y
+ CONFIG_KEYBOARD_GPIO=y
+ CONFIG_KEYBOARD_MATRIX=y
+ # CONFIG_INPUT_MOUSE is not set
+-CONFIG_INPUT_JOYSTICK=y
+-CONFIG_JOYSTICK_XPAD=y
+ CONFIG_INPUT_TOUCHSCREEN=y
+ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE_v26=y
+ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV_v26=y
+@@ -374,7 +370,8 @@ CONFIG_SND=y
+ CONFIG_SND_DYNAMIC_MINORS=y
+ CONFIG_SND_SOC=y
+ CONFIG_UHID=y
+-CONFIG_USB_HIDDEV=y
++CONFIG_HID_MULTITOUCH=y
++CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+@@ -413,7 +410,6 @@ CONFIG_MMC_TEST=y
+ CONFIG_MMC_SDHCI=y
+ CONFIG_MMC_SDHCI_PLTFM=y
+ CONFIG_MMC_SDHCI_MSM=y
+-CONFIG_MMC_SDHCI_MSM_ICE=y
+ CONFIG_LEDS_CLASS_FLASH=y
+ CONFIG_LEDS_QPNP=y
+ CONFIG_LEDS_MSM_GPIO_FLASH=y
+@@ -428,6 +424,7 @@ CONFIG_UIO_MSM_SHAREDMEM=y
+ CONFIG_STAGING=y
+ CONFIG_ASHMEM=y
+ CONFIG_ANDROID_LOW_MEMORY_KILLER=y
++CONFIG_ANDROID_LMK_NOTIFY_TRIGGER=y
+ CONFIG_ION=y
+ CONFIG_ION_MSM=y
+ CONFIG_IPA=y
+@@ -473,6 +470,7 @@ CONFIG_MSM_PIL_SSR_GENERIC=y
+ CONFIG_MSM_PIL_MSS_QDSP6V5=y
+ CONFIG_MSM_EVENT_TIMER=y
+ CONFIG_MSM_AVTIMER=y
++CONFIG_MSM_PM=y
+ CONFIG_QTI_RPM_STATS_LOG=y
+ CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
+ CONFIG_MEM_SHARE_QMI_SERVICE=y
+@@ -487,20 +485,14 @@ CONFIG_PWM=y
+ CONFIG_PWM_QPNP=y
+ CONFIG_QCOM_SHOW_RESUME_IRQ=y
+ CONFIG_QTI_MPM=y
++CONFIG_PHY_QCOM_UFS=y
+ CONFIG_ANDROID=y
+ CONFIG_ANDROID_BINDER_IPC=y
+ CONFIG_ANDROID_BINDER_IPC_32BIT=y
+-CONFIG_STM=y
+ CONFIG_SENSORS_SSC=y
+ CONFIG_MSM_TZ_LOG=y
+ CONFIG_EXT4_FS=y
+ CONFIG_EXT4_FS_SECURITY=y
+-CONFIG_EXT4_ENCRYPTION=y
+-CONFIG_EXT4_FS_ENCRYPTION=y
+-CONFIG_EXT4_FS_ICE_ENCRYPTION=y
+-CONFIG_F2FS_FS=y
+-CONFIG_F2FS_FS_SECURITY=y
+-CONFIG_F2FS_FS_ENCRYPTION=y
+ CONFIG_FANOTIFY=y
+ CONFIG_QUOTA=y
+ CONFIG_QUOTA_NETLINK_INTERFACE=y
+@@ -568,7 +560,18 @@ CONFIG_DEBUG_USER=y
+ CONFIG_PID_IN_CONTEXTIDR=y
+ CONFIG_DEBUG_SET_MODULE_RONX=y
+ CONFIG_CORESIGHT=y
+-CONFIG_PFK=y
++CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
++CONFIG_CORESIGHT_SINK_TPIU=y
++CONFIG_CORESIGHT_SOURCE_ETM3X=y
++CONFIG_CORESIGHT_REMOTE_ETM=y
++CONFIG_CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE=0
++CONFIG_CORESIGHT_QCOM_REPLICATOR=y
++CONFIG_CORESIGHT_DBGUI=y
++CONFIG_CORESIGHT_STM=y
++CONFIG_CORESIGHT_CTI=y
++CONFIG_CORESIGHT_EVENT=y
++CONFIG_CORESIGHT_HWEVENT=y
++CONFIG_CORESIGHT_DUMMY=y
+ CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
+ CONFIG_SECURITY=y
+ CONFIG_LSM_MMAP_MIN_ADDR=4096
+@@ -577,6 +580,7 @@ CONFIG_SECURITY_SELINUX=y
+ CONFIG_SECURITY_SMACK=y
+ CONFIG_SECURITY_APPARMOR=y
+ CONFIG_CRYPTO_XCBC=y
++CONFIG_CRYPTO_CRC32=y
+ CONFIG_CRYPTO_MD4=y
+ CONFIG_CRYPTO_TWOFISH=y
+ CONFIG_CRYPTO_ANSI_CPRNG=y
+diff --git a/arch/arm/configs/msm8937go-perf_defconfig b/arch/arm/configs/msm8937go-perf_defconfig
+old mode 100755
+new mode 100644
+index cdfc9d5f0a51..e486da9e8dd5
+--- a/arch/arm/configs/msm8937go-perf_defconfig
++++ b/arch/arm/configs/msm8937go-perf_defconfig
+@@ -36,6 +36,7 @@ CONFIG_BLK_DEV_INITRD=y
+ # CONFIG_RD_XZ is not set
+ # CONFIG_RD_LZO is not set
+ # CONFIG_RD_LZ4 is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+ CONFIG_KALLSYMS_ALL=y
+ # CONFIG_BASE_FULL is not set
+ CONFIG_BPF_SYSCALL=y
+@@ -58,29 +59,22 @@ CONFIG_ARCH_QCOM=y
+ CONFIG_ARCH_MSM8937=y
+ CONFIG_ARCH_MSM8917=y
+ CONFIG_ARCH_QM215=y
+-CONFIG_ARCH_SDM439=y
+-CONFIG_ARCH_SDM429=y
+ # CONFIG_VDSO is not set
+ CONFIG_SMP=y
+ CONFIG_SCHED_MC=y
+-CONFIG_NR_CPUS=8
+ CONFIG_ARM_PSCI=y
+ CONFIG_PREEMPT=y
+ CONFIG_AEABI=y
+ CONFIG_HIGHMEM=y
+ CONFIG_ARM_MODULE_PLTS=y
++CONFIG_KSM=y
+ CONFIG_CMA=y
+-CONFIG_CMA_DEBUGFS=y
+ CONFIG_ZSMALLOC=y
+ CONFIG_BALANCE_ANON_FILE_RECLAIM=y
+ CONFIG_PROCESS_RECLAIM=y
+ CONFIG_SECCOMP=y
+ CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
+ CONFIG_CPU_FREQ=y
+-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+-CONFIG_CPU_FREQ_GOV_USERSPACE=y
+-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+ CONFIG_CPU_BOOST=y
+ CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
+ CONFIG_CPU_FREQ_MSM=y
+@@ -144,7 +138,6 @@ CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
+ CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
+ CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
+ CONFIG_NETFILTER_XT_TARGET_HARDIDLETIMER=y
+-CONFIG_NETFILTER_XT_TARGET_LOG=y
+ CONFIG_NETFILTER_XT_TARGET_MARK=y
+ CONFIG_NETFILTER_XT_TARGET_NFLOG=y
+ CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
+@@ -209,7 +202,6 @@ CONFIG_IP6_NF_RAW=y
+ CONFIG_BRIDGE_NF_EBTABLES=y
+ CONFIG_BRIDGE_EBT_BROUTE=y
+ CONFIG_L2TP=y
+-CONFIG_L2TP_DEBUGFS=y
+ CONFIG_L2TP_V3=y
+ CONFIG_L2TP_IP=y
+ CONFIG_L2TP_ETH=y
+@@ -232,7 +224,7 @@ CONFIG_NET_EMATCH_TEXT=y
+ CONFIG_NET_CLS_ACT=y
+ CONFIG_RMNET_DATA=y
+ CONFIG_RMNET_DATA_FC=y
+-CONFIG_RMNET_DATA_DEBUG_PKT=y
++CONFIG_SOCKEV_NLMCAST=y
+ CONFIG_BT=y
+ # CONFIG_BT_BREDR is not set
+ # CONFIG_BT_LE is not set
+@@ -245,7 +237,6 @@ CONFIG_NFC_NQ=y
+ CONFIG_IPC_ROUTER=y
+ CONFIG_IPC_ROUTER_SECURITY=y
+ CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
+-CONFIG_REGMAP_ALLOW_WRITE_DEBUGFS=y
+ CONFIG_DMA_CMA=y
+ CONFIG_ZRAM=y
+ CONFIG_BLK_DEV_LOOP=y
+@@ -255,17 +246,6 @@ CONFIG_BLK_DEV_RAM_SIZE=8192
+ CONFIG_HDCP_QSEECOM=y
+ CONFIG_QSEECOM=y
+ CONFIG_UID_SYS_STATS=y
+-CONFIG_SCSI=y
+-CONFIG_BLK_DEV_SD=y
+-CONFIG_CHR_DEV_SG=y
+-CONFIG_CHR_DEV_SCH=y
+-CONFIG_SCSI_CONSTANTS=y
+-CONFIG_SCSI_LOGGING=y
+-CONFIG_SCSI_SCAN_ASYNC=y
+-CONFIG_SCSI_UFSHCD=y
+-CONFIG_SCSI_UFSHCD_PLATFORM=y
+-CONFIG_SCSI_UFS_QCOM=y
+-CONFIG_SCSI_UFS_QCOM_ICE=y
+ CONFIG_MD=y
+ CONFIG_BLK_DEV_DM=y
+ CONFIG_DM_CRYPT=y
+@@ -299,8 +279,6 @@ CONFIG_PPPOLAC=y
+ CONFIG_PPPOPNS=y
+ CONFIG_PPP_ASYNC=y
+ CONFIG_PPP_SYNC_TTY=y
+-CONFIG_USB_RTL8152=y
+-CONFIG_USB_USBNET=y
+ # CONFIG_WLAN_VENDOR_ADMTEK is not set
+ # CONFIG_WLAN_VENDOR_ATH is not set
+ # CONFIG_WLAN_VENDOR_ATMEL is not set
+@@ -321,7 +299,6 @@ CONFIG_CLD_LL_CORE=y
+ CONFIG_INPUT_EVDEV=y
+ CONFIG_KEYBOARD_GPIO=y
+ # CONFIG_INPUT_MOUSE is not set
+-CONFIG_INPUT_JOYSTICK=y
+ CONFIG_INPUT_TOUCHSCREEN=y
+ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE_v26=y
+ CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV_v26=y
+@@ -346,7 +323,6 @@ CONFIG_HW_RANDOM=y
+ CONFIG_HW_RANDOM_MSM_LEGACY=y
+ CONFIG_MSM_SMD_PKT=y
+ CONFIG_MSM_ADSPRPC=y
+-CONFIG_MSM_RDBG=m
+ CONFIG_I2C_CHARDEV=y
+ CONFIG_I2C_MSM_V2=y
+ CONFIG_SPI=y
+@@ -371,7 +347,6 @@ CONFIG_QPNP_SMB5=y
+ CONFIG_QPNP_SMBCHARGER=y
+ CONFIG_QPNP_VM_BMS=y
+ CONFIG_QPNP_LINEAR_CHARGER=y
+-CONFIG_QPNP_TYPEC=y
+ CONFIG_QPNP_QG=y
+ CONFIG_MSM_APM=y
+ CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
+@@ -408,7 +383,6 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
+ CONFIG_MEDIA_CONTROLLER=y
+ CONFIG_VIDEO_V4L2_SUBDEV_API=y
+ CONFIG_MEDIA_USB_SUPPORT=y
+-CONFIG_USB_VIDEO_CLASS=y
+ CONFIG_V4L_PLATFORM_DRIVERS=y
+ CONFIG_MSM_CAMERA=y
+ CONFIG_MSMB_CAMERA=y
+@@ -423,15 +397,6 @@ CONFIG_MSM_CSIPHY=y
+ CONFIG_MSM_CSID=y
+ CONFIG_MSM_EEPROM=y
+ CONFIG_MSM_ISPIF_V2=y
+-CONFIG_IMX134=y
+-CONFIG_IMX132=y
+-CONFIG_OV9724=y
+-CONFIG_OV5648=y
+-CONFIG_GC0339=y
+-CONFIG_OV8825=y
+-CONFIG_OV8865=y
+-CONFIG_s5k4e1=y
+-CONFIG_OV12830=y
+ CONFIG_MSM_V4L2_VIDEO_OVERLAY_DEVICE=y
+ CONFIG_MSMB_JPEG=y
+ CONFIG_MSM_FD=y
+@@ -446,7 +411,6 @@ CONFIG_FB_MSM_MDSS=y
+ CONFIG_FB_MSM_MDSS_WRITEBACK=y
+ CONFIG_FB_MSM_MDSS_SPI_PANEL=y
+ CONFIG_FB_MSM_MDSS_DSI_CTRL_STATUS=y
+-CONFIG_FB_MSM_MDSS_XLOG_DEBUG=y
+ CONFIG_BACKLIGHT_LCD_SUPPORT=y
+ # CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+ CONFIG_SOUND=y
+@@ -455,40 +419,19 @@ CONFIG_SND_DYNAMIC_MINORS=y
+ CONFIG_SND_USB_AUDIO=y
+ CONFIG_SND_SOC=y
+ CONFIG_UHID=y
+-CONFIG_HID_APPLE=y
+-CONFIG_HID_ELECOM=y
+-CONFIG_HID_MAGICMOUSE=y
+-CONFIG_HID_MICROSOFT=y
+ CONFIG_HID_MULTITOUCH=y
+ CONFIG_HID_NINTENDO=y
+ CONFIG_HID_SONY=y
+-CONFIG_USB_HIDDEV=y
+ CONFIG_USB=y
+ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+ CONFIG_USB_MON=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_MSM=y
+-CONFIG_USB_EHCI_HCD_PLATFORM=y
+ CONFIG_USB_ACM=y
+-CONFIG_USB_STORAGE=y
+-CONFIG_USB_STORAGE_DATAFAB=y
+-CONFIG_USB_STORAGE_FREECOM=y
+-CONFIG_USB_STORAGE_ISD200=y
+-CONFIG_USB_STORAGE_USBAT=y
+-CONFIG_USB_STORAGE_SDDR09=y
+-CONFIG_USB_STORAGE_SDDR55=y
+-CONFIG_USB_STORAGE_JUMPSHOT=y
+-CONFIG_USB_STORAGE_ALAUDA=y
+-CONFIG_USB_STORAGE_ONETOUCH=y
+-CONFIG_USB_STORAGE_KARMA=y
+-CONFIG_USB_STORAGE_CYPRESS_ATACB=y
+ CONFIG_USB_SERIAL=y
+-CONFIG_USB_EHSET_TEST_FIXTURE=y
+ CONFIG_NOP_USB_XCEIV=y
+-CONFIG_DUAL_ROLE_USB_INTF=y
+ CONFIG_USB_GADGET=y
+ CONFIG_USB_GADGET_DEBUG_FILES=y
+-CONFIG_USB_GADGET_DEBUG_FS=y
+ CONFIG_USB_GADGET_VBUS_DRAW=500
+ CONFIG_USB_CI13XXX_MSM=y
+ CONFIG_USB_CONFIGFS=y
+@@ -549,7 +492,6 @@ CONFIG_RMNET_IPA=y
+ CONFIG_RNDIS_IPA=y
+ CONFIG_SPS=y
+ CONFIG_SPS_SUPPORT_NDP_BAM=y
+-CONFIG_QPNP_COINCELL=y
+ CONFIG_QPNP_REVID=y
+ CONFIG_USB_BAM=y
+ CONFIG_MSM_RMNET_BAM=y
+@@ -559,7 +501,6 @@ CONFIG_MSM_TIMER_LEAP=y
+ CONFIG_MAILBOX=y
+ CONFIG_ARM_SMMU=y
+ CONFIG_QCOM_LAZY_MAPPING=y
+-CONFIG_QCOM_RUN_QUEUE_STATS=y
+ CONFIG_MSM_SPM=y
+ CONFIG_MSM_L2_SPM=y
+ CONFIG_MSM_BOOT_STATS=y
+@@ -571,7 +512,6 @@ CONFIG_QCOM_SECURE_BUFFER=y
+ CONFIG_QCOM_EARLY_RANDOM=y
+ CONFIG_MSM_SMEM=y
+ CONFIG_MSM_SMD=y
+-CONFIG_MSM_SMD_DEBUG=y
+ CONFIG_MSM_TZ_SMMU=y
+ CONFIG_MSM_SMP2P=y
+ CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
+@@ -581,7 +521,6 @@ CONFIG_MSM_SYSMON_COMM=y
+ CONFIG_MSM_PIL=y
+ CONFIG_MSM_PIL_SSR_GENERIC=y
+ CONFIG_MSM_PIL_MSS_QDSP6V5=y
+-CONFIG_MSM_PERFORMANCE=y
+ CONFIG_MSM_EVENT_TIMER=y
+ CONFIG_MSM_AVTIMER=y
+ CONFIG_MSM_PM=y
+@@ -609,7 +548,6 @@ CONFIG_QTI_MPM=y
+ CONFIG_ANDROID=y
+ CONFIG_ANDROID_BINDER_IPC=y
+ CONFIG_SENSORS_SSC=y
+-CONFIG_MSM_TZ_LOG=y
+ CONFIG_EXT4_FS=y
+ CONFIG_EXT4_FS_SECURITY=y
+ CONFIG_EXT4_ENCRYPTION=y
+@@ -618,22 +556,18 @@ CONFIG_EXT4_FS_ICE_ENCRYPTION=y
+ CONFIG_F2FS_FS=y
+ CONFIG_F2FS_FS_SECURITY=y
+ CONFIG_F2FS_FS_ENCRYPTION=y
++CONFIG_FANOTIFY=y
+ CONFIG_QUOTA=y
+ CONFIG_QUOTA_NETLINK_INTERFACE=y
+-CONFIG_QFMT_V2=y
+ CONFIG_FUSE_FS=y
+ CONFIG_MSDOS_FS=y
+ CONFIG_VFAT_FS=y
+ CONFIG_TMPFS=y
+ CONFIG_SDCARD_FS=y
+-CONFIG_SQUASHFS=y
+-CONFIG_SQUASHFS_XATTR=y
+-CONFIG_SQUASHFS_LZ4=y
+ # CONFIG_NETWORK_FILESYSTEMS is not set
+ CONFIG_NLS_CODEPAGE_437=y
+ CONFIG_NLS_ISO8859_1=y
+ CONFIG_PRINTK_TIME=y
+-CONFIG_DEBUG_INFO=y
+ CONFIG_FRAME_WARN=2048
+ CONFIG_DEBUG_FS=y
+ CONFIG_MAGIC_SYSRQ=y
+@@ -642,7 +576,6 @@ CONFIG_SCHED_STACK_END_CHECK=y
+ # CONFIG_DEBUG_PREEMPT is not set
+ CONFIG_STACKTRACE=y
+ # CONFIG_FTRACE is not set
+-CONFIG_DEBUG_SET_MODULE_RONX=y
+ CONFIG_PFK=y
+ CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
+ CONFIG_SECURITY=y
+diff --git a/arch/arm/configs/msm8937go_defconfig b/arch/arm/configs/msm8937go_defconfig
+index b64db18c1f44..f6c1b52afe60 100755
+--- a/arch/arm/configs/msm8937go_defconfig
++++ b/arch/arm/configs/msm8937go_defconfig
+@@ -37,6 +37,7 @@ CONFIG_BLK_DEV_INITRD=y
+ # CONFIG_RD_XZ is not set
+ # CONFIG_RD_LZO is not set
+ # CONFIG_RD_LZ4 is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+ CONFIG_KALLSYMS_ALL=y
+ # CONFIG_BASE_FULL is not set
+ CONFIG_BPF_SYSCALL=y
+@@ -71,6 +72,7 @@ CONFIG_PREEMPT=y
+ CONFIG_AEABI=y
+ CONFIG_HIGHMEM=y
+ CONFIG_ARM_MODULE_PLTS=y
++CONFIG_KSM=y
+ CONFIG_CMA=y
+ CONFIG_CMA_DEBUGFS=y
+ CONFIG_ZSMALLOC=y
+@@ -237,6 +239,7 @@ CONFIG_DNS_RESOLVER=y
+ CONFIG_RMNET_DATA=y
+ CONFIG_RMNET_DATA_FC=y
+ CONFIG_RMNET_DATA_DEBUG_PKT=y
++CONFIG_SOCKEV_NLMCAST=y
+ CONFIG_BT=y
+ # CONFIG_BT_BREDR is not set
+ # CONFIG_BT_LE is not set
+@@ -429,15 +432,6 @@ CONFIG_MSM_CSIPHY=y
+ CONFIG_MSM_CSID=y
+ CONFIG_MSM_EEPROM=y
+ CONFIG_MSM_ISPIF_V2=y
+-CONFIG_IMX134=y
+-CONFIG_IMX132=y
+-CONFIG_OV9724=y
+-CONFIG_OV5648=y
+-CONFIG_GC0339=y
+-CONFIG_OV8825=y
+-CONFIG_OV8865=y
+-CONFIG_s5k4e1=y
+-CONFIG_OV12830=y
+ CONFIG_MSM_V4L2_VIDEO_OVERLAY_DEVICE=y
+ CONFIG_MSMB_JPEG=y
+ CONFIG_MSM_FD=y
+@@ -635,6 +629,7 @@ CONFIG_EXT4_FS_ICE_ENCRYPTION=y
+ CONFIG_F2FS_FS=y
+ CONFIG_F2FS_FS_SECURITY=y
+ CONFIG_F2FS_FS_ENCRYPTION=y
++CONFIG_FANOTIFY=y
+ CONFIG_QUOTA=y
+ CONFIG_QUOTA_NETLINK_INTERFACE=y
+ CONFIG_QFMT_V2=y
+diff --git a/arch/arm/configs/sa415m-perf_defconfig b/arch/arm/configs/sa415m-perf_defconfig
+index aca827b951a6..a14833faf8ed 100644
+--- a/arch/arm/configs/sa415m-perf_defconfig
++++ b/arch/arm/configs/sa415m-perf_defconfig
+@@ -315,7 +315,6 @@ CONFIG_USB_CONFIGFS_RNDIS=y
+ CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+ CONFIG_USB_CONFIGFS_F_FS=y
+ CONFIG_USB_CONFIGFS_UEVENT=y
+-CONFIG_USB_CONFIGFS_F_UAC1=y
+ CONFIG_USB_CONFIGFS_F_DIAG=y
+ CONFIG_USB_CONFIGFS_F_CDEV=y
+ CONFIG_USB_CONFIGFS_F_GSI=y
+diff --git a/arch/arm/configs/sa415m_defconfig b/arch/arm/configs/sa415m_defconfig
+index 6e31335e7910..2fbd4d678b41 100644
+--- a/arch/arm/configs/sa415m_defconfig
++++ b/arch/arm/configs/sa415m_defconfig
+@@ -328,7 +328,6 @@ CONFIG_USB_CONFIGFS_RNDIS=y
+ CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+ CONFIG_USB_CONFIGFS_F_FS=y
+ CONFIG_USB_CONFIGFS_UEVENT=y
+-CONFIG_USB_CONFIGFS_F_UAC1=y
+ CONFIG_USB_CONFIGFS_F_DIAG=y
+ CONFIG_USB_CONFIGFS_F_CDEV=y
+ CONFIG_USB_CONFIGFS_F_GSI=y
+diff --git a/arch/arm/configs/sdm670-perf_defconfig b/arch/arm/configs/sdm670-perf_defconfig
+index a4d16315303c..23ca983cb5bc 100755
+--- a/arch/arm/configs/sdm670-perf_defconfig
++++ b/arch/arm/configs/sdm670-perf_defconfig
+@@ -40,6 +40,7 @@ CONFIG_BPF_SYSCALL=y
+ # CONFIG_AIO is not set
+ # CONFIG_MEMBARRIER is not set
+ CONFIG_EMBEDDED=y
++# CONFIG_SLUB_DEBUG is not set
+ # CONFIG_COMPAT_BRK is not set
+ CONFIG_PROFILING=y
+ CONFIG_CC_STACKPROTECTOR_REGULAR=y
+@@ -56,6 +57,7 @@ CONFIG_PARTITION_ADVANCED=y
+ CONFIG_CFQ_GROUP_IOSCHED=y
+ CONFIG_ARCH_QCOM=y
+ CONFIG_ARCH_SDM670=y
++# CONFIG_DEBUG_RODATA is not set
+ CONFIG_PCI_MSM=y
+ CONFIG_SMP=y
+ CONFIG_SCHED_MC=y
+@@ -555,14 +557,18 @@ CONFIG_MAGIC_SYSRQ=y
+ CONFIG_PAGE_EXTENSION=y
+ CONFIG_DETECT_HUNG_TASK=y
+ CONFIG_PANIC_TIMEOUT=5
++# CONFIG_SCHED_DEBUG is not set
+ CONFIG_SCHEDSTATS=y
+ # CONFIG_DEBUG_PREEMPT is not set
++# CONFIG_DEBUG_BUGVERBOSE is not set
+ CONFIG_IPC_LOGGING=y
+ CONFIG_TRACER_SNAPSHOT=y
+ CONFIG_TRACER_SNAPSHOT_PER_CPU_SWAP=y
+ CONFIG_CPU_FREQ_SWITCH_PROFILER=y
+ CONFIG_CORESIGHT=y
+ CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
++CONFIG_CORESIGHT_REMOTE_ETM=y
++CONFIG_CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE=0
+ CONFIG_CORESIGHT_QCOM_REPLICATOR=y
+ CONFIG_CORESIGHT_STM=y
+ CONFIG_CORESIGHT_TPDA=y
+diff --git a/arch/arm/configs/vendor/msm8909go-perf_defconfig b/arch/arm/configs/vendor/msm8909go-perf_defconfig
+new file mode 100644
+index 000000000000..95598bd40a9f
+--- /dev/null
++++ b/arch/arm/configs/vendor/msm8909go-perf_defconfig
+@@ -0,0 +1,555 @@
++CONFIG_LOCALVERSION="-perf"
++CONFIG_POSIX_MQUEUE=y
++# CONFIG_AUDITSYSCALL is not set
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_IRQ_TIME_ACCOUNTING=y
++CONFIG_SCHED_WALT=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_XACCT=y
++CONFIG_TASK_IO_ACCOUNTING=y
++CONFIG_RCU_EXPERT=y
++CONFIG_RCU_FAST_NO_HZ=y
++CONFIG_RCU_NOCB_CPU=y
++CONFIG_RCU_NOCB_CPU_ALL=y
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
++CONFIG_CGROUP_FREEZER=y
++CONFIG_CGROUP_DEVICE=y
++CONFIG_CPUSETS=y
++CONFIG_CGROUP_CPUACCT=y
++CONFIG_CGROUP_SCHEDTUNE=y
++CONFIG_MEMCG=y
++CONFIG_MEMCG_SWAP=y
++CONFIG_RT_GROUP_SCHED=y
++CONFIG_CGROUP_BPF=y
++CONFIG_SCHED_CORE_CTL=y
++CONFIG_NAMESPACES=y
++CONFIG_SCHED_AUTOGROUP=y
++CONFIG_SCHED_TUNE=y
++CONFIG_DEFAULT_USE_ENERGY_AWARE=y
++CONFIG_BLK_DEV_INITRD=y
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_LZMA is not set
++# CONFIG_RD_XZ is not set
++# CONFIG_RD_LZO is not set
++# CONFIG_RD_LZ4 is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_KALLSYMS_ALL=y
++CONFIG_BPF_SYSCALL=y
++# CONFIG_MEMBARRIER is not set
++CONFIG_EMBEDDED=y
++# CONFIG_SLUB_DEBUG is not set
++# CONFIG_COMPAT_BRK is not set
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_CC_STACKPROTECTOR_REGULAR=y
++CONFIG_ARCH_MMAP_RND_BITS=16
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SIG=y
++CONFIG_MODULE_SIG_FORCE=y
++CONFIG_MODULE_SIG_SHA512=y
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_ARCH_QCOM=y
++CONFIG_ARCH_MSM8909=y
++CONFIG_SMP=y
++CONFIG_SCHED_MC=y
++CONFIG_PREEMPT=y
++CONFIG_AEABI=y
++CONFIG_HIGHMEM=y
++CONFIG_ARM_MODULE_PLTS=y
++CONFIG_CMA=y
++CONFIG_ZSMALLOC=y
++CONFIG_BALANCE_ANON_FILE_RECLAIM=y
++CONFIG_SECCOMP=y
++CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
++CONFIG_CPU_IDLE=y
++CONFIG_VFP=y
++CONFIG_NEON=y
++CONFIG_KERNEL_MODE_NEON=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_PM_AUTOSLEEP=y
++CONFIG_PM_WAKELOCKS=y
++CONFIG_PM_WAKELOCKS_LIMIT=0
++# CONFIG_PM_WAKELOCKS_GC is not set
++CONFIG_NET=y
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM_USER=y
++CONFIG_XFRM_STATISTICS=y
++CONFIG_NET_KEY=y
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_VERBOSE=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_INET_AH=y
++CONFIG_INET_ESP=y
++CONFIG_INET_IPCOMP=y
++CONFIG_INET_DIAG_DESTROY=y
++CONFIG_IPV6_ROUTER_PREF=y
++CONFIG_IPV6_ROUTE_INFO=y
++CONFIG_IPV6_OPTIMISTIC_DAD=y
++CONFIG_INET6_AH=y
++CONFIG_INET6_ESP=y
++CONFIG_INET6_IPCOMP=y
++CONFIG_IPV6_MIP6=y
++CONFIG_IPV6_MULTIPLE_TABLES=y
++CONFIG_IPV6_SUBTREES=y
++CONFIG_NETFILTER=y
++CONFIG_NF_CONNTRACK=y
++CONFIG_NF_CONNTRACK_SECMARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CT_PROTO_DCCP=y
++CONFIG_NF_CT_PROTO_SCTP=y
++CONFIG_NF_CT_PROTO_UDPLITE=y
++CONFIG_NF_CONNTRACK_AMANDA=y
++CONFIG_NF_CONNTRACK_FTP=y
++CONFIG_NF_CONNTRACK_H323=y
++CONFIG_NF_CONNTRACK_IRC=y
++CONFIG_NF_CONNTRACK_NETBIOS_NS=y
++CONFIG_NF_CONNTRACK_PPTP=y
++CONFIG_NF_CONNTRACK_SANE=y
++CONFIG_NF_CONNTRACK_TFTP=y
++CONFIG_NF_CT_NETLINK=y
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
++CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
++CONFIG_NETFILTER_XT_TARGET_HARDIDLETIMER=y
++CONFIG_NETFILTER_XT_TARGET_MARK=y
++CONFIG_NETFILTER_XT_TARGET_NFLOG=y
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
++CONFIG_NETFILTER_XT_TARGET_TEE=y
++CONFIG_NETFILTER_XT_TARGET_TPROXY=y
++CONFIG_NETFILTER_XT_TARGET_TRACE=y
++CONFIG_NETFILTER_XT_TARGET_SECMARK=y
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
++CONFIG_NETFILTER_XT_MATCH_COMMENT=y
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
++CONFIG_NETFILTER_XT_MATCH_DSCP=y
++CONFIG_NETFILTER_XT_MATCH_ESP=y
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
++CONFIG_NETFILTER_XT_MATCH_HELPER=y
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
++CONFIG_NETFILTER_XT_MATCH_LENGTH=y
++CONFIG_NETFILTER_XT_MATCH_LIMIT=y
++CONFIG_NETFILTER_XT_MATCH_MAC=y
++CONFIG_NETFILTER_XT_MATCH_MARK=y
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
++CONFIG_NETFILTER_XT_MATCH_OWNER=y
++CONFIG_NETFILTER_XT_MATCH_POLICY=y
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
++CONFIG_NETFILTER_XT_MATCH_QUOTA=y
++CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
++CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
++CONFIG_NETFILTER_XT_MATCH_SOCKET=y
++CONFIG_NETFILTER_XT_MATCH_STATE=y
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
++CONFIG_NETFILTER_XT_MATCH_STRING=y
++CONFIG_NETFILTER_XT_MATCH_TIME=y
++CONFIG_NETFILTER_XT_MATCH_U32=y
++CONFIG_NF_CONNTRACK_IPV4=y
++CONFIG_IP_NF_IPTABLES=y
++CONFIG_IP_NF_MATCH_AH=y
++CONFIG_IP_NF_MATCH_ECN=y
++CONFIG_IP_NF_MATCH_RPFILTER=y
++CONFIG_IP_NF_MATCH_TTL=y
++CONFIG_IP_NF_FILTER=y
++CONFIG_IP_NF_TARGET_REJECT=y
++CONFIG_IP_NF_NAT=y
++CONFIG_IP_NF_TARGET_MASQUERADE=y
++CONFIG_IP_NF_TARGET_NETMAP=y
++CONFIG_IP_NF_TARGET_REDIRECT=y
++CONFIG_IP_NF_MANGLE=y
++CONFIG_IP_NF_RAW=y
++CONFIG_IP_NF_SECURITY=y
++CONFIG_IP_NF_ARPTABLES=y
++CONFIG_IP_NF_ARPFILTER=y
++CONFIG_IP_NF_ARP_MANGLE=y
++CONFIG_NF_CONNTRACK_IPV6=y
++CONFIG_IP6_NF_IPTABLES=y
++CONFIG_IP6_NF_MATCH_RPFILTER=y
++CONFIG_IP6_NF_FILTER=y
++CONFIG_IP6_NF_TARGET_REJECT=y
++CONFIG_IP6_NF_MANGLE=y
++CONFIG_IP6_NF_RAW=y
++CONFIG_BRIDGE_NF_EBTABLES=y
++CONFIG_BRIDGE_EBT_BROUTE=y
++CONFIG_L2TP=y
++CONFIG_L2TP_V3=y
++CONFIG_L2TP_IP=y
++CONFIG_L2TP_ETH=y
++CONFIG_BRIDGE=y
++CONFIG_NET_SCHED=y
++CONFIG_NET_SCH_HTB=y
++CONFIG_NET_SCH_PRIO=y
++CONFIG_NET_SCH_MULTIQ=y
++CONFIG_NET_SCH_INGRESS=y
++CONFIG_NET_CLS_FW=y
++CONFIG_NET_CLS_U32=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_FLOW=y
++CONFIG_NET_EMATCH=y
++CONFIG_NET_EMATCH_CMP=y
++CONFIG_NET_EMATCH_NBYTE=y
++CONFIG_NET_EMATCH_U32=y
++CONFIG_NET_EMATCH_META=y
++CONFIG_NET_EMATCH_TEXT=y
++CONFIG_NET_CLS_ACT=y
++CONFIG_NET_ACT_GACT=y
++CONFIG_NET_ACT_MIRRED=y
++CONFIG_NET_ACT_SKBEDIT=y
++CONFIG_DNS_RESOLVER=y
++CONFIG_RMNET_DATA=y
++CONFIG_RMNET_DATA_FC=y
++CONFIG_SOCKEV_NLMCAST=y
++CONFIG_BT=y
++CONFIG_MSM_BT_POWER=y
++CONFIG_CFG80211=y
++CONFIG_CFG80211_INTERNAL_REGDB=y
++CONFIG_RFKILL=y
++CONFIG_NFC_NQ=y
++CONFIG_IPC_ROUTER=y
++CONFIG_IPC_ROUTER_SECURITY=y
++CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
++CONFIG_DMA_CMA=y
++CONFIG_CMA_SIZE_MBYTES=8
++CONFIG_ZRAM=y
++CONFIG_BLK_DEV_LOOP=y
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_SIZE=8192
++CONFIG_HDCP_QSEECOM=y
++CONFIG_QSEECOM=y
++CONFIG_UID_SYS_STATS=y
++CONFIG_MEMORY_STATE_TIME=y
++CONFIG_MD=y
++CONFIG_BLK_DEV_MD=y
++CONFIG_MD_LINEAR=y
++CONFIG_BLK_DEV_DM=y
++CONFIG_DM_CRYPT=y
++CONFIG_DM_REQ_CRYPT=y
++CONFIG_DM_DEFAULT_KEY=y
++CONFIG_DM_UEVENT=y
++CONFIG_DM_VERITY=y
++CONFIG_DM_VERITY_FEC=y
++CONFIG_DM_ANDROID_VERITY=y
++CONFIG_NETDEVICES=y
++CONFIG_DUMMY=y
++CONFIG_TUN=y
++CONFIG_PPP=y
++CONFIG_PPP_BSDCOMP=y
++CONFIG_PPP_DEFLATE=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_MPPE=y
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPPOE=y
++CONFIG_PPPOL2TP=y
++CONFIG_PPPOLAC=y
++CONFIG_PPPOPNS=y
++CONFIG_PPP_ASYNC=y
++CONFIG_PPP_SYNC_TTY=y
++CONFIG_WCNSS_MEM_PRE_ALLOC=y
++CONFIG_CNSS=y
++CONFIG_CNSS_SDIO=y
++CONFIG_CLD_HL_SDIO_CORE=y
++CONFIG_INPUT_EVDEV=y
++CONFIG_KEYBOARD_GPIO=y
++CONFIG_KEYBOARD_MATRIX=y
++# CONFIG_INPUT_MOUSE is not set
++CONFIG_INPUT_JOYSTICK=y
++CONFIG_JOYSTICK_XPAD=y
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE_v26=y
++CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV_v26=y
++CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v26=y
++CONFIG_TOUCHSCREEN_GEN_VKEYS=y
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_QPNP_POWER_ON=y
++CONFIG_STMVL53L0X=y
++CONFIG_INPUT_UINPUT=y
++CONFIG_INPUT_GPIO=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_DEVMEM is not set
++# CONFIG_DEVKMEM is not set
++CONFIG_SERIAL_MSM_HS=y
++CONFIG_SERIAL_MSM_SMD=y
++CONFIG_DIAG_CHAR=y
++CONFIG_DIAG_USES_SMD=y
++CONFIG_HW_RANDOM=y
++CONFIG_HW_RANDOM_MSM_LEGACY=y
++CONFIG_MSM_SMD_PKT=y
++CONFIG_MSM_ADSPRPC=y
++CONFIG_I2C_CHARDEV=y
++CONFIG_I2C_MSM_V2=y
++CONFIG_SPI=y
++CONFIG_SPI_QUP=y
++CONFIG_SPI_SPIDEV=y
++CONFIG_SLIMBUS_MSM_NGD=y
++CONFIG_SPMI=y
++CONFIG_PINCTRL_MSM8909=y
++CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
++CONFIG_GPIO_SYSFS=y
++CONFIG_POWER_RESET=y
++CONFIG_POWER_RESET_QCOM=y
++CONFIG_QCOM_DLOAD_MODE=y
++CONFIG_POWER_RESET_SYSCON=y
++CONFIG_POWER_RESET_SYSCON_POWEROFF=y
++CONFIG_POWER_SUPPLY=y
++CONFIG_SMB1360_CHARGER_FG=y
++CONFIG_QPNP_VM_BMS=y
++CONFIG_QPNP_LINEAR_CHARGER=y
++CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
++CONFIG_THERMAL=y
++CONFIG_THERMAL_WRITABLE_TRIPS=y
++CONFIG_THERMAL_GOV_USER_SPACE=y
++CONFIG_THERMAL_GOV_LOW_LIMITS=y
++CONFIG_CPU_THERMAL=y
++CONFIG_DEVFREQ_THERMAL=y
++CONFIG_THERMAL_QPNP=y
++CONFIG_THERMAL_QPNP_ADC_TM=y
++CONFIG_THERMAL_TSENS=y
++CONFIG_MSM_BCL_PERIPHERAL_CTL=y
++CONFIG_QTI_THERMAL_LIMITS_DCVS=y
++CONFIG_QTI_QMI_COOLING_DEVICE=y
++CONFIG_REGULATOR_COOLING_DEVICE=y
++CONFIG_MFD_QCOM_RPM=y
++CONFIG_MFD_SPMI_PMIC=y
++CONFIG_REGULATOR=y
++CONFIG_REGULATOR_FIXED_VOLTAGE=y
++CONFIG_REGULATOR_PROXY_CONSUMER=y
++CONFIG_REGULATOR_QCOM_RPM=y
++CONFIG_REGULATOR_QCOM_SPMI=y
++CONFIG_REGULATOR_CPR=y
++CONFIG_REGULATOR_MEM_ACC=y
++CONFIG_REGULATOR_MSM_GFX_LDO=y
++CONFIG_REGULATOR_QPNP=y
++CONFIG_REGULATOR_RPM_SMD=y
++CONFIG_REGULATOR_SPM=y
++CONFIG_REGULATOR_STUB=y
++CONFIG_MEDIA_SUPPORT=y
++CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_CONTROLLER=y
++CONFIG_VIDEO_V4L2_SUBDEV_API=y
++CONFIG_V4L_PLATFORM_DRIVERS=y
++CONFIG_SOC_CAMERA=y
++CONFIG_MSMB_CAMERA=y
++CONFIG_MSM_CAMERA_SENSOR=y
++CONFIG_MSM_CSI30_HEADER=y
++CONFIG_MSM_CSIPHY=y
++CONFIG_MSM_CSID=y
++CONFIG_MSM_EEPROM=y
++CONFIG_MSM_ISP_V1=y
++CONFIG_MSM_ISPIF=y
++CONFIG_MSM_VIDC_3X_V4L2=y
++CONFIG_MSM_VIDC_3X_GOVERNORS=y
++CONFIG_RADIO_IRIS=y
++CONFIG_RADIO_IRIS_TRANSPORT=y
++CONFIG_QCOM_KGSL=y
++CONFIG_FB=y
++CONFIG_FB_VIRTUAL=y
++CONFIG_FB_MSM=y
++CONFIG_FB_MSM_MDSS=y
++CONFIG_FB_MSM_MDSS_WRITEBACK=y
++CONFIG_FB_MSM_MDSS_SPI_PANEL=y
++CONFIG_FB_MSM_MDSS_DSI_CTRL_STATUS=y
++CONFIG_FB_MSM_MDSS_MDP3=y
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++CONFIG_LOGO=y
++CONFIG_SOUND=y
++CONFIG_SND=y
++CONFIG_SND_DYNAMIC_MINORS=y
++CONFIG_SND_SOC=y
++CONFIG_UHID=y
++CONFIG_USB_HIDDEV=y
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++CONFIG_USB_MON=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_MSM=y
++CONFIG_USB_ACM=y
++CONFIG_USB_SERIAL=y
++CONFIG_USB_SERIAL_CP210X=y
++CONFIG_USB_SERIAL_FTDI_SIO=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DEBUG_FILES=y
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_VBUS_DRAW=500
++CONFIG_USB_CI13XXX_MSM=y
++CONFIG_USB_CONFIGFS=y
++CONFIG_USB_CONFIGFS_SERIAL=y
++CONFIG_USB_CONFIGFS_NCM=y
++CONFIG_USB_CONFIGFS_RNDIS=y
++CONFIG_USB_CONFIGFS_RMNET_BAM=y
++CONFIG_USB_CONFIGFS_MASS_STORAGE=y
++CONFIG_USB_CONFIGFS_F_FS=y
++CONFIG_USB_CONFIGFS_F_MTP=y
++CONFIG_USB_CONFIGFS_F_PTP=y
++CONFIG_USB_CONFIGFS_UEVENT=y
++CONFIG_USB_CONFIGFS_F_DIAG=y
++CONFIG_USB_CONFIGFS_F_CDEV=y
++CONFIG_MMC=y
++CONFIG_MMC_PERF_PROFILING=y
++CONFIG_MMC_RING_BUFFER=y
++CONFIG_MMC_PARANOID_SD_INIT=y
++CONFIG_MMC_CLKGATE=y
++CONFIG_MMC_BLOCK_MINORS=32
++CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SDHCI_MSM=y
++CONFIG_MMC_SDHCI_MSM_ICE=y
++CONFIG_LEDS_CLASS_FLASH=y
++CONFIG_LEDS_QPNP=y
++CONFIG_LEDS_MSM_GPIO_FLASH=y
++CONFIG_LEDS_QPNP_VIBRATOR=y
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_DRV_QPNP=y
++CONFIG_DMADEVICES=y
++CONFIG_QCOM_SPS_DMA=y
++CONFIG_UIO=y
++CONFIG_UIO_MSM_SHAREDMEM=y
++CONFIG_STAGING=y
++CONFIG_ASHMEM=y
++CONFIG_ANDROID_LOW_MEMORY_KILLER=y
++CONFIG_ION=y
++CONFIG_ION_MSM=y
++CONFIG_IPA=y
++CONFIG_RMNET_IPA=y
++CONFIG_RNDIS_IPA=y
++CONFIG_SPS=y
++CONFIG_SPS_SUPPORT_NDP_BAM=y
++CONFIG_QPNP_REVID=y
++CONFIG_USB_BAM=y
++CONFIG_MSM_RMNET_BAM=y
++CONFIG_MSM_MDSS_PLL=y
++CONFIG_REMOTE_SPINLOCK_MSM=y
++CONFIG_MAILBOX=y
++CONFIG_ARM_SMMU=y
++CONFIG_QCOM_LAZY_MAPPING=y
++CONFIG_MSM_SPM=y
++CONFIG_MSM_L2_SPM=y
++CONFIG_MSM_BOOT_STATS=y
++CONFIG_MSM_CORE_HANG_DETECT=y
++CONFIG_MSM_GLADIATOR_HANG_DETECT=y
++CONFIG_QCOM_WATCHDOG_V2=y
++CONFIG_QCOM_MEMORY_DUMP_V2=y
++CONFIG_QCOM_BUS_SCALING=y
++CONFIG_QCOM_SECURE_BUFFER=y
++CONFIG_QCOM_EARLY_RANDOM=y
++CONFIG_MSM_SMEM=y
++CONFIG_MSM_SMD=y
++CONFIG_MSM_GLINK=y
++CONFIG_MSM_TZ_SMMU=y
++CONFIG_MSM_GLINK_LOOPBACK_SERVER=y
++CONFIG_MSM_GLINK_SMEM_NATIVE_XPRT=y
++CONFIG_MSM_GLINK_SPI_XPRT=y
++CONFIG_TRACER_PKT=y
++CONFIG_MSM_SMP2P=y
++CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
++CONFIG_MSM_IPC_ROUTER_GLINK_XPRT=y
++CONFIG_MSM_QMI_INTERFACE=y
++CONFIG_MSM_GLINK_PKT=y
++CONFIG_MSM_SUBSYSTEM_RESTART=y
++CONFIG_MSM_PIL=y
++CONFIG_MSM_PIL_SSR_GENERIC=y
++CONFIG_MSM_PIL_MSS_QDSP6V5=y
++CONFIG_MSM_EVENT_TIMER=y
++CONFIG_MSM_AVTIMER=y
++CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
++CONFIG_MEM_SHARE_QMI_SERVICE=y
++CONFIG_MSM_BAM_DMUX=y
++CONFIG_WCNSS_CORE=y
++CONFIG_WCNSS_CORE_PRONTO=y
++CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
++CONFIG_CNSS_CRYPTO=y
++CONFIG_IIO=y
++CONFIG_INV_ICM20602_IIO=y
++CONFIG_PWM=y
++CONFIG_PWM_QPNP=y
++CONFIG_QCOM_SHOW_RESUME_IRQ=y
++CONFIG_QTI_MPM=y
++CONFIG_ANDROID=y
++CONFIG_ANDROID_BINDER_IPC=y
++CONFIG_ANDROID_BINDER_IPC_32BIT=y
++CONFIG_STM=y
++CONFIG_SENSORS_SSC=y
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_SECURITY=y
++CONFIG_EXT4_ENCRYPTION=y
++CONFIG_EXT4_FS_ENCRYPTION=y
++CONFIG_EXT4_FS_ICE_ENCRYPTION=y
++CONFIG_F2FS_FS=y
++CONFIG_F2FS_FS_SECURITY=y
++CONFIG_F2FS_FS_ENCRYPTION=y
++CONFIG_FANOTIFY=y
++CONFIG_QUOTA=y
++CONFIG_QUOTA_NETLINK_INTERFACE=y
++# CONFIG_PRINT_QUOTA_WARNING is not set
++CONFIG_FUSE_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_TMPFS=y
++CONFIG_ECRYPT_FS=y
++CONFIG_ECRYPT_FS_MESSAGING=y
++CONFIG_SDCARD_FS=y
++CONFIG_NLS_CODEPAGE_437=y
++CONFIG_NLS_ASCII=y
++CONFIG_NLS_ISO8859_1=y
++CONFIG_PRINTK_TIME=y
++CONFIG_FRAME_WARN=2048
++CONFIG_MAGIC_SYSRQ=y
++CONFIG_LOCKUP_DETECTOR=y
++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
++# CONFIG_DETECT_HUNG_TASK is not set
++CONFIG_WQ_WATCHDOG=y
++CONFIG_PANIC_TIMEOUT=5
++CONFIG_PANIC_ON_SCHED_BUG=y
++CONFIG_PANIC_ON_RT_THROTTLING=y
++CONFIG_SCHED_STACK_END_CHECK=y
++CONFIG_FAULT_INJECTION=y
++CONFIG_FAIL_PAGE_ALLOC=y
++CONFIG_QCOM_RTB=y
++CONFIG_QCOM_RTB_SEPARATE_CPUS=y
++CONFIG_CPU_FREQ_SWITCH_PROFILER=y
++CONFIG_LKDTM=y
++CONFIG_MEMTEST=y
++CONFIG_PANIC_ON_DATA_CORRUPTION=y
++CONFIG_PID_IN_CONTEXTIDR=y
++CONFIG_CORESIGHT=y
++CONFIG_PFK=y
++CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
++CONFIG_SECURITY=y
++CONFIG_LSM_MMAP_MIN_ADDR=4096
++CONFIG_HARDENED_USERCOPY=y
++CONFIG_SECURITY_SELINUX=y
++CONFIG_SECURITY_SMACK=y
++CONFIG_SECURITY_APPARMOR=y
++CONFIG_CRYPTO_XCBC=y
++CONFIG_CRYPTO_MD4=y
++CONFIG_CRYPTO_TWOFISH=y
++CONFIG_CRYPTO_ANSI_CPRNG=y
++CONFIG_CRYPTO_DEV_QCE=y
++CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y
++CONFIG_CRYPTO_DEV_QCRYPTO=y
++CONFIG_CRYPTO_DEV_QCEDEV=y
++CONFIG_CRYPTO_DEV_OTA_CRYPTO=y
++CONFIG_CRYPTO_DEV_QCOM_ICE=y
++CONFIG_SYSTEM_TRUSTED_KEYS="verity.x509.pem"
++CONFIG_ARM_CRYPTO=y
++CONFIG_CRYPTO_SHA1_ARM_NEON=y
++CONFIG_CRYPTO_SHA2_ARM_CE=y
++CONFIG_CRYPTO_AES_ARM_BS=y
++CONFIG_CRYPTO_AES_ARM_CE=y
++CONFIG_QMI_ENCDEC=y
+diff --git a/arch/arm/configs/vendor/msm8909go_defconfig b/arch/arm/configs/vendor/msm8909go_defconfig
+new file mode 100644
+index 000000000000..b1b56d757c35
+--- /dev/null
++++ b/arch/arm/configs/vendor/msm8909go_defconfig
+@@ -0,0 +1,596 @@
++CONFIG_POSIX_MQUEUE=y
++# CONFIG_AUDITSYSCALL is not set
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_IRQ_TIME_ACCOUNTING=y
++CONFIG_SCHED_WALT=y
++CONFIG_TASKSTATS=y
++CONFIG_TASK_DELAY_ACCT=y
++CONFIG_TASK_XACCT=y
++CONFIG_TASK_IO_ACCOUNTING=y
++CONFIG_RCU_EXPERT=y
++CONFIG_RCU_FAST_NO_HZ=y
++CONFIG_RCU_NOCB_CPU=y
++CONFIG_RCU_NOCB_CPU_ALL=y
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_CPU_MAX_BUF_SHIFT=17
++CONFIG_CGROUP_DEBUG=y
++CONFIG_CGROUP_FREEZER=y
++CONFIG_CGROUP_DEVICE=y
++CONFIG_CPUSETS=y
++CONFIG_CGROUP_CPUACCT=y
++CONFIG_CGROUP_SCHEDTUNE=y
++CONFIG_MEMCG=y
++CONFIG_MEMCG_SWAP=y
++CONFIG_RT_GROUP_SCHED=y
++CONFIG_CGROUP_BPF=y
++CONFIG_SCHED_CORE_CTL=y
++CONFIG_NAMESPACES=y
++CONFIG_SCHED_AUTOGROUP=y
++CONFIG_SCHED_TUNE=y
++CONFIG_DEFAULT_USE_ENERGY_AWARE=y
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_KALLSYMS_ALL=y
++CONFIG_BPF_SYSCALL=y
++CONFIG_EMBEDDED=y
++CONFIG_PROFILING=y
++CONFIG_OPROFILE=m
++CONFIG_KPROBES=y
++CONFIG_ARCH_MMAP_RND_BITS=16
++CONFIG_MODULES=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++CONFIG_MODULE_SIG=y
++CONFIG_MODULE_SIG_FORCE=y
++CONFIG_MODULE_SIG_SHA512=y
++CONFIG_PARTITION_ADVANCED=y
++CONFIG_ARCH_QCOM=y
++CONFIG_ARCH_MSM8909=y
++CONFIG_SMP=y
++CONFIG_SCHED_MC=y
++CONFIG_PREEMPT=y
++CONFIG_AEABI=y
++CONFIG_HIGHMEM=y
++CONFIG_ARM_MODULE_PLTS=y
++CONFIG_CMA=y
++CONFIG_CMA_DEBUGFS=y
++CONFIG_ZSMALLOC=y
++CONFIG_BALANCE_ANON_FILE_RECLAIM=y
++CONFIG_SECCOMP=y
++CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
++CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
++CONFIG_CPU_IDLE=y
++CONFIG_VFP=y
++CONFIG_NEON=y
++CONFIG_KERNEL_MODE_NEON=y
++CONFIG_PM_AUTOSLEEP=y
++CONFIG_PM_WAKELOCKS=y
++CONFIG_PM_WAKELOCKS_LIMIT=0
++CONFIG_PM_DEBUG=y
++CONFIG_NET=y
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM_USER=y
++CONFIG_XFRM_STATISTICS=y
++CONFIG_NET_KEY=y
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_IP_MULTIPLE_TABLES=y
++CONFIG_IP_ROUTE_VERBOSE=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_INET_AH=y
++CONFIG_INET_ESP=y
++CONFIG_INET_IPCOMP=y
++CONFIG_INET_DIAG_DESTROY=y
++CONFIG_IPV6_ROUTER_PREF=y
++CONFIG_IPV6_ROUTE_INFO=y
++CONFIG_IPV6_OPTIMISTIC_DAD=y
++CONFIG_INET6_AH=y
++CONFIG_INET6_ESP=y
++CONFIG_INET6_IPCOMP=y
++CONFIG_IPV6_MIP6=y
++CONFIG_IPV6_MULTIPLE_TABLES=y
++CONFIG_IPV6_SUBTREES=y
++CONFIG_NETFILTER=y
++CONFIG_NF_CONNTRACK=y
++CONFIG_NF_CONNTRACK_SECMARK=y
++CONFIG_NF_CONNTRACK_EVENTS=y
++CONFIG_NF_CT_PROTO_DCCP=y
++CONFIG_NF_CT_PROTO_SCTP=y
++CONFIG_NF_CT_PROTO_UDPLITE=y
++CONFIG_NF_CONNTRACK_AMANDA=y
++CONFIG_NF_CONNTRACK_FTP=y
++CONFIG_NF_CONNTRACK_H323=y
++CONFIG_NF_CONNTRACK_IRC=y
++CONFIG_NF_CONNTRACK_NETBIOS_NS=y
++CONFIG_NF_CONNTRACK_PPTP=y
++CONFIG_NF_CONNTRACK_SANE=y
++CONFIG_NF_CONNTRACK_TFTP=y
++CONFIG_NF_CT_NETLINK=y
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
++CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y
++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
++CONFIG_NETFILTER_XT_TARGET_HARDIDLETIMER=y
++CONFIG_NETFILTER_XT_TARGET_LOG=y
++CONFIG_NETFILTER_XT_TARGET_MARK=y
++CONFIG_NETFILTER_XT_TARGET_NFLOG=y
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=y
++CONFIG_NETFILTER_XT_TARGET_TEE=y
++CONFIG_NETFILTER_XT_TARGET_TPROXY=y
++CONFIG_NETFILTER_XT_TARGET_TRACE=y
++CONFIG_NETFILTER_XT_TARGET_SECMARK=y
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
++CONFIG_NETFILTER_XT_MATCH_COMMENT=y
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=y
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
++CONFIG_NETFILTER_XT_MATCH_DSCP=y
++CONFIG_NETFILTER_XT_MATCH_ESP=y
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
++CONFIG_NETFILTER_XT_MATCH_HELPER=y
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=y
++CONFIG_NETFILTER_XT_MATCH_LENGTH=y
++CONFIG_NETFILTER_XT_MATCH_LIMIT=y
++CONFIG_NETFILTER_XT_MATCH_MAC=y
++CONFIG_NETFILTER_XT_MATCH_MARK=y
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
++CONFIG_NETFILTER_XT_MATCH_OWNER=y
++CONFIG_NETFILTER_XT_MATCH_POLICY=y
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
++CONFIG_NETFILTER_XT_MATCH_QUOTA=y
++CONFIG_NETFILTER_XT_MATCH_QUOTA2=y
++CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y
++CONFIG_NETFILTER_XT_MATCH_SOCKET=y
++CONFIG_NETFILTER_XT_MATCH_STATE=y
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
++CONFIG_NETFILTER_XT_MATCH_STRING=y
++CONFIG_NETFILTER_XT_MATCH_TIME=y
++CONFIG_NETFILTER_XT_MATCH_U32=y
++CONFIG_NF_CONNTRACK_IPV4=y
++CONFIG_IP_NF_IPTABLES=y
++CONFIG_IP_NF_MATCH_AH=y
++CONFIG_IP_NF_MATCH_ECN=y
++CONFIG_IP_NF_MATCH_RPFILTER=y
++CONFIG_IP_NF_MATCH_TTL=y
++CONFIG_IP_NF_FILTER=y
++CONFIG_IP_NF_TARGET_REJECT=y
++CONFIG_IP_NF_NAT=y
++CONFIG_IP_NF_TARGET_MASQUERADE=y
++CONFIG_IP_NF_TARGET_NETMAP=y
++CONFIG_IP_NF_TARGET_REDIRECT=y
++CONFIG_IP_NF_MANGLE=y
++CONFIG_IP_NF_RAW=y
++CONFIG_IP_NF_SECURITY=y
++CONFIG_IP_NF_ARPTABLES=y
++CONFIG_IP_NF_ARPFILTER=y
++CONFIG_IP_NF_ARP_MANGLE=y
++CONFIG_NF_CONNTRACK_IPV6=y
++CONFIG_IP6_NF_IPTABLES=y
++CONFIG_IP6_NF_MATCH_RPFILTER=y
++CONFIG_IP6_NF_FILTER=y
++CONFIG_IP6_NF_TARGET_REJECT=y
++CONFIG_IP6_NF_MANGLE=y
++CONFIG_IP6_NF_RAW=y
++CONFIG_BRIDGE_NF_EBTABLES=y
++CONFIG_BRIDGE_EBT_BROUTE=y
++CONFIG_L2TP=y
++CONFIG_L2TP_DEBUGFS=y
++CONFIG_L2TP_V3=y
++CONFIG_L2TP_IP=y
++CONFIG_L2TP_ETH=y
++CONFIG_BRIDGE=y
++CONFIG_NET_SCHED=y
++CONFIG_NET_SCH_HTB=y
++CONFIG_NET_SCH_PRIO=y
++CONFIG_NET_SCH_MULTIQ=y
++CONFIG_NET_SCH_INGRESS=y
++CONFIG_NET_CLS_FW=y
++CONFIG_NET_CLS_U32=y
++CONFIG_CLS_U32_MARK=y
++CONFIG_NET_CLS_FLOW=y
++CONFIG_NET_EMATCH=y
++CONFIG_NET_EMATCH_CMP=y
++CONFIG_NET_EMATCH_NBYTE=y
++CONFIG_NET_EMATCH_U32=y
++CONFIG_NET_EMATCH_META=y
++CONFIG_NET_EMATCH_TEXT=y
++CONFIG_NET_CLS_ACT=y
++CONFIG_NET_ACT_GACT=y
++CONFIG_NET_ACT_MIRRED=y
++CONFIG_NET_ACT_SKBEDIT=y
++CONFIG_DNS_RESOLVER=y
++CONFIG_RMNET_DATA=y
++CONFIG_RMNET_DATA_FC=y
++CONFIG_RMNET_DATA_DEBUG_PKT=y
++CONFIG_SOCKEV_NLMCAST=y
++CONFIG_BT=y
++CONFIG_MSM_BT_POWER=y
++CONFIG_CFG80211=y
++CONFIG_CFG80211_INTERNAL_REGDB=y
++CONFIG_RFKILL=y
++CONFIG_NFC_NQ=y
++CONFIG_IPC_ROUTER=y
++CONFIG_IPC_ROUTER_SECURITY=y
++CONFIG_FW_LOADER_USER_HELPER_FALLBACK=y
++CONFIG_DMA_CMA=y
++CONFIG_CMA_SIZE_MBYTES=8
++CONFIG_ZRAM=y
++CONFIG_BLK_DEV_LOOP=y
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_SIZE=8192
++CONFIG_HDCP_QSEECOM=y
++CONFIG_QSEECOM=y
++CONFIG_UID_SYS_STATS=y
++CONFIG_MEMORY_STATE_TIME=y
++CONFIG_MD=y
++CONFIG_BLK_DEV_MD=y
++CONFIG_MD_LINEAR=y
++CONFIG_BLK_DEV_DM=y
++CONFIG_DM_DEBUG=y
++CONFIG_DM_CRYPT=y
++CONFIG_DM_REQ_CRYPT=y
++CONFIG_DM_DEFAULT_KEY=y
++CONFIG_DM_UEVENT=y
++CONFIG_DM_VERITY=y
++CONFIG_DM_VERITY_FEC=y
++CONFIG_DM_ANDROID_VERITY=y
++CONFIG_NETDEVICES=y
++CONFIG_DUMMY=y
++CONFIG_TUN=y
++CONFIG_PPP=y
++CONFIG_PPP_BSDCOMP=y
++CONFIG_PPP_DEFLATE=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_MPPE=y
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPPOE=y
++CONFIG_PPPOL2TP=y
++CONFIG_PPPOLAC=y
++CONFIG_PPPOPNS=y
++CONFIG_PPP_ASYNC=y
++CONFIG_PPP_SYNC_TTY=y
++CONFIG_WCNSS_MEM_PRE_ALLOC=y
++CONFIG_CNSS=y
++CONFIG_CNSS_SDIO=y
++CONFIG_CLD_HL_SDIO_CORE=y
++CONFIG_INPUT_EVDEV=y
++CONFIG_INPUT_EVBUG=y
++CONFIG_KEYBOARD_GPIO=y
++CONFIG_KEYBOARD_MATRIX=y
++# CONFIG_INPUT_MOUSE is not set
++CONFIG_INPUT_JOYSTICK=y
++CONFIG_JOYSTICK_XPAD=y
++CONFIG_INPUT_TOUCHSCREEN=y
++CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE_v26=y
++CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV_v26=y
++CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_v26=y
++CONFIG_TOUCHSCREEN_GEN_VKEYS=y
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_QPNP_POWER_ON=y
++CONFIG_STMVL53L0X=y
++CONFIG_INPUT_UINPUT=y
++CONFIG_INPUT_GPIO=y
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_DEVMEM is not set
++# CONFIG_DEVKMEM is not set
++CONFIG_SERIAL_MSM=y
++CONFIG_SERIAL_MSM_CONSOLE=y
++CONFIG_SERIAL_MSM_HS=y
++CONFIG_SERIAL_MSM_SMD=y
++CONFIG_DIAG_CHAR=y
++CONFIG_DIAG_USES_SMD=y
++CONFIG_HW_RANDOM=y
++CONFIG_HW_RANDOM_MSM_LEGACY=y
++CONFIG_MSM_SMD_PKT=y
++CONFIG_MSM_ADSPRPC=y
++CONFIG_MSM_RDBG=y
++CONFIG_I2C_CHARDEV=y
++CONFIG_I2C_MSM_V2=y
++CONFIG_SPI=y
++CONFIG_SPI_QUP=y
++CONFIG_SPI_SPIDEV=y
++CONFIG_SLIMBUS_MSM_NGD=y
++CONFIG_SPMI=y
++CONFIG_SPMI_MSM_PMIC_ARB_DEBUG=y
++CONFIG_PINCTRL_MSM8909=y
++CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
++CONFIG_GPIO_SYSFS=y
++CONFIG_POWER_RESET=y
++CONFIG_POWER_RESET_QCOM=y
++CONFIG_QCOM_DLOAD_MODE=y
++CONFIG_POWER_RESET_SYSCON=y
++CONFIG_POWER_RESET_SYSCON_POWEROFF=y
++CONFIG_POWER_SUPPLY=y
++CONFIG_SMB1360_CHARGER_FG=y
++CONFIG_QPNP_VM_BMS=y
++CONFIG_QPNP_LINEAR_CHARGER=y
++CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
++CONFIG_THERMAL=y
++CONFIG_THERMAL_WRITABLE_TRIPS=y
++CONFIG_THERMAL_GOV_USER_SPACE=y
++CONFIG_THERMAL_GOV_LOW_LIMITS=y
++CONFIG_CPU_THERMAL=y
++CONFIG_DEVFREQ_THERMAL=y
++CONFIG_THERMAL_QPNP=y
++CONFIG_THERMAL_QPNP_ADC_TM=y
++CONFIG_THERMAL_TSENS=y
++CONFIG_MSM_BCL_PERIPHERAL_CTL=y
++CONFIG_QTI_THERMAL_LIMITS_DCVS=y
++CONFIG_QTI_QMI_COOLING_DEVICE=y
++CONFIG_REGULATOR_COOLING_DEVICE=y
++CONFIG_MFD_QCOM_RPM=y
++CONFIG_MFD_SPMI_PMIC=y
++CONFIG_REGULATOR=y
++CONFIG_REGULATOR_FIXED_VOLTAGE=y
++CONFIG_REGULATOR_PROXY_CONSUMER=y
++CONFIG_REGULATOR_QCOM_RPM=y
++CONFIG_REGULATOR_QCOM_SPMI=y
++CONFIG_REGULATOR_CPR=y
++CONFIG_REGULATOR_MEM_ACC=y
++CONFIG_REGULATOR_MSM_GFX_LDO=y
++CONFIG_REGULATOR_QPNP=y
++CONFIG_REGULATOR_RPM_SMD=y
++CONFIG_REGULATOR_SPM=y
++CONFIG_REGULATOR_STUB=y
++CONFIG_MEDIA_SUPPORT=y
++CONFIG_MEDIA_CAMERA_SUPPORT=y
++CONFIG_MEDIA_CONTROLLER=y
++CONFIG_VIDEO_V4L2_SUBDEV_API=y
++CONFIG_V4L_PLATFORM_DRIVERS=y
++CONFIG_SOC_CAMERA=y
++CONFIG_MSMB_CAMERA=y
++CONFIG_MSM_CAMERA_SENSOR=y
++CONFIG_MSM_CSI30_HEADER=y
++CONFIG_MSM_CSIPHY=y
++CONFIG_MSM_CSID=y
++CONFIG_MSM_EEPROM=y
++CONFIG_MSM_ISP_V1=y
++CONFIG_MSM_ISPIF=y
++CONFIG_MSM_VIDC_3X_V4L2=y
++CONFIG_MSM_VIDC_3X_GOVERNORS=y
++CONFIG_RADIO_IRIS=y
++CONFIG_RADIO_IRIS_TRANSPORT=y
++CONFIG_QCOM_KGSL=y
++CONFIG_FB=y
++CONFIG_FB_VIRTUAL=y
++CONFIG_FB_MSM=y
++CONFIG_FB_MSM_MDSS=y
++CONFIG_FB_MSM_MDSS_WRITEBACK=y
++CONFIG_FB_MSM_MDSS_SPI_PANEL=y
++CONFIG_FB_MSM_MDSS_DSI_CTRL_STATUS=y
++CONFIG_FB_MSM_MDSS_MDP3=y
++CONFIG_FB_MSM_MDSS_XLOG_DEBUG=y
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++CONFIG_LOGO=y
++CONFIG_SOUND=y
++CONFIG_SND=y
++CONFIG_SND_DYNAMIC_MINORS=y
++CONFIG_SND_SOC=y
++CONFIG_UHID=y
++CONFIG_USB_HIDDEV=y
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++CONFIG_USB_MON=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_MSM=y
++CONFIG_USB_ACM=y
++CONFIG_USB_SERIAL=y
++CONFIG_USB_SERIAL_CP210X=y
++CONFIG_USB_SERIAL_FTDI_SIO=y
++CONFIG_USB_SERIAL_DEBUG=y
++CONFIG_USB_EHSET_TEST_FIXTURE=y
++CONFIG_USB_GADGET=y
++CONFIG_USB_GADGET_DEBUG_FILES=y
++CONFIG_USB_GADGET_DEBUG_FS=y
++CONFIG_USB_GADGET_VBUS_DRAW=500
++CONFIG_USB_CI13XXX_MSM=y
++CONFIG_USB_CONFIGFS=y
++CONFIG_USB_CONFIGFS_SERIAL=y
++CONFIG_USB_CONFIGFS_NCM=y
++CONFIG_USB_CONFIGFS_RNDIS=y
++CONFIG_USB_CONFIGFS_RMNET_BAM=y
++CONFIG_USB_CONFIGFS_MASS_STORAGE=y
++CONFIG_USB_CONFIGFS_F_FS=y
++CONFIG_USB_CONFIGFS_F_MTP=y
++CONFIG_USB_CONFIGFS_F_PTP=y
++CONFIG_USB_CONFIGFS_UEVENT=y
++CONFIG_USB_CONFIGFS_F_DIAG=y
++CONFIG_USB_CONFIGFS_F_CDEV=y
++CONFIG_MMC=y
++CONFIG_MMC_PERF_PROFILING=y
++CONFIG_MMC_RING_BUFFER=y
++CONFIG_MMC_PARANOID_SD_INIT=y
++CONFIG_MMC_CLKGATE=y
++CONFIG_MMC_BLOCK_MINORS=32
++CONFIG_MMC_BLOCK_DEFERRED_RESUME=y
++CONFIG_MMC_TEST=y
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SDHCI_MSM=y
++CONFIG_MMC_SDHCI_MSM_ICE=y
++CONFIG_LEDS_CLASS_FLASH=y
++CONFIG_LEDS_QPNP=y
++CONFIG_LEDS_MSM_GPIO_FLASH=y
++CONFIG_LEDS_QPNP_VIBRATOR=y
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_DRV_QPNP=y
++CONFIG_DMADEVICES=y
++CONFIG_QCOM_SPS_DMA=y
++CONFIG_UIO=y
++CONFIG_UIO_MSM_SHAREDMEM=y
++CONFIG_STAGING=y
++CONFIG_ASHMEM=y
++CONFIG_ANDROID_LOW_MEMORY_KILLER=y
++CONFIG_ION=y
++CONFIG_ION_MSM=y
++CONFIG_IPA=y
++CONFIG_RMNET_IPA=y
++CONFIG_RNDIS_IPA=y
++CONFIG_SPS=y
++CONFIG_SPS_SUPPORT_NDP_BAM=y
++CONFIG_QPNP_REVID=y
++CONFIG_USB_BAM=y
++CONFIG_MSM_RMNET_BAM=y
++CONFIG_MSM_MDSS_PLL=y
++CONFIG_REMOTE_SPINLOCK_MSM=y
++CONFIG_MAILBOX=y
++CONFIG_ARM_SMMU=y
++CONFIG_QCOM_LAZY_MAPPING=y
++CONFIG_MSM_SPM=y
++CONFIG_MSM_L2_SPM=y
++CONFIG_MSM_BOOT_STATS=y
++CONFIG_MSM_CORE_HANG_DETECT=y
++CONFIG_MSM_GLADIATOR_HANG_DETECT=y
++CONFIG_QCOM_WATCHDOG_V2=y
++CONFIG_QCOM_MEMORY_DUMP_V2=y
++CONFIG_QCOM_BUS_SCALING=y
++CONFIG_QCOM_SECURE_BUFFER=y
++CONFIG_QCOM_EARLY_RANDOM=y
++CONFIG_MSM_SMEM=y
++CONFIG_MSM_SMD=y
++CONFIG_MSM_SMD_DEBUG=y
++CONFIG_MSM_GLINK=y
++CONFIG_MSM_TZ_SMMU=y
++CONFIG_MSM_GLINK_LOOPBACK_SERVER=y
++CONFIG_MSM_GLINK_SMEM_NATIVE_XPRT=y
++CONFIG_MSM_GLINK_SPI_XPRT=y
++CONFIG_TRACER_PKT=y
++CONFIG_MSM_SMP2P=y
++CONFIG_MSM_IPC_ROUTER_SMD_XPRT=y
++CONFIG_MSM_IPC_ROUTER_GLINK_XPRT=y
++CONFIG_MSM_QMI_INTERFACE=y
++CONFIG_MSM_GLINK_PKT=y
++CONFIG_MSM_SUBSYSTEM_RESTART=y
++CONFIG_MSM_PIL=y
++CONFIG_MSM_PIL_SSR_GENERIC=y
++CONFIG_MSM_PIL_MSS_QDSP6V5=y
++CONFIG_MSM_EVENT_TIMER=y
++CONFIG_MSM_AVTIMER=y
++CONFIG_QTI_RPM_STATS_LOG=y
++CONFIG_QCOM_FORCE_WDOG_BITE_ON_PANIC=y
++CONFIG_MEM_SHARE_QMI_SERVICE=y
++CONFIG_MSM_BAM_DMUX=y
++CONFIG_WCNSS_CORE=y
++CONFIG_WCNSS_CORE_PRONTO=y
++CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
++CONFIG_CNSS_CRYPTO=y
++CONFIG_IIO=y
++CONFIG_INV_ICM20602_IIO=y
++CONFIG_PWM=y
++CONFIG_PWM_QPNP=y
++CONFIG_QCOM_SHOW_RESUME_IRQ=y
++CONFIG_QTI_MPM=y
++CONFIG_ANDROID=y
++CONFIG_ANDROID_BINDER_IPC=y
++CONFIG_ANDROID_BINDER_IPC_32BIT=y
++CONFIG_STM=y
++CONFIG_SENSORS_SSC=y
++CONFIG_MSM_TZ_LOG=y
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_SECURITY=y
++CONFIG_EXT4_ENCRYPTION=y
++CONFIG_EXT4_FS_ENCRYPTION=y
++CONFIG_EXT4_FS_ICE_ENCRYPTION=y
++CONFIG_F2FS_FS=y
++CONFIG_F2FS_FS_SECURITY=y
++CONFIG_F2FS_FS_ENCRYPTION=y
++CONFIG_FANOTIFY=y
++CONFIG_QUOTA=y
++CONFIG_QUOTA_NETLINK_INTERFACE=y
++# CONFIG_PRINT_QUOTA_WARNING is not set
++CONFIG_FUSE_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_TMPFS=y
++CONFIG_ECRYPT_FS=y
++CONFIG_ECRYPT_FS_MESSAGING=y
++CONFIG_SDCARD_FS=y
++CONFIG_NLS_CODEPAGE_437=y
++CONFIG_NLS_ASCII=y
++CONFIG_NLS_ISO8859_1=y
++CONFIG_PRINTK_TIME=y
++CONFIG_DYNAMIC_DEBUG=y
++CONFIG_DEBUG_INFO=y
++CONFIG_FRAME_WARN=2048
++CONFIG_PAGE_OWNER=y
++CONFIG_PAGE_OWNER_ENABLE_DEFAULT=y
++CONFIG_MAGIC_SYSRQ=y
++CONFIG_DEBUG_PAGEALLOC=y
++CONFIG_SLUB_DEBUG_PANIC_ON=y
++CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT=y
++CONFIG_DEBUG_OBJECTS=y
++CONFIG_DEBUG_OBJECTS_FREE=y
++CONFIG_DEBUG_OBJECTS_TIMERS=y
++CONFIG_DEBUG_OBJECTS_WORK=y
++CONFIG_DEBUG_OBJECTS_RCU_HEAD=y
++CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER=y
++CONFIG_DEBUG_KMEMLEAK=y
++CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=4000
++CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF=y
++CONFIG_DEBUG_STACK_USAGE=y
++CONFIG_DEBUG_MEMORY_INIT=y
++CONFIG_LOCKUP_DETECTOR=y
++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
++# CONFIG_DETECT_HUNG_TASK is not set
++CONFIG_WQ_WATCHDOG=y
++CONFIG_PANIC_TIMEOUT=5
++CONFIG_PANIC_ON_SCHED_BUG=y
++CONFIG_PANIC_ON_RT_THROTTLING=y
++CONFIG_SCHEDSTATS=y
++CONFIG_SCHED_STACK_END_CHECK=y
++CONFIG_DEBUG_SPINLOCK=y
++CONFIG_DEBUG_MUTEXES=y
++CONFIG_DEBUG_ATOMIC_SLEEP=y
++CONFIG_DEBUG_LIST=y
++CONFIG_FAULT_INJECTION=y
++CONFIG_FAIL_PAGE_ALLOC=y
++CONFIG_FAULT_INJECTION_DEBUG_FS=y
++CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
++CONFIG_IPC_LOGGING=y
++CONFIG_QCOM_RTB=y
++CONFIG_QCOM_RTB_SEPARATE_CPUS=y
++CONFIG_FUNCTION_TRACER=y
++CONFIG_IRQSOFF_TRACER=y
++CONFIG_PREEMPT_TRACER=y
++CONFIG_BLK_DEV_IO_TRACE=y
++CONFIG_CPU_FREQ_SWITCH_PROFILER=y
++CONFIG_LKDTM=y
++CONFIG_MEMTEST=y
++CONFIG_PANIC_ON_DATA_CORRUPTION=y
++CONFIG_DEBUG_USER=y
++CONFIG_PID_IN_CONTEXTIDR=y
++CONFIG_DEBUG_SET_MODULE_RONX=y
++CONFIG_CORESIGHT=y
++CONFIG_PFK=y
++CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
++CONFIG_SECURITY=y
++CONFIG_LSM_MMAP_MIN_ADDR=4096
++CONFIG_HARDENED_USERCOPY=y
++CONFIG_SECURITY_SELINUX=y
++CONFIG_SECURITY_SMACK=y
++CONFIG_SECURITY_APPARMOR=y
++CONFIG_CRYPTO_XCBC=y
++CONFIG_CRYPTO_MD4=y
++CONFIG_CRYPTO_TWOFISH=y
++CONFIG_CRYPTO_ANSI_CPRNG=y
++CONFIG_CRYPTO_DEV_QCE=y
++CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y
++CONFIG_CRYPTO_DEV_QCRYPTO=y
++CONFIG_CRYPTO_DEV_QCEDEV=y
++CONFIG_CRYPTO_DEV_OTA_CRYPTO=y
++CONFIG_CRYPTO_DEV_QCOM_ICE=y
++CONFIG_SYSTEM_TRUSTED_KEYS="verity.x509.pem"
++CONFIG_ARM_CRYPTO=y
++CONFIG_CRYPTO_SHA1_ARM_NEON=y
++CONFIG_CRYPTO_SHA2_ARM_CE=y
++CONFIG_CRYPTO_AES_ARM_BS=y
++CONFIG_CRYPTO_AES_ARM_CE=y
++CONFIG_QMI_ENCDEC=y
+diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h
+index a89b4076cde4..72821b4721ad 100644
+--- a/arch/arm/include/asm/percpu.h
++++ b/arch/arm/include/asm/percpu.h
+@@ -16,6 +16,8 @@
+ #ifndef _ASM_ARM_PERCPU_H_
+ #define _ASM_ARM_PERCPU_H_
+
++#include
++
+ /*
+ * Same as asm-generic/percpu.h, except that we store the per cpu offset
+ * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7
+diff --git a/arch/arm/include/asm/unified.h b/arch/arm/include/asm/unified.h
+index a91ae499614c..2c3b952be63e 100644
+--- a/arch/arm/include/asm/unified.h
++++ b/arch/arm/include/asm/unified.h
+@@ -20,8 +20,10 @@
+ #ifndef __ASM_UNIFIED_H
+ #define __ASM_UNIFIED_H
+
+-#if defined(__ASSEMBLY__) && defined(CONFIG_ARM_ASM_UNIFIED)
++#if defined(__ASSEMBLY__)
+ .syntax unified
++#else
++__asm__(".syntax unified");
+ #endif
+
+ #ifdef CONFIG_CPU_V7M
+@@ -64,77 +66,4 @@
+
+ #endif /* CONFIG_THUMB2_KERNEL */
+
+-#ifndef CONFIG_ARM_ASM_UNIFIED
+-
+-/*
+- * If the unified assembly syntax isn't used (in ARM mode), these
+- * macros expand to an empty string
+- */
+-#ifdef __ASSEMBLY__
+- .macro it, cond
+- .endm
+- .macro itt, cond
+- .endm
+- .macro ite, cond
+- .endm
+- .macro ittt, cond
+- .endm
+- .macro itte, cond
+- .endm
+- .macro itet, cond
+- .endm
+- .macro itee, cond
+- .endm
+- .macro itttt, cond
+- .endm
+- .macro ittte, cond
+- .endm
+- .macro ittet, cond
+- .endm
+- .macro ittee, cond
+- .endm
+- .macro itett, cond
+- .endm
+- .macro itete, cond
+- .endm
+- .macro iteet, cond
+- .endm
+- .macro iteee, cond
+- .endm
+-#else /* !__ASSEMBLY__ */
+-__asm__(
+-" .macro it, cond\n"
+-" .endm\n"
+-" .macro itt, cond\n"
+-" .endm\n"
+-" .macro ite, cond\n"
+-" .endm\n"
+-" .macro ittt, cond\n"
+-" .endm\n"
+-" .macro itte, cond\n"
+-" .endm\n"
+-" .macro itet, cond\n"
+-" .endm\n"
+-" .macro itee, cond\n"
+-" .endm\n"
+-" .macro itttt, cond\n"
+-" .endm\n"
+-" .macro ittte, cond\n"
+-" .endm\n"
+-" .macro ittet, cond\n"
+-" .endm\n"
+-" .macro ittee, cond\n"
+-" .endm\n"
+-" .macro itett, cond\n"
+-" .endm\n"
+-" .macro itete, cond\n"
+-" .endm\n"
+-" .macro iteet, cond\n"
+-" .endm\n"
+-" .macro iteee, cond\n"
+-" .endm\n");
+-#endif /* __ASSEMBLY__ */
+-
+-#endif /* CONFIG_ARM_ASM_UNIFIED */
+-
+ #endif /* !__ASM_UNIFIED_H */
+diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
+index 04286fd9e09c..2e336acd68b0 100644
+--- a/arch/arm/kernel/head.S
++++ b/arch/arm/kernel/head.S
+@@ -673,12 +673,8 @@ ARM_BE8(rev16 ip, ip)
+ ldrcc r7, [r4], #4 @ use branch for delay slot
+ bcc 1b
+ bx lr
+-#else
+-#ifdef CONFIG_CPU_ENDIAN_BE8
+- moveq r0, #0x00004000 @ set bit 22, mov to mvn instruction
+ #else
+ moveq r0, #0x400000 @ set bit 22, mov to mvn instruction
+-#endif
+ b 2f
+ 1: ldr ip, [r7, r3]
+ #ifdef CONFIG_CPU_ENDIAN_BE8
+@@ -687,7 +683,7 @@ ARM_BE8(rev16 ip, ip)
+ tst ip, #0x000f0000 @ check the rotation field
+ orrne ip, ip, r6, lsl #24 @ mask in offset bits 31-24
+ biceq ip, ip, #0x00004000 @ clear bit 22
+- orreq ip, ip, r0 @ mask in offset bits 7-0
++ orreq ip, ip, r0, ror #8 @ mask in offset bits 7-0
+ #else
+ bic ip, ip, #0x000000ff
+ tst ip, #0xf00 @ check the rotation field
+diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
+index 25538a935874..59e04e2d9d9d 100644
+--- a/arch/arm/kernel/hw_breakpoint.c
++++ b/arch/arm/kernel/hw_breakpoint.c
+@@ -688,26 +688,68 @@ static void disable_single_step(struct perf_event *bp)
+ arch_install_hw_breakpoint(bp);
+ }
+
++/*
++ * Arm32 hardware does not always report a watchpoint hit address that matches
++ * one of the watchpoints set. It can also report an address "near" the
++ * watchpoint if a single instruction access both watched and unwatched
++ * addresses. There is no straight-forward way, short of disassembling the
++ * offending instruction, to map that address back to the watchpoint. This
++ * function computes the distance of the memory access from the watchpoint as a
++ * heuristic for the likelyhood that a given access triggered the watchpoint.
++ *
++ * See this same function in the arm64 platform code, which has the same
++ * problem.
++ *
++ * The function returns the distance of the address from the bytes watched by
++ * the watchpoint. In case of an exact match, it returns 0.
++ */
++static u32 get_distance_from_watchpoint(unsigned long addr, u32 val,
++ struct arch_hw_breakpoint_ctrl *ctrl)
++{
++ u32 wp_low, wp_high;
++ u32 lens, lene;
++
++ lens = __ffs(ctrl->len);
++ lene = __fls(ctrl->len);
++
++ wp_low = val + lens;
++ wp_high = val + lene;
++ if (addr < wp_low)
++ return wp_low - addr;
++ else if (addr > wp_high)
++ return addr - wp_high;
++ else
++ return 0;
++}
++
++static int watchpoint_fault_on_uaccess(struct pt_regs *regs,
++ struct arch_hw_breakpoint *info)
++{
++ return !user_mode(regs) && info->ctrl.privilege == ARM_BREAKPOINT_USER;
++}
++
+ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
+ struct pt_regs *regs)
+ {
+- int i, access;
+- u32 val, ctrl_reg, alignment_mask;
++ int i, access, closest_match = 0;
++ u32 min_dist = -1, dist;
++ u32 val, ctrl_reg;
+ struct perf_event *wp, **slots;
+ struct arch_hw_breakpoint *info;
+ struct arch_hw_breakpoint_ctrl ctrl;
+
+ slots = this_cpu_ptr(wp_on_reg);
+
++ /*
++ * Find all watchpoints that match the reported address. If no exact
++ * match is found. Attribute the hit to the closest watchpoint.
++ */
++ rcu_read_lock();
+ for (i = 0; i < core_num_wrps; ++i) {
+- rcu_read_lock();
+-
+ wp = slots[i];
+-
+ if (wp == NULL)
+- goto unlock;
++ continue;
+
+- info = counter_arch_bp(wp);
+ /*
+ * The DFAR is an unknown value on debug architectures prior
+ * to 7.1. Since we only allow a single watchpoint on these
+@@ -716,50 +758,69 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
+ */
+ if (debug_arch < ARM_DEBUG_ARCH_V7_1) {
+ BUG_ON(i > 0);
++ info = counter_arch_bp(wp);
+ info->trigger = wp->attr.bp_addr;
+ } else {
+- if (info->ctrl.len == ARM_BREAKPOINT_LEN_8)
+- alignment_mask = 0x7;
+- else
+- alignment_mask = 0x3;
+-
+- /* Check if the watchpoint value matches. */
+- val = read_wb_reg(ARM_BASE_WVR + i);
+- if (val != (addr & ~alignment_mask))
+- goto unlock;
+-
+- /* Possible match, check the byte address select. */
+- ctrl_reg = read_wb_reg(ARM_BASE_WCR + i);
+- decode_ctrl_reg(ctrl_reg, &ctrl);
+- if (!((1 << (addr & alignment_mask)) & ctrl.len))
+- goto unlock;
+-
+ /* Check that the access type matches. */
+ if (debug_exception_updates_fsr()) {
+ access = (fsr & ARM_FSR_ACCESS_MASK) ?
+ HW_BREAKPOINT_W : HW_BREAKPOINT_R;
+ if (!(access & hw_breakpoint_type(wp)))
+- goto unlock;
++ continue;
+ }
+
++ val = read_wb_reg(ARM_BASE_WVR + i);
++ ctrl_reg = read_wb_reg(ARM_BASE_WCR + i);
++ decode_ctrl_reg(ctrl_reg, &ctrl);
++ dist = get_distance_from_watchpoint(addr, val, &ctrl);
++ if (dist < min_dist) {
++ min_dist = dist;
++ closest_match = i;
++ }
++ /* Is this an exact match? */
++ if (dist != 0)
++ continue;
++
+ /* We have a winner. */
++ info = counter_arch_bp(wp);
+ info->trigger = addr;
+ }
+
+ pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
++
++ /*
++ * If we triggered a user watchpoint from a uaccess routine,
++ * then handle the stepping ourselves since userspace really
++ * can't help us with this.
++ */
++ if (watchpoint_fault_on_uaccess(regs, info))
++ goto step;
++
+ perf_bp_event(wp, regs);
+
+ /*
+- * If no overflow handler is present, insert a temporary
+- * mismatch breakpoint so we can single-step over the
+- * watchpoint trigger.
++ * Defer stepping to the overflow handler if one is installed.
++ * Otherwise, insert a temporary mismatch breakpoint so that
++ * we can single-step over the watchpoint trigger.
+ */
++ if (!is_default_overflow_handler(wp))
++ continue;
++step:
++ enable_single_step(wp, instruction_pointer(regs));
++ }
++
++ if (min_dist > 0 && min_dist != -1) {
++ /* No exact match found. */
++ wp = slots[closest_match];
++ info = counter_arch_bp(wp);
++ info->trigger = addr;
++ pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
++ perf_bp_event(wp, regs);
+ if (is_default_overflow_handler(wp))
+ enable_single_step(wp, instruction_pointer(regs));
+-
+-unlock:
+- rcu_read_unlock();
+ }
++
++ rcu_read_unlock();
+ }
+
+ static void watchpoint_single_step_handler(unsigned long pc)
+@@ -830,7 +891,7 @@ static void breakpoint_handler(unsigned long unknown, struct pt_regs *regs)
+ info->trigger = addr;
+ pr_debug("breakpoint fired: address = 0x%x\n", addr);
+ perf_bp_event(bp, regs);
+- if (!bp->overflow_handler)
++ if (is_default_overflow_handler(bp))
+ enable_single_step(bp, addr);
+ goto unlock;
+ }
+diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
+index ae738a6319f6..364985c96a92 100644
+--- a/arch/arm/kernel/ptrace.c
++++ b/arch/arm/kernel/ptrace.c
+@@ -227,8 +227,8 @@ static struct undef_hook arm_break_hook = {
+ };
+
+ static struct undef_hook thumb_break_hook = {
+- .instr_mask = 0xffff,
+- .instr_val = 0xde01,
++ .instr_mask = 0xffffffff,
++ .instr_val = 0x0000de01,
+ .cpsr_mask = PSR_T_BIT,
+ .cpsr_val = PSR_T_BIT,
+ .fn = break_trap,
+diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
+index 775d70c81587..108b5d17e89e 100755
+--- a/arch/arm/kernel/setup.c
++++ b/arch/arm/kernel/setup.c
+@@ -590,9 +590,11 @@ void notrace cpu_init(void)
+ * In Thumb-2, msr with an immediate value is not allowed.
+ */
+ #ifdef CONFIG_THUMB2_KERNEL
+-#define PLC "r"
++#define PLC_l "l"
++#define PLC_r "r"
+ #else
+-#define PLC "I"
++#define PLC_l "I"
++#define PLC_r "I"
+ #endif
+
+ /*
+@@ -614,15 +616,15 @@ void notrace cpu_init(void)
+ "msr cpsr_c, %9"
+ :
+ : "r" (stk),
+- PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
++ PLC_r (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
+ "I" (offsetof(struct stack, irq[0])),
+- PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
++ PLC_r (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
+ "I" (offsetof(struct stack, abt[0])),
+- PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
++ PLC_r (PSR_F_BIT | PSR_I_BIT | UND_MODE),
+ "I" (offsetof(struct stack, und[0])),
+- PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
++ PLC_r (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
+ "I" (offsetof(struct stack, fiq[0])),
+- PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
++ PLC_l (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
+ : "r14");
+ #endif
+ }
+diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
+index 7abc908ebea0..f82a1ac22164 100644
+--- a/arch/arm/kernel/signal.c
++++ b/arch/arm/kernel/signal.c
+@@ -626,18 +626,20 @@ struct page *get_signal_page(void)
+
+ addr = page_address(page);
+
++ /* Poison the entire page */
++ memset32(addr, __opcode_to_mem_arm(0xe7fddef1),
++ PAGE_SIZE / sizeof(u32));
++
+ /* Give the signal return code some randomness */
+ offset = 0x200 + (get_random_int() & 0x7fc);
+ signal_return_offset = offset;
+
+- /*
+- * Copy signal return handlers into the vector page, and
+- * set sigreturn to be a pointer to these.
+- */
++ /* Copy signal return handlers into the page */
+ memcpy(addr + offset, sigreturn_codes, sizeof(sigreturn_codes));
+
+- ptr = (unsigned long)addr + offset;
+- flush_icache_range(ptr, ptr + sizeof(sigreturn_codes));
++ /* Flush out all instructions in this page */
++ ptr = (unsigned long)addr;
++ flush_icache_range(ptr, ptr + PAGE_SIZE);
+
+ return page;
+ }
+diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c
+index fe76010f75cf..7e939c7b0a21 100644
+--- a/arch/arm/kernel/stacktrace.c
++++ b/arch/arm/kernel/stacktrace.c
+@@ -19,6 +19,19 @@
+ * A simple function epilogue looks like this:
+ * ldm sp, {fp, sp, pc}
+ *
++ * When compiled with clang, pc and sp are not pushed. A simple function
++ * prologue looks like this when built with clang:
++ *
++ * stmdb {..., fp, lr}
++ * add fp, sp, #x
++ * sub sp, sp, #y
++ *
++ * A simple function epilogue looks like this when built with clang:
++ *
++ * sub sp, fp, #x
++ * ldm {..., fp, pc}
++ *
++ *
+ * Note that with framepointer enabled, even the leaf functions have the same
+ * prologue and epilogue, therefore we can ignore the LR value in this case.
+ */
+@@ -31,6 +44,16 @@ int notrace unwind_frame(struct stackframe *frame)
+ low = frame->sp;
+ high = ALIGN(low, THREAD_SIZE);
+
++#ifdef CONFIG_CC_IS_CLANG
++ /* check current frame pointer is within bounds */
++ if (fp < low + 4 || fp > high - 4)
++ return -EINVAL;
++
++ frame->sp = frame->fp;
++ frame->fp = *(unsigned long *)(fp);
++ frame->pc = frame->lr;
++ frame->lr = *(unsigned long *)(fp + 4);
++#else
+ /* check current frame pointer is within bounds */
+ if (fp < low + 12 || fp > high - 4)
+ return -EINVAL;
+@@ -39,6 +62,7 @@ int notrace unwind_frame(struct stackframe *frame)
+ frame->fp = *(unsigned long *)(fp - 12);
+ frame->sp = *(unsigned long *)(fp - 8);
+ frame->pc = *(unsigned long *)(fp - 4);
++#endif
+
+ return 0;
+ }
+diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
+index bb0d5e21d60b..16615ae6e257 100644
+--- a/arch/arm/kvm/mmu.c
++++ b/arch/arm/kvm/mmu.c
+@@ -298,12 +298,6 @@ static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
+ next = stage2_pgd_addr_end(addr, end);
+ if (!stage2_pgd_none(*pgd))
+ unmap_stage2_puds(kvm, pgd, addr, next);
+- /*
+- * If the range is too large, release the kvm->mmu_lock
+- * to prevent starvation and lockup detector warnings.
+- */
+- if (next != end)
+- cond_resched_lock(&kvm->mmu_lock);
+ } while (pgd++, addr = next, addr != end);
+ }
+
+@@ -1840,7 +1834,7 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm,
+ * Prevent userspace from creating a memory region outside of the IPA
+ * space addressable by the KVM guest IPA space.
+ */
+- if (memslot->base_gfn + memslot->npages >=
++ if (memslot->base_gfn + memslot->npages >
+ (KVM_PHYS_SIZE >> PAGE_SHIFT))
+ return -EFAULT;
+
+diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
+index 8ba0e2e5ad97..0efac1404418 100644
+--- a/arch/arm/mach-at91/pm.c
++++ b/arch/arm/mach-at91/pm.c
+@@ -411,13 +411,13 @@ static void __init at91_pm_sram_init(void)
+ sram_pool = gen_pool_get(&pdev->dev, NULL);
+ if (!sram_pool) {
+ pr_warn("%s: sram pool unavailable!\n", __func__);
+- return;
++ goto out_put_device;
+ }
+
+ sram_base = gen_pool_alloc(sram_pool, at91_pm_suspend_in_sram_sz);
+ if (!sram_base) {
+ pr_warn("%s: unable to alloc sram!\n", __func__);
+- return;
++ goto out_put_device;
+ }
+
+ sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
+@@ -425,12 +425,17 @@ static void __init at91_pm_sram_init(void)
+ at91_pm_suspend_in_sram_sz, false);
+ if (!at91_suspend_sram_fn) {
+ pr_warn("SRAM: Could not map\n");
+- return;
++ goto out_put_device;
+ }
+
+ /* Copy the pm suspend handler to SRAM */
+ at91_suspend_sram_fn = fncpy(at91_suspend_sram_fn,
+ &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz);
++ return;
++
++out_put_device:
++ put_device(&pdev->dev);
++ return;
+ }
+
+ static const struct of_device_id atmel_pmc_ids[] __initconst = {
+diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
+index 96a3d73ef4bf..fd6c9169fa78 100644
+--- a/arch/arm/mach-footbridge/dc21285.c
++++ b/arch/arm/mach-footbridge/dc21285.c
+@@ -69,15 +69,15 @@ dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where,
+ if (addr)
+ switch (size) {
+ case 1:
+- asm("ldrb %0, [%1, %2]"
++ asm volatile("ldrb %0, [%1, %2]"
+ : "=r" (v) : "r" (addr), "r" (where) : "cc");
+ break;
+ case 2:
+- asm("ldrh %0, [%1, %2]"
++ asm volatile("ldrh %0, [%1, %2]"
+ : "=r" (v) : "r" (addr), "r" (where) : "cc");
+ break;
+ case 4:
+- asm("ldr %0, [%1, %2]"
++ asm volatile("ldr %0, [%1, %2]"
+ : "=r" (v) : "r" (addr), "r" (where) : "cc");
+ break;
+ }
+@@ -103,17 +103,17 @@ dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
+ if (addr)
+ switch (size) {
+ case 1:
+- asm("strb %0, [%1, %2]"
++ asm volatile("strb %0, [%1, %2]"
+ : : "r" (value), "r" (addr), "r" (where)
+ : "cc");
+ break;
+ case 2:
+- asm("strh %0, [%1, %2]"
++ asm volatile("strh %0, [%1, %2]"
+ : : "r" (value), "r" (addr), "r" (where)
+ : "cc");
+ break;
+ case 4:
+- asm("str %0, [%1, %2]"
++ asm volatile("str %0, [%1, %2]"
+ : : "r" (value), "r" (addr), "r" (where)
+ : "cc");
+ break;
+diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
+index 868781fd460c..14c630c899c5 100644
+--- a/arch/arm/mach-imx/pm-imx5.c
++++ b/arch/arm/mach-imx/pm-imx5.c
+@@ -301,14 +301,14 @@ static int __init imx_suspend_alloc_ocram(
+ if (!ocram_pool) {
+ pr_warn("%s: ocram pool unavailable!\n", __func__);
+ ret = -ENODEV;
+- goto put_node;
++ goto put_device;
+ }
+
+ ocram_base = gen_pool_alloc(ocram_pool, size);
+ if (!ocram_base) {
+ pr_warn("%s: unable to alloc ocram!\n", __func__);
+ ret = -ENOMEM;
+- goto put_node;
++ goto put_device;
+ }
+
+ phys = gen_pool_virt_to_phys(ocram_pool, ocram_base);
+@@ -318,6 +318,8 @@ static int __init imx_suspend_alloc_ocram(
+ if (virt_out)
+ *virt_out = virt;
+
++put_device:
++ put_device(&pdev->dev);
+ put_node:
+ of_node_put(node);
+
+diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
+index dd9eb3f14f45..6da26692f2fd 100644
+--- a/arch/arm/mach-imx/pm-imx6.c
++++ b/arch/arm/mach-imx/pm-imx6.c
+@@ -481,14 +481,14 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
+ if (!ocram_pool) {
+ pr_warn("%s: ocram pool unavailable!\n", __func__);
+ ret = -ENODEV;
+- goto put_node;
++ goto put_device;
+ }
+
+ ocram_base = gen_pool_alloc(ocram_pool, MX6Q_SUSPEND_OCRAM_SIZE);
+ if (!ocram_base) {
+ pr_warn("%s: unable to alloc ocram!\n", __func__);
+ ret = -ENOMEM;
+- goto put_node;
++ goto put_device;
+ }
+
+ ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
+@@ -511,7 +511,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
+ ret = imx6_pm_get_base(&pm_info->mmdc_base, socdata->mmdc_compat);
+ if (ret) {
+ pr_warn("%s: failed to get mmdc base %d!\n", __func__, ret);
+- goto put_node;
++ goto put_device;
+ }
+
+ ret = imx6_pm_get_base(&pm_info->src_base, socdata->src_compat);
+@@ -558,7 +558,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
+ &imx6_suspend,
+ MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info));
+
+- goto put_node;
++ goto put_device;
+
+ pl310_cache_map_failed:
+ iounmap(pm_info->gpc_base.vbase);
+@@ -568,6 +568,8 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata)
+ iounmap(pm_info->src_base.vbase);
+ src_map_failed:
+ iounmap(pm_info->mmdc_base.vbase);
++put_device:
++ put_device(&pdev->dev);
+ put_node:
+ of_node_put(node);
+
+diff --git a/arch/arm/mach-imx/suspend-imx53.S b/arch/arm/mach-imx/suspend-imx53.S
+index 5ed078ad110a..f12d24104075 100644
+--- a/arch/arm/mach-imx/suspend-imx53.S
++++ b/arch/arm/mach-imx/suspend-imx53.S
+@@ -33,11 +33,11 @@
+ * ^
+ * ^
+ * imx53_suspend code
+- * PM_INFO structure(imx53_suspend_info)
++ * PM_INFO structure(imx5_cpu_suspend_info)
+ * ======================== low address =======================
+ */
+
+-/* Offsets of members of struct imx53_suspend_info */
++/* Offsets of members of struct imx5_cpu_suspend_info */
+ #define SUSPEND_INFO_MX53_M4IF_V_OFFSET 0x0
+ #define SUSPEND_INFO_MX53_IOMUXC_V_OFFSET 0x4
+ #define SUSPEND_INFO_MX53_IO_COUNT_OFFSET 0x8
+diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
+index 7d84b617af48..99d2e296082c 100644
+--- a/arch/arm/mach-imx/suspend-imx6.S
++++ b/arch/arm/mach-imx/suspend-imx6.S
+@@ -73,6 +73,7 @@
+ #define MX6Q_CCM_CCR 0x0
+
+ .align 3
++ .arm
+
+ .macro sync_l2_cache
+
+diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
+index cefe44f6889b..ba124f8704fa 100644
+--- a/arch/arm/mach-integrator/Kconfig
++++ b/arch/arm/mach-integrator/Kconfig
+@@ -3,6 +3,8 @@ menuconfig ARCH_INTEGRATOR
+ depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6
+ select ARM_AMBA
+ select COMMON_CLK_VERSATILE
++ select CMA
++ select DMA_CMA
+ select HAVE_TCM
+ select ICST
+ select MFD_SYSCON
+@@ -34,14 +36,13 @@ config INTEGRATOR_IMPD1
+ select ARM_VIC
+ select GPIO_PL061
+ select GPIOLIB
++ select REGULATOR
++ select REGULATOR_FIXED_VOLTAGE
+ help
+ The IM-PD1 is an add-on logic module for the Integrator which
+ allows ARM(R) Ltd PrimeCells to be developed and evaluated.
+ The IM-PD1 can be found on the Integrator/PP2 platform.
+
+- To compile this driver as a module, choose M here: the
+- module will be called impd1.
+-
+ config INTEGRATOR_CM7TDMI
+ bool "Integrator/CM7TDMI core module"
+ depends on ARCH_INTEGRATOR_AP
+diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
+index 84613abf35a3..79ff5b953431 100644
+--- a/arch/arm/mach-keystone/keystone.c
++++ b/arch/arm/mach-keystone/keystone.c
+@@ -65,7 +65,7 @@ static void __init keystone_init(void)
+ static long long __init keystone_pv_fixup(void)
+ {
+ long long offset;
+- phys_addr_t mem_start, mem_end;
++ u64 mem_start, mem_end;
+
+ mem_start = memblock_start_of_DRAM();
+ mem_end = memblock_end_of_DRAM();
+@@ -78,7 +78,7 @@ static long long __init keystone_pv_fixup(void)
+ if (mem_start < KEYSTONE_HIGH_PHYS_START ||
+ mem_end > KEYSTONE_HIGH_PHYS_END) {
+ pr_crit("Invalid address space for memory (%08llx-%08llx)\n",
+- (u64)mem_start, (u64)mem_end);
++ mem_start, mem_end);
+ return 0;
+ }
+
+diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
+index 6b6fda65fb3b..5eeecf83c9e6 100644
+--- a/arch/arm/mach-omap2/board-n8x0.c
++++ b/arch/arm/mach-omap2/board-n8x0.c
+@@ -327,6 +327,7 @@ static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
+
+ static void n8x0_mmc_callback(void *data, u8 card_mask)
+ {
++#ifdef CONFIG_MMC_OMAP
+ int bit, *openp, index;
+
+ if (board_is_n800()) {
+@@ -344,7 +345,6 @@ static void n8x0_mmc_callback(void *data, u8 card_mask)
+ else
+ *openp = 0;
+
+-#ifdef CONFIG_MMC_OMAP
+ omap_mmc_notify_cover_event(mmc_device, index, *openp);
+ #else
+ pr_warn("MMC: notify cover event not available\n");
+diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
+index f989145480c8..bf236b7af8c1 100644
+--- a/arch/arm/mach-omap2/omap_device.c
++++ b/arch/arm/mach-omap2/omap_device.c
+@@ -224,10 +224,12 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
+ break;
+ case BUS_NOTIFY_BIND_DRIVER:
+ od = to_omap_device(pdev);
+- if (od && (od->_state == OMAP_DEVICE_STATE_ENABLED) &&
+- pm_runtime_status_suspended(dev)) {
++ if (od) {
+ od->_driver_status = BUS_NOTIFY_BIND_DRIVER;
+- pm_runtime_set_active(dev);
++ if (od->_state == OMAP_DEVICE_STATE_ENABLED &&
++ pm_runtime_status_suspended(dev)) {
++ pm_runtime_set_active(dev);
++ }
+ }
+ break;
+ case BUS_NOTIFY_ADD_DEVICE:
+diff --git a/arch/arm/mach-socfpga/pm.c b/arch/arm/mach-socfpga/pm.c
+index c378ab0c2431..93f2245c9775 100644
+--- a/arch/arm/mach-socfpga/pm.c
++++ b/arch/arm/mach-socfpga/pm.c
+@@ -60,14 +60,14 @@ static int socfpga_setup_ocram_self_refresh(void)
+ if (!ocram_pool) {
+ pr_warn("%s: ocram pool unavailable!\n", __func__);
+ ret = -ENODEV;
+- goto put_node;
++ goto put_device;
+ }
+
+ ocram_base = gen_pool_alloc(ocram_pool, socfpga_sdram_self_refresh_sz);
+ if (!ocram_base) {
+ pr_warn("%s: unable to alloc ocram!\n", __func__);
+ ret = -ENOMEM;
+- goto put_node;
++ goto put_device;
+ }
+
+ ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
+@@ -78,7 +78,7 @@ static int socfpga_setup_ocram_self_refresh(void)
+ if (!suspend_ocram_base) {
+ pr_warn("%s: __arm_ioremap_exec failed!\n", __func__);
+ ret = -ENOMEM;
+- goto put_node;
++ goto put_device;
+ }
+
+ /* Copy the code that puts DDR in self refresh to ocram */
+@@ -92,6 +92,8 @@ static int socfpga_setup_ocram_self_refresh(void)
+ if (!socfpga_sdram_self_refresh_in_ocram)
+ ret = -EFAULT;
+
++put_device:
++ put_device(&pdev->dev);
+ put_node:
+ of_node_put(np);
+
+diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
+index e01cbca196b5..a67fcf7a5643 100644
+--- a/arch/arm/mach-tegra/tegra.c
++++ b/arch/arm/mach-tegra/tegra.c
+@@ -137,8 +137,8 @@ static const char * const tegra_dt_board_compat[] = {
+ };
+
+ DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
+- .l2c_aux_val = 0x3c400001,
+- .l2c_aux_mask = 0xc20fc3fe,
++ .l2c_aux_val = 0x3c400000,
++ .l2c_aux_mask = 0xc20fc3ff,
+ .smp = smp_ops(tegra_smp_ops),
+ .map_io = tegra_map_common_io,
+ .init_early = tegra_init_early,
+diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
+index d1870c777c6e..3a465bfa7d4a 100644
+--- a/arch/arm/mm/cache-l2x0.c
++++ b/arch/arm/mm/cache-l2x0.c
+@@ -1252,20 +1252,28 @@ static void __init l2c310_of_parse(const struct device_node *np,
+
+ ret = of_property_read_u32(np, "prefetch-data", &val);
+ if (ret == 0) {
+- if (val)
++ if (val) {
+ prefetch |= L310_PREFETCH_CTRL_DATA_PREFETCH;
+- else
++ *aux_val |= L310_PREFETCH_CTRL_DATA_PREFETCH;
++ } else {
+ prefetch &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
++ *aux_val &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
++ }
++ *aux_mask &= ~L310_PREFETCH_CTRL_DATA_PREFETCH;
+ } else if (ret != -EINVAL) {
+ pr_err("L2C-310 OF prefetch-data property value is missing\n");
+ }
+
+ ret = of_property_read_u32(np, "prefetch-instr", &val);
+ if (ret == 0) {
+- if (val)
++ if (val) {
+ prefetch |= L310_PREFETCH_CTRL_INSTR_PREFETCH;
+- else
++ *aux_val |= L310_PREFETCH_CTRL_INSTR_PREFETCH;
++ } else {
+ prefetch &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
++ *aux_val &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
++ }
++ *aux_mask &= ~L310_PREFETCH_CTRL_INSTR_PREFETCH;
+ } else if (ret != -EINVAL) {
+ pr_err("L2C-310 OF prefetch-instr property value is missing\n");
+ }
+diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
+index cb41b18eef0e..516fefc2d7bd 100644
+--- a/arch/arm/mm/proc-macros.S
++++ b/arch/arm/mm/proc-macros.S
+@@ -4,6 +4,7 @@
+ * VMA_VM_FLAGS
+ * VM_EXEC
+ */
++#include
+ #include
+ #include
+
+@@ -34,7 +35,7 @@
+ * act_mm - get current->active_mm
+ */
+ .macro act_mm, rd
+- bic \rd, sp, #8128
++ bic \rd, sp, #(THREAD_SIZE - 1) & ~63
+ bic \rd, \rd, #63
+ ldr \rd, [\rd, #TI_TASK]
+ ldr \rd, [\rd, #TSK_ACTIVE_MM]
+diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
+index 3265b8f86069..6ec01491735e 100644
+--- a/arch/arm/plat-samsung/Kconfig
++++ b/arch/arm/plat-samsung/Kconfig
+@@ -242,6 +242,7 @@ config SAMSUNG_PM_DEBUG
+ bool "Samsung PM Suspend debug"
+ depends on PM && DEBUG_KERNEL
+ depends on DEBUG_EXYNOS_UART || DEBUG_S3C24XX_UART || DEBUG_S3C2410_UART
++ depends on DEBUG_LL && MMU
+ help
+ Say Y here if you want verbose debugging from the PM Suspend and
+ Resume code. See
+diff --git a/arch/arm/probes/kprobes/core.c b/arch/arm/probes/kprobes/core.c
+index 3eb018fa1a1f..c3362ddd6c4c 100644
+--- a/arch/arm/probes/kprobes/core.c
++++ b/arch/arm/probes/kprobes/core.c
+@@ -270,6 +270,7 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
+ switch (kcb->kprobe_status) {
+ case KPROBE_HIT_ACTIVE:
+ case KPROBE_HIT_SSDONE:
++ case KPROBE_HIT_SS:
+ /* A pre- or post-handler probe got us here. */
+ kprobes_inc_nmissed_count(p);
+ save_previous_kprobe(kcb);
+@@ -278,6 +279,11 @@ void __kprobes kprobe_handler(struct pt_regs *regs)
+ singlestep(p, regs, kcb);
+ restore_previous_kprobe(kcb);
+ break;
++ case KPROBE_REENTER:
++ /* A nested probe was hit in FIQ, it is a BUG */
++ pr_warn("Unrecoverable kprobe detected at %p.\n",
++ p->addr);
++ /* fall through */
+ default:
+ /* impossible cases */
+ BUG();
+diff --git a/arch/arm/probes/kprobes/test-thumb.c b/arch/arm/probes/kprobes/test-thumb.c
+index b683b4517458..4254391f3906 100644
+--- a/arch/arm/probes/kprobes/test-thumb.c
++++ b/arch/arm/probes/kprobes/test-thumb.c
+@@ -444,21 +444,21 @@ void kprobe_thumb32_test_cases(void)
+ "3: mvn r0, r0 \n\t"
+ "2: nop \n\t")
+
+- TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,"]",
++ TEST_RX("tbh [pc, r",7, (9f-(1f+4))>>1,", lsl #1]",
+ "9: \n\t"
+ ".short (2f-1b-4)>>1 \n\t"
+ ".short (3f-1b-4)>>1 \n\t"
+ "3: mvn r0, r0 \n\t"
+ "2: nop \n\t")
+
+- TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,"]",
++ TEST_RX("tbh [pc, r",12, ((9f-(1f+4))>>1)+1,", lsl #1]",
+ "9: \n\t"
+ ".short (2f-1b-4)>>1 \n\t"
+ ".short (3f-1b-4)>>1 \n\t"
+ "3: mvn r0, r0 \n\t"
+ "2: nop \n\t")
+
+- TEST_RRX("tbh [r",1,9f, ", r",14,1,"]",
++ TEST_RRX("tbh [r",1,9f, ", r",14,1,", lsl #1]",
+ "9: \n\t"
+ ".short (2f-1b-4)>>1 \n\t"
+ ".short (3f-1b-4)>>1 \n\t"
+@@ -471,10 +471,10 @@ void kprobe_thumb32_test_cases(void)
+
+ TEST_UNSUPPORTED("strexb r0, r1, [r2]")
+ TEST_UNSUPPORTED("strexh r0, r1, [r2]")
+- TEST_UNSUPPORTED("strexd r0, r1, [r2]")
++ TEST_UNSUPPORTED("strexd r0, r1, r2, [r2]")
+ TEST_UNSUPPORTED("ldrexb r0, [r1]")
+ TEST_UNSUPPORTED("ldrexh r0, [r1]")
+- TEST_UNSUPPORTED("ldrexd r0, [r1]")
++ TEST_UNSUPPORTED("ldrexd r0, r1, [r1]")
+
+ TEST_GROUP("Data-processing (shifted register) and (modified immediate)")
+
+diff --git a/arch/arm/probes/uprobes/core.c b/arch/arm/probes/uprobes/core.c
+index d1329f1ba4e4..b97230704b74 100644
+--- a/arch/arm/probes/uprobes/core.c
++++ b/arch/arm/probes/uprobes/core.c
+@@ -207,7 +207,7 @@ unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
+ static struct undef_hook uprobes_arm_break_hook = {
+ .instr_mask = 0x0fffffff,
+ .instr_val = (UPROBE_SWBP_ARM_INSN & 0x0fffffff),
+- .cpsr_mask = MODE_MASK,
++ .cpsr_mask = (PSR_T_BIT | MODE_MASK),
+ .cpsr_val = USR_MODE,
+ .fn = uprobe_trap_handler,
+ };
+@@ -215,7 +215,7 @@ static struct undef_hook uprobes_arm_break_hook = {
+ static struct undef_hook uprobes_arm_ss_hook = {
+ .instr_mask = 0x0fffffff,
+ .instr_val = (UPROBE_SS_ARM_INSN & 0x0fffffff),
+- .cpsr_mask = MODE_MASK,
++ .cpsr_mask = (PSR_T_BIT | MODE_MASK),
+ .cpsr_val = USR_MODE,
+ .fn = uprobe_trap_handler,
+ };
+diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c
+index 0ed01f2d5ee4..b4ec8d1b0bef 100644
+--- a/arch/arm/xen/p2m.c
++++ b/arch/arm/xen/p2m.c
+@@ -91,10 +91,39 @@ int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops,
+ int i;
+
+ for (i = 0; i < count; i++) {
++ struct gnttab_unmap_grant_ref unmap;
++ int rc;
++
+ if (map_ops[i].status)
+ continue;
+- set_phys_to_machine(map_ops[i].host_addr >> XEN_PAGE_SHIFT,
+- map_ops[i].dev_bus_addr >> XEN_PAGE_SHIFT);
++ if (likely(set_phys_to_machine(map_ops[i].host_addr >> XEN_PAGE_SHIFT,
++ map_ops[i].dev_bus_addr >> XEN_PAGE_SHIFT)))
++ continue;
++
++ /*
++ * Signal an error for this slot. This in turn requires
++ * immediate unmapping.
++ */
++ map_ops[i].status = GNTST_general_error;
++ unmap.host_addr = map_ops[i].host_addr,
++ unmap.handle = map_ops[i].handle;
++ map_ops[i].handle = ~0;
++ if (map_ops[i].flags & GNTMAP_device_map)
++ unmap.dev_bus_addr = map_ops[i].dev_bus_addr;
++ else
++ unmap.dev_bus_addr = 0;
++
++ /*
++ * Pre-populate the status field, to be recognizable in
++ * the log message below.
++ */
++ unmap.status = 1;
++
++ rc = HYPERVISOR_grant_table_op(GNTTABOP_unmap_grant_ref,
++ &unmap, 1);
++ if (rc || unmap.status != GNTST_okay)
++ pr_err_once("gnttab unmap failed: rc=%d st=%d\n",
++ rc, unmap.status);
+ }
+
+ return 0;
+diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
+index 0b3990b7db6f..8a9030c4e633 100644
+--- a/arch/arm64/Kconfig.platforms
++++ b/arch/arm64/Kconfig.platforms
+@@ -41,6 +41,7 @@ config ARCH_BCM_IPROC
+ config ARCH_BERLIN
+ bool "Marvell Berlin SoC Family"
+ select DW_APB_ICTL
++ select DW_APB_TIMER_OF
+ select GPIOLIB
+ select PINCTRL
+ help
+diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
+index 7d3a2acc6a55..2aa01eaa0cd1 100644
+--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
++++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
+@@ -414,13 +414,13 @@
+ clocks {
+ compatible = "arm,scpi-clocks";
+
+- scpi_dvfs: scpi-dvfs {
++ scpi_dvfs: clocks-0 {
+ compatible = "arm,scpi-dvfs-clocks";
+ #clock-cells = <1>;
+ clock-indices = <0>, <1>, <2>;
+ clock-output-names = "atlclk", "aplclk","gpuclk";
+ };
+- scpi_clk: scpi-clk {
++ scpi_clk: clocks-1 {
+ compatible = "arm,scpi-variable-clocks";
+ #clock-cells = <1>;
+ clock-indices = <3>;
+@@ -428,7 +428,7 @@
+ };
+ };
+
+- scpi_devpd: scpi-power-domains {
++ scpi_devpd: power-controller {
+ compatible = "arm,scpi-power-domains";
+ num-domains = <2>;
+ #power-domain-cells = <1>;
+diff --git a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+index c528dd52ba2d..e43e804c42c3 100644
+--- a/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
++++ b/arch/arm64/boot/dts/exynos/exynos7-espresso.dts
+@@ -64,7 +64,7 @@
+ s2mps15_pmic@66 {
+ compatible = "samsung,s2mps15-pmic";
+ reg = <0x66>;
+- interrupts = <2 IRQ_TYPE_NONE>;
++ interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpa0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_irq>;
+@@ -131,6 +131,7 @@
+ regulator-min-microvolt = <700000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-enable-ramp-delay = <125>;
++ regulator-always-on;
+ };
+
+ ldo8_reg: LDO8 {
+diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
+index 6328a66ed97e..4c7c40ce5066 100644
+--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
++++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
+@@ -65,8 +65,10 @@
+ };
+
+ psci {
+- compatible = "arm,psci-0.2";
++ compatible = "arm,psci";
+ method = "smc";
++ cpu_off = <0x84000002>;
++ cpu_on = <0xC4000003>;
+ };
+
+ soc: soc {
+diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+index 97d331ec2500..cd8db85f7c11 100644
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+@@ -177,6 +177,7 @@
+ ranges = <0x0 0x00 0x1700000 0x100000>;
+ reg = <0x00 0x1700000 0x0 0x100000>;
+ interrupts = <0 75 0x4>;
++ dma-coherent;
+
+ sec_jr0: jr@10000 {
+ compatible = "fsl,sec-v5.4-job-ring",
+diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+index b307d6b6357e..ad34be46c361 100644
+--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+@@ -914,7 +914,7 @@
+ <&mmsys CLK_MM_DSI1_DIGITAL>,
+ <&mipi_tx1>;
+ clock-names = "engine", "digital", "hs";
+- phy = <&mipi_tx1>;
++ phys = <&mipi_tx1>;
+ phy-names = "dphy";
+ status = "disabled";
+ };
+diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+index 87ef72bffd86..7501bfc2b0f1 100644
+--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
++++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+@@ -727,6 +727,7 @@
+ <&tegra_car 128>, /* hda2hdmi */
+ <&tegra_car 111>; /* hda2codec_2x */
+ reset-names = "hda", "hda2hdmi", "hda2codec_2x";
++ power-domains = <&pd_sor>;
+ status = "disabled";
+ };
+
+diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
+index eb1ed96a92f7..e58254cb22e6 100644
+--- a/arch/arm64/boot/dts/qcom/Makefile
++++ b/arch/arm64/boot/dts/qcom/Makefile
+@@ -242,7 +242,8 @@ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
+ sxr1130-usbc-mtp-overlay.dtbo \
+ sxr1130-usbc-pm660a-mtp-overlay.dtbo \
+ sxr1130-qrd-overlay.dtbo \
+- sxr1130-svr-overlay.dtbo
++ sxr1130-svr-overlay.dtbo \
++ sxr1130-arglass-overlay.dtbo
+
+ sdm670-cdp-overlay.dtbo-base := sdm670.dtb
+ sdm670-mtp-overlay.dtbo-base := sdm670.dtb
+@@ -318,6 +319,7 @@ sxr1130-usbc-mtp-overlay.dtbo-base := sxr1130.dtb
+ sxr1130-usbc-pm660a-mtp-overlay.dtbo-base := sxr1130.dtb
+ sxr1130-qrd-overlay.dtbo-base := sxr1130.dtb
+ sxr1130-svr-overlay.dtbo-base := sxr1130.dtb
++sxr1130-arglass-overlay.dtbo-base := sxr1130.dtb
+
+ else
+ dtb-$(CONFIG_ARCH_SDM670) += sdm670-rumi.dtb \
+@@ -390,7 +392,8 @@ dtb-$(CONFIG_ARCH_SDM670) += sdm670-rumi.dtb \
+ sxr1130-usbc-mtp.dtb \
+ sxr1130-usbc-pm660a-mtp.dtb \
+ sxr1130-qrd.dtb \
+- sxr1130-svr.dtb
++ sxr1130-svr.dtb \
++ sxr1130-arglass.dtb
+ endif
+
+ ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
+@@ -667,7 +670,8 @@ dtb-$(CONFIG_ARCH_MSM8909) += msm8909-pm8916-mtp.dtb \
+ msm8905-qrd-skub.dtb \
+ msm8905-qrd-sku3.dtb \
+ msm8909-mtp.dtb \
+- msm8909-1gb-mtp.dtb
++ msm8909-1gb-mtp.dtb \
++ msm8909-1gb-qrd-skue.dtb
+
+ dtb-$(CONFIG_ARCH_SDM450) += sdm450-rcm.dtb \
+ sdm450-cdp.dtb \
+diff --git a/arch/arm64/boot/dts/qcom/batterydata-qrd-skue-4v35-2000mah.dtsi b/arch/arm64/boot/dts/qcom/batterydata-qrd-skue-4v35-2000mah.dtsi
+new file mode 100644
+index 000000000000..98d6bd9288f4
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/batterydata-qrd-skue-4v35-2000mah.dtsi
+@@ -0,0 +1,121 @@
++/* Copyright (c) 2017,2020 The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++qcom,qrd-skue-4v35-2000mah-data {
++ qcom,battery-type = "qrd_skue_4v35_2000mah";
++ qcom,batt-id-kohm = <0>;
++ qcom,chg-term-ua = <100000>;
++ qcom,default-rbatt-mohm = <148>;
++ qcom,fcc-mah = <2000>;
++ qcom,max-voltage-uv = <4350000>;
++ qcom,rbatt-capacitive-mohm = <50>;
++ qcom,v-cutoff-uv = <3400000>;
++ qcom,flat-ocv-threshold-uv = <3800000>;
++
++ qcom,fcc-temp-lut {
++ qcom,lut-col-legend = <(-20) 0 25 40 60>;
++ qcom,lut-data = <2084 2082 2080 2073 2064>;
++ };
++
++ qcom,ibat-acc-lut {
++ qcom,lut-col-legend = <(-20) 0 25>;
++ qcom,lut-row-legend = <0 250 500 1000>;
++ qcom,lut-data = <2020 2060 2038>,
++ <514 1883 2019>,
++ <87 1619 1999>,
++ <6 1036 1942>;
++ };
++
++ qcom,pc-temp-ocv-lut {
++ qcom,lut-col-legend = <(-20) 0 25 40 60>;
++ qcom,lut-row-legend = <100 95 90 85 80>,
++ <75 70 65 60 55>,
++ <50 45 40 35 30>,
++ <25 20 16 13 11>,
++ <10 9 8 7 6>,
++ <5 4 3 2 1>,
++ <0>;
++ qcom,lut-data = <4332 4331 4326 4322 4314>,
++ <4235 4255 4257 4254 4250>,
++ <4168 4195 4198 4196 4192>,
++ <4107 4142 4142 4140 4136>,
++ <4058 4090 4090 4088 4084>,
++ <3971 4039 4044 4039 4035>,
++ <3925 3963 3986 3992 3990>,
++ <3889 3927 3953 3953 3951>,
++ <3856 3892 3912 3914 3912>,
++ <3830 3858 3867 3870 3868>,
++ <3808 3829 3834 3835 3833>,
++ <3790 3806 3811 3811 3810>,
++ <3775 3788 3793 3794 3792>,
++ <3760 3775 3780 3779 3778>,
++ <3746 3764 3769 3765 3758>,
++ <3730 3749 3757 3749 3735>,
++ <3711 3730 3739 3730 3715>,
++ <3693 3715 3715 3708 3693>,
++ <3674 3706 3692 3684 3671>,
++ <3656 3699 3688 3679 3668>,
++ <3646 3695 3686 3678 3667>,
++ <3633 3692 3685 3677 3666>,
++ <3617 3686 3683 3676 3664>,
++ <3597 3680 3680 3673 3661>,
++ <3573 3667 3672 3665 3651>,
++ <3542 3643 3647 3641 3622>,
++ <3500 3603 3602 3598 3577>,
++ <3440 3545 3540 3539 3520>,
++ <3347 3463 3458 3463 3434>,
++ <3189 3340 3337 3345 3302>,
++ <3000 3106 3000 3000 3000>;
++ };
++
++ qcom,rbatt-sf-lut {
++ qcom,lut-col-legend = <(-20) 0 25 40 60>;
++ qcom,lut-row-legend = <100 95 90 85 80>,
++ <75 70 65 60 55>,
++ <50 45 40 35 30>,
++ <25 20 16 13 11>,
++ <10 9 8 7 6>,
++ <5 4 3 2 1>,
++ <0>;
++ qcom,lut-data = <1410 265 100 84 79>,
++ <1408 265 100 84 79>,
++ <1342 268 101 85 79>,
++ <1273 273 103 87 80>,
++ <1243 276 106 88 81>,
++ <1164 286 112 92 82>,
++ <1164 268 115 94 84>,
++ <1173 268 123 98 88>,
++ <1189 264 122 102 90>,
++ <1212 265 109 96 86>,
++ <1242 268 101 87 80>,
++ <1276 276 102 87 79>,
++ <1314 287 104 90 81>,
++ <1358 302 106 93 84>,
++ <1411 318 109 93 83>,
++ <1485 336 110 90 79>,
++ <1584 357 110 91 80>,
++ <1693 396 110 91 81>,
++ <1720 421 108 89 78>,
++ <1960 465 110 89 80>,
++ <2175 494 112 91 81>,
++ <2445 530 114 94 83>,
++ <2825 573 119 96 86>,
++ <3334 629 125 99 89>,
++ <4062 689 130 100 89>,
++ <5168 783 129 99 83>,
++ <6923 916 132 99 85>,
++ <10172 1160 145 105 90>,
++ <16692 1530 169 119 103>,
++ <104534 2708 230 145 150>,
++ <279842 43438 178115 106625 131239>;
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-arglass-boe-dual-1080p-video.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-arglass-boe-dual-1080p-video.dtsi
+new file mode 100644
+index 000000000000..ab2de32b61f5
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/dsi-panel-arglass-boe-dual-1080p-video.dtsi
+@@ -0,0 +1,99 @@
++/* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++&mdss_mdp {
++ dsi_dual_arglass_boe_dual_1080p_video: qcom,mdss_dsi_arglass_cmd_boe {
++ qcom,mdss-dsi-panel-name =
++ "Dual ARGlass video mode dsi BOE panel without DSC";
++ qcom,mdss-dsi-panel-type = "dsi_video_mode";
++ qcom,mdss-dsi-virtual-channel-id = <0>;
++ qcom,mdss-dsi-stream = <0>;
++ qcom,mdss-dsi-panel-hdr-enabled;
++ qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000
++ 17000 15500 30000 8000 3000>;
++ qcom,mdss-dsi-panel-peak-brightness = <4200000>;
++ qcom,mdss-dsi-panel-blackness-level = <3230>;
++ qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
++ qcom,mdss-dsi-bllp-eof-power-mode;
++ qcom,mdss-dsi-bllp-power-mode;
++ qcom,mdss-dsi-lane-0-state;
++ qcom,mdss-dsi-lane-1-state;
++ qcom,mdss-dsi-lane-2-state;
++ qcom,mdss-dsi-lane-3-state;
++ qcom,mdss-dsi-dma-trigger = "trigger_sw";
++ qcom,mdss-dsi-mdp-trigger = "none";
++ qcom,mdss-dsi-reset-sequence = <1 20>, <0 20>, <1 50>;
++ qcom,mdss-pan-physical-width-dimension = <74>;
++ qcom,mdss-pan-physical-height-dimension = <131>;
++ qcom,mdss-dsi-tx-eot-append;
++ qcom,mdss-dsi-color-order = "rgb_swap_rgb";
++ qcom,mdss-dsi-underflow-color = <0xff>;
++ qcom,mdss-dsi-border-color = <0>;
++ qcom,mdss-dsi-bpp = <24>;
++ qcom,mdss-dsi-display-timings {
++ timing@0{
++ qcom,mdss-dsi-panel-width = <1920>;
++ qcom,mdss-dsi-panel-height = <1080>;
++ qcom,mdss-dsi-h-front-porch = <56>;
++ qcom,mdss-dsi-h-back-porch = <72>;
++ qcom,mdss-dsi-h-pulse-width = <32>;
++ qcom,mdss-dsi-h-sync-skew = <0>;
++ qcom,mdss-dsi-v-back-porch = <8>;
++ qcom,mdss-dsi-v-front-porch = <8>;
++ qcom,mdss-dsi-v-pulse-width = <4>;
++ qcom,mdss-dsi-panel-framerate = <60>;
++ qcom,mdss-dsi-on-command = [
++ 39 01 00 00 00 00 02 03 00
++ 39 01 00 00 00 00 02 53 20
++ /* Brightness control, max: 0xff */
++ 39 01 00 00 00 00 03 51 7F 00
++ 39 01 00 00 00 00 02 6B 00
++ 39 01 00 00 00 00 05 80 01 E0 0E 11
++ 39 01 00 00 00 00 08 81 02 20 00 0C 00
++ 08 01
++ 39 01 00 00 00 00 08 82 02 20 00 08 00
++ 10 01
++ /* Flip by 180 */
++ 39 01 00 00 00 00 02 36 03
++ 39 01 00 04 00 00 02 36 00
++ 39 01 00 00 00 00 02 35 00
++ /* CMD2 P1 */
++ 39 01 00 00 00 00 03 F0 AA 11
++ 39 01 00 00 00 00 0A C2 00 00 01 99 03
++ FF 00 90 02
++ /* CMD2 P2 */
++ 39 01 00 00 00 00 03 F0 AA 12
++ 39 01 00 00 00 00 02 B0 93
++ 39 01 00 00 00 00 03 B6 14 14
++ 39 01 00 00 00 00 03 B9 01 73
++ 39 01 00 00 00 00 05 BA 01 20 01 83
++ 39 01 00 00 00 00 03 FF 5A 81
++ 39 01 00 00 00 00 02 65 14
++ 39 01 00 00 00 00 12 F9 64 68 6C 70 74
++ 78 7C 80 84 88 8C 90 95 9A A0 A5 B0
++ 39 01 00 00 00 00 02 26 20
++ 39 01 00 00 00 00 03 F0 AA 13
++ 39 01 00 00 00 00 02 D5 00
++ 05 01 00 00 cb 00 02 11 00
++ 05 01 00 00 00 00 02 29 00
++ ];
++
++ qcom,mdss-dsi-off-command = [05 01 00 00 0a 00
++ 02 28 00 05 01 00 00 3c 00 02 10 00];
++
++ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
++ qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
++
++ };
++ };
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-hx8379c-fwvga-video.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-hx8379c-fwvga-video.dtsi
+new file mode 100644
+index 000000000000..4b43c40eaacc
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/dsi-panel-hx8379c-fwvga-video.dtsi
+@@ -0,0 +1,90 @@
++/* Copyright (c) 2015, 2017,2020 The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++&mdss_mdp {
++ dsi_hx8379c_fwvga_video: qcom,mdss_dsi_hx8379c_fwvga_video {
++ qcom,mdss-dsi-panel-name = "hx8379c fwvga video mode dsi panel";
++ qcom,mdss-dsi-panel-type = "dsi_video_mode";
++ qcom,mdss-dsi-panel-framerate = <60>;
++ qcom,mdss-dsi-virtual-channel-id = <0>;
++ qcom,mdss-dsi-stream = <0>;
++ qcom,mdss-dsi-panel-width = <480>;
++ qcom,mdss-dsi-panel-height = <854>;
++ qcom,mdss-dsi-h-front-porch = <60>;
++ qcom,mdss-dsi-h-back-porch = <60>;
++ qcom,mdss-dsi-h-pulse-width = <60>;
++ qcom,mdss-dsi-h-sync-skew = <0>;
++ qcom,mdss-dsi-v-back-porch = <6>;
++ qcom,mdss-dsi-v-front-porch = <6>;
++ qcom,mdss-dsi-v-pulse-width = <5>;
++ qcom,mdss-dsi-h-left-border = <0>;
++ qcom,mdss-dsi-h-right-border = <0>;
++ qcom,mdss-dsi-v-top-border = <0>;
++ qcom,mdss-dsi-v-bottom-border = <0>;
++ qcom,mdss-dsi-bpp = <24>;
++ qcom,mdss-dsi-color-order = <0>;
++ qcom,mdss-dsi-underflow-color = <0xff>;
++ qcom,mdss-dsi-border-color = <0>;
++ qcom,ulps-enabled;
++ qcom,mdss-dsi-on-command = [39 01 00 00 00 00 04 B9 FF 83 79
++ 39 01 00 00 00 00 11 B1 44 1C 1C 31 31 50 D0 EE
++ 54 80 38 38 F8 32 22 22
++ 39 01 00 00 00 00 0A B2 80 FE 0B 04 00 50 11 42
++ 15
++ 39 01 00 00 00 00 0B B4 69 6A 69 6A 69 6A 22 70
++ 23 70
++ 39 01 00 00 00 00 0B BA 41 83 A8 4D B2 24 00 00
++ 50 90
++ 39 01 00 00 00 00 05 C7 00 00 00 C0
++ 39 01 00 00 00 00 02 CC 02
++ 39 01 00 00 00 00 02 D2 77
++ 39 01 00 00 00 00 1E D3 00 07 00 00 00 00 00 32
++ 10 03 00 03 03 60 03 60 00 08 00 08 45 44 08 08
++ 37 08 08 37 09
++ 39 01 00 00 00 00 23 D5 18 18 19 19 18 18 20 21
++ 24 25 18 18 18 18 00 01 04 05 02 03 06 07 18 18
++ 18 18 18 18 18 18 18 18 00 00
++ 39 01 00 00 00 00 21 D6 18 18 18 18 19 19 25 24
++ 21 20 18 18 18 18 05 04 01 00 03 02 07 06 18 18
++ 18 18 18 18 18 18 18 18
++ 39 01 00 00 00 00 2B E0 00 04 0B 2F 39 3F 21 46
++ 07 0A 0C 17 0F 13 16 14 15 07 11 13 30 00 04 0B
++ 2F 3A 3F 21 46 07 0A 0C 17 0F 14 16 14 15 07 11
++ 13 16
++ 39 01 00 00 00 00 03 B6 4E 4E
++ 05 01 00 00 78 00 02 11 00
++ 05 01 00 00 14 00 02 29 00];
++ qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00
++ 05 01 00 00 78 00 02 10 00];
++ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
++ qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
++ qcom,mdss-dsi-h-sync-pulse = <1>;
++ qcom,mdss-dsi-traffic-mode = "burst_mode";
++ qcom,mdss-dsi-bllp-eof-power-mode;
++ qcom,mdss-dsi-bllp-power-mode;
++ qcom,mdss-dsi-lane-0-state;
++ qcom,mdss-dsi-lane-1-state;
++ qcom,mdss-dsi-panel-timings = [7B 21 1A 00 31 2D 1E 23 2B 03 04
++ 00];
++ qcom,mdss-dsi-t-clk-post = <0x20>;
++ qcom,mdss-dsi-t-clk-pre = <0x2C>;
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm";
++ qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>;
++ qcom,mdss-dsi-bl-pmic-bank-select = <0>;
++ qcom,mdss-dsi-dma-trigger = "trigger_sw";
++ qcom,mdss-dsi-mdp-trigger = "none";
++ qcom,mdss-dsi-reset-sequence = <1 20>, <0 20>, <1 20>;
++ qcom,mdss-dsi-lp11-init;
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/fg-gen3-batterydata-goertek-merlin-230mah.dtsi b/arch/arm64/boot/dts/qcom/fg-gen3-batterydata-goertek-merlin-230mah.dtsi
+new file mode 100644
+index 000000000000..b7095889688a
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/fg-gen3-batterydata-goertek-merlin-230mah.dtsi
+@@ -0,0 +1,80 @@
++/* Copyright (c) 2021, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++qcom,fg-gen3-batterydata-goertek-merlin-230mah {
++ qcom,max-voltage-uv = <4350000>;
++ qcom,fg-cc-cv-threshold-mv = <4340>;
++ qcom,nom-batt-capacity-mah = <230>;
++ qcom,batt-id-kohm = <0>;
++ qcom,battery-beta = <3440>;
++ qcom,battery-type = "fg-gen3-batterydata-goertek-merlin-230mah";
++ qcom,checksum = <0x163C>;
++ qcom,gui-version = "PM660GUI - 0.0.0.45";
++ qcom,fg-profile-data = [
++ 2A 1E 8D EC
++ 6A 01 88 E2
++ CF 1C 2E 02
++ 5A 0D F6 0A
++ 2A 19 81 22
++ F0 45 5E 52
++ 63 00 00 00
++ 12 00 00 00
++ 00 00 AF CD
++ 44 BC 06 C2
++ 3A 00 08 00
++ 8A F2 1E 07
++ C3 F4 2A EA
++ 1D EB 57 0B
++ EC 04 96 32
++ 1C 06 09 20
++ 27 00 14 00
++ BD 1E 06 07
++ 42 02 CD ED
++ BA 1C FC 02
++ F7 15 35 12
++ 95 18 82 23
++ 6E 44 86 5A
++ 61 00 00 00
++ 0F 00 00 00
++ 00 00 B8 D5
++ 8D CA 00 9C
++ 36 00 00 00
++ 22 01 1E 07
++ 72 ED 47 CC
++ F3 06 ED EB
++ 69 FA 37 FA
++ 99 33 CC FF
++ 07 10 00 00
++ F6 00 99 45
++ 36 00 40 00
++ EC 05 0A FA
++ FF 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ 00 00 00 00
++ ];
++};
+diff --git a/arch/arm64/boot/dts/qcom/msm-gdsc-sdm845.dtsi b/arch/arm64/boot/dts/qcom/msm-gdsc-sdm845.dtsi
+index b43c87633365..4e9c90eef774 100644
+--- a/arch/arm64/boot/dts/qcom/msm-gdsc-sdm845.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm-gdsc-sdm845.dtsi
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
++ * Copyright (c) 2016-2017, 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -207,6 +207,7 @@
+ regulator-name = "gpu_gx_gdsc";
+ reg = <0x509100c 0x4>;
+ qcom,poll-cfg-gdscr;
++ qcom,skip-disable-before-sw-enable;
+ status = "disabled";
+ };
+
+diff --git a/arch/arm64/boot/dts/qcom/msm8905-qrd-skub.dtsi b/arch/arm64/boot/dts/qcom/msm8905-qrd-skub.dtsi
+index 4593eadac55a..e4b0fced3fd7 100644
+--- a/arch/arm64/boot/dts/qcom/msm8905-qrd-skub.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8905-qrd-skub.dtsi
+@@ -226,6 +226,18 @@
+ qcom,fast-avg-setup = <0>;
+ qcom,vadc-thermal-node;
+ };
++
++ chan@36 {
++ qcom,vadc-thermal-node;
++ };
++
++ chan@32 {
++ qcom,vadc-thermal-node;
++ };
++
++ chan@3c {
++ qcom,vadc-thermal-node;
++ };
+ };
+
+ &soc {
+@@ -289,7 +301,8 @@
+ <&afe_pcm_rx>, <&afe_pcm_tx>,
+ <&afe_proxy_rx>, <&afe_proxy_tx>,
+ <&incall_record_rx>, <&incall_record_tx>,
+- <&incall_music_rx>, <&incall_music_2_rx>;
++ <&incall_music_rx>, <&incall_music_2_rx>,
++ <&proxy_rx>, <&proxy_tx>;
+ asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-hdmi.8",
+ "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
+ "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
+@@ -304,7 +317,8 @@
+ "msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
+ "msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
+ "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
+- "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770";
++ "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770",
++ "msm-dai-q6-dev.8194", "msm-dai-q6-dev.8195";
+ asoc-codec = <&stub_codec>, <&msm_digital_codec>,
+ <&pmic_analog_codec>;
+ asoc-codec-names = "msm-stub-codec.1", "msm-dig-codec",
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-1gb-qrd-skue.dts b/arch/arm64/boot/dts/qcom/msm8909-1gb-qrd-skue.dts
+new file mode 100644
+index 000000000000..a397d11dd96f
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/msm8909-1gb-qrd-skue.dts
+@@ -0,0 +1,20 @@
++/* Copyright (c) 2016,2020 The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++/dts-v1/;
++
++#include "msm8909-qrd-skue.dtsi"
++
++/ {
++ qcom,board-id= <0x1000b 0x9>;
++};
++
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-camera-sensor-skue.dtsi b/arch/arm64/boot/dts/qcom/msm8909-camera-sensor-skue.dtsi
+new file mode 100644
+index 000000000000..8a67a01cfa63
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/msm8909-camera-sensor-skue.dtsi
+@@ -0,0 +1,129 @@
++/*
++ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++&soc {
++ SY7803_default: SY7803_default {
++ mux {
++ /* CLK, DATA */
++ pins = "gpio31", "gpio32";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio31", "gpio32";
++ bias-disable; /* No PULL */
++ drive-strength = <2>; /* 2 MA */
++ };
++ };
++
++ flash_SY7803:flashlight {
++ compatible = "qcom,leds-gpio-flash";
++ status = "okay";
++ pinctrl-names = "flash_default";
++ pinctrl-0 = <&SY7803_default>;
++ qcom,flash-en = <&msm_gpio 31 0>;
++ qcom,flash-now = <&msm_gpio 32 0>;
++ qcom,op-seq = "flash_en", "flash_now";
++ qcom,torch-seq-val = <1 0>;
++ qcom,flash-seq-val = <1 1>;
++ linux,name = "flashlight";
++ linux,default-trigger = "flashlight-trigger";
++ };
++
++ led_flash0: qcom,camera-led-flash {
++ cell-index = <0>;
++ compatible = "qcom,camera-led-flash";
++ qcom,flash-type = <3>;
++ qcom,flash-source = <&flash_SY7803>;
++ qcom,torch-source = <&flash_SY7803>;
++ };
++};
++
++&i2c_3 {
++
++ qcom,camera@0 {
++ cell-index = <0>;
++ compatible = "qcom,camera";
++ reg = <0x2>;
++ qcom,csiphy-sd-index = <0>;
++ qcom,csid-sd-index = <0>;
++ qcom,mount-angle = <90>;
++ qcom,led-flash-src = <&led_flash0>;
++ cam_vana-supply = <&pm8909_l17>;
++ cam_vio-supply = <&pm8909_l6>;
++ cam_vaf-supply = <&pm8909_l8>;
++ qcom,cam-vreg-name = "cam_vio", "cam_vana",
++ "cam_vaf";
++ qcom,cam-vreg-type = <1 0 0>;
++ qcom,cam-vreg-min-voltage = <0 2800000 2850000>;
++ qcom,cam-vreg-max-voltage = <0 2850000 2900000>;
++ qcom,cam-vreg-op-mode = <0 80000 100000>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk0_default
++ &cam_sensor_rear_default>;
++ pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep>;
++ gpios = <&msm_gpio 26 0>,
++ <&msm_gpio 35 0>,
++ <&msm_gpio 34 0>;
++ qcom,gpio-reset = <1>;
++ qcom,gpio-standby = <2>;
++ qcom,gpio-req-tbl-num = <0 1 2>;
++ qcom,gpio-req-tbl-flags = <1 0 0>;
++ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
++ "CAM_RESET1",
++ "CAM_STANDBY";
++ qcom,sensor-position = <0>;
++ qcom,sensor-mode = <0>;
++ qcom,cci-master = <0>;
++ status = "ok";
++ clocks = <&clock_gcc clk_mclk0_clk_src>,
++ <&clock_gcc clk_gcc_camss_mclk0_clk>;
++ clock-names = "cam_src_clk", "cam_clk";
++ qcom,clock-rates = <24000000 0>;
++ };
++
++ qcom,camera@1 {
++ cell-index = <1>;
++ compatible = "qcom,camera";
++ reg = <0x1>;
++ qcom,csiphy-sd-index = <0>;
++ qcom,csid-sd-index = <0>;
++ qcom,mount-angle = <90>;
++ cam_vana-supply = <&pm8909_l17>;
++ cam_vio-supply = <&pm8909_l6>;
++ qcom,cam-vreg-name = "cam_vio", "cam_vana";
++ qcom,cam-vreg-type = <1 0>;
++ qcom,cam-vreg-min-voltage = <0 2800000>;
++ qcom,cam-vreg-max-voltage = <0 2850000>;
++ qcom,cam-vreg-op-mode = <0 80000>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk1_default
++ &cam_sensor_front_default>;
++ pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front_sleep>;
++ gpios = <&msm_gpio 27 0>,
++ <&msm_gpio 28 0>,
++ <&msm_gpio 33 0>;
++ qcom,gpio-reset = <1>;
++ qcom,gpio-standby = <2>;
++ qcom,gpio-req-tbl-num = <0 1 2>;
++ qcom,gpio-req-tbl-flags = <1 0 0>;
++ qcom,gpio-req-tbl-label = "CAMIF_MCLK",
++ "CAM_RESET",
++ "CAM_STANDBY";
++ qcom,cci-master = <0>;
++ status = "ok";
++ clocks = <&clock_gcc clk_mclk1_clk_src>,
++ <&clock_gcc clk_gcc_camss_mclk1_clk>;
++ clock-names = "cam_src_clk", "cam_clk";
++ qcom,clock-rates = <24000000 0>;
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-coresight.dtsi b/arch/arm64/boot/dts/qcom/msm8909-coresight.dtsi
+index 9d35b0628db6..8822da898295 100644
+--- a/arch/arm64/boot/dts/qcom/msm8909-coresight.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8909-coresight.dtsi
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
++ * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 an
+@@ -626,34 +626,6 @@
+ clock-names = "apb_pclk";
+ };
+
+- /* Venus CTI */
+- cti_video_cpu0: cti@830000 {
+- compatible = "arm,primecell";
+- arm,primecell-periphid = <0x0003b966>;
+-
+- reg = <0x830000 0x1000>;
+- reg-names = "cti-base";
+- coresight-name = "coresight-cti-video-cpu0";
+-
+- clocks = <&clock_rpm clk_qdss_clk>,
+- <&clock_rpm clk_qdss_a_clk>;
+- clock-names = "apb_pclk";
+- };
+-
+- /* Pronto CTI */
+- cti_wcn_cpu0: cti@835000 {
+- compatible = "arm,primecell";
+- arm,primecell-periphid = <0x0003b966>;
+-
+- reg = <0x835000 0x1000>;
+- reg-names = "cti-base";
+- coresight-name = "coresight-cti-wcn-cpu0";
+-
+- clocks = <&clock_rpm clk_qdss_clk>,
+- <&clock_rpm clk_qdss_a_clk>;
+- clock-names = "apb_pclk";
+- };
+-
+ wcn_etm0 {
+ compatible = "qcom,coresight-remote-etm";
+ coresight-name = "coresight-wcn-etm0";
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-mdss-panels.dtsi b/arch/arm64/boot/dts/qcom/msm8909-mdss-panels.dtsi
+index 15f0c31d498a..35625963b471 100644
+--- a/arch/arm64/boot/dts/qcom/msm8909-mdss-panels.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8909-mdss-panels.dtsi
+@@ -12,6 +12,7 @@
+
+ #include "dsi-panel-390p-auo-cmd.dtsi"
+ #include "dsi-panel-hx8394d-720p-video.dtsi"
++#include "dsi-panel-hx8379c-fwvga-video.dtsi"
+
+ &soc {
+ dsi_panel_pwr_supply: dsi_panel_pwr_supply {
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-pm8909.dtsi b/arch/arm64/boot/dts/qcom/msm8909-pm8909.dtsi
+index 4f59e2d3fd7a..d60cf8917260 100644
+--- a/arch/arm64/boot/dts/qcom/msm8909-pm8909.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8909-pm8909.dtsi
+@@ -20,7 +20,6 @@
+ };
+
+ &pm8909_vadc {
+- #thermal-sensor-cells = <1>;
+ chan@0 {
+ label = "usb_in";
+ reg = <0>;
+@@ -118,7 +117,6 @@
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+- qcom,vadc-thermal-node;
+ };
+
+ chan@32 {
+@@ -130,7 +128,6 @@
+ qcom,scale-function = <4>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+- qcom,vadc-thermal-node;
+ };
+
+ chan@3c {
+@@ -142,7 +139,6 @@
+ qcom,scale-function = <4>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+- qcom,vadc-thermal-node;
+ };
+ };
+
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-qrd-skue.dtsi b/arch/arm64/boot/dts/qcom/msm8909-qrd-skue.dtsi
+new file mode 100644
+index 000000000000..d2f4dfd9f46e
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/msm8909-qrd-skue.dtsi
+@@ -0,0 +1,490 @@
++/* Copyright (c) 2014-2018, The Linux Foundation. All rights
++ * reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include "msm8909-qrd.dtsi"
++#include "msm8909-camera-sensor-skue.dtsi"
++
++/ {
++ model = "Qualcomm Technologies, Inc. MSM8909 QRD SKUE";
++ compatible = "qcom,msm8909-qrd", "qcom,msm8909", "qcom,qrd";
++};
++
++&soc {
++ i2c@78b9000 { /* BLSP1 QUP5 */
++ focaltech@38 {
++ compatible = "focaltech,5x06";
++ reg = <0x38>;
++ interrupt-parent = <&msm_gpio>;
++ interrupts = <13 0x2>;
++ vdd-supply = <&pm8909_l17>;
++ vcc_i2c-supply = <&pm8909_l6>;
++ /* pins used by touchscreen */
++ pinctrl-names = "pmx_ts_active","pmx_ts_suspend",
++ "pmx_ts_release";
++ pinctrl-0 = <&ts_int_active &ts_reset_active>;
++ pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
++ pinctrl-2 = <&ts_release>;
++ focaltech,name = "ft6306";
++ focaltech,family-id = <0x06>;
++ focaltech,reset-gpio = <&msm_gpio 12 0x0>;
++ focaltech,irq-gpio = <&msm_gpio 13 0x0>;
++ focaltech,display-coords = <0 0 480 854>;
++ focaltech,panel-coords = <0 0 480 950>;
++ focaltech,button-map= <139 102 158>;
++ focaltech,no-force-update;
++ focaltech,i2c-pull-up;
++ focaltech,group-id = <1>;
++ focaltech,hard-reset-delay-ms = <20>;
++ focaltech,soft-reset-delay-ms = <200>;
++ focaltech,num-max-touches = <2>;
++ focaltech,fw-delay-aa-ms = <30>;
++ focaltech,fw-delay-55-ms = <30>;
++ focaltech,fw-upgrade-id1 = <0x79>;
++ focaltech,fw-upgrade-id2 = <0x08>;
++ focaltech,fw-delay-readid-ms = <10>;
++ focaltech,fw-delay-era-flsh-ms = <2000>;
++ focaltech,fw-auto-cal;
++ focaltech,ignore-id-check;
++ };
++ };
++
++ i2c@78b5000 { /* BLSP1 QUP1 */
++ aw2013@45 {
++ compatible = "awinic,aw2013";
++ reg = <0x45>;
++ vdd-supply = <&pm8909_l17>;
++ vcc-supply = <&pm8909_l6>;
++
++ aw2013,red {
++ aw2013,name = "red";
++ aw2013,id = <0>;
++ aw2013,max-brightness = <255>;
++ aw2013,max-current = <1>;
++ aw2013,rise-time-ms = <2>;
++ aw2013,hold-time-ms = <1>;
++ aw2013,fall-time-ms = <2>;
++ aw2013,off-time-ms = <1>;
++ };
++
++ aw2013,green {
++ aw2013,name = "green";
++ aw2013,id = <1>;
++ aw2013,max-brightness = <255>;
++ aw2013,max-current = <1>;
++ aw2013,rise-time-ms = <2>;
++ aw2013,hold-time-ms = <1>;
++ aw2013,fall-time-ms = <2>;
++ aw2013,off-time-ms = <1>;
++ };
++
++ aw2013,blue {
++ aw2013,name = "blue";
++ aw2013,id = <2>;
++ aw2013,max-brightness = <255>;
++ aw2013,max-current = <1>;
++ aw2013,rise-time-ms = <2>;
++ aw2013,hold-time-ms = <1>;
++ aw2013,fall-time-ms = <2>;
++ aw2013,off-time-ms = <1>;
++ };
++ };
++ };
++
++ gen-vkeys {
++ compatible = "qcom,gen-vkeys";
++ label = "ft5x06_ts";
++ qcom,disp-maxx = <480>;
++ qcom,disp-maxy = <854>;
++ qcom,panel-maxx = <480>;
++ qcom,panel-maxy = <946>;
++ qcom,key-codes = <139 172 158>;
++ qcom,y-offset = <0>;
++ };
++
++ i2c@78b5000 { /* BLSP1 QUP1 */
++ liteon@23 {
++ compatible = "liteon,ltr553";
++ reg = <0x23>;
++ vdd-supply = <&pm8909_l17>;
++ vio-supply = <&pm8909_l6>;
++ interrupt-parent = <&msm_gpio>;
++ interrupts = <94 0x2002>;
++ pinctrl-names = "default","sleep";
++ pinctrl-0 = <<r553_default>;
++ pinctrl-1 = <<r553_sleep>;
++ liteon,irq-gpio = <&msm_gpio 94 0x2002>;
++ liteon,als-ps-persist = <0>;
++ liteon,ps-led = <0x7f>;
++ liteon,ps-pulses = <4>;
++ liteon,wakeup-threshold = <4>;
++ liteon,als-integration-time = <0>;
++ liteon,ps-distance-table = \
++ <1376 566 343 287 200 170 155>;
++ };
++
++ bosch@18 { /* Accelerometer sensor */
++ compatible = "bosch,bma2x2";
++ reg = <0x18>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&bma2x2_int1_default &bma2x2_int2_default>;
++ interrupt-parent = <&msm_gpio>;
++ interrupts = <96 0x2002>;
++ vdd-supply = <&pm8909_l17>;
++ vio-supply = <&pm8909_l6>;
++ bosch,init-interval = <200>;
++ bosch,place = <4>;
++ bosch,gpio-int1 = <&msm_gpio 96 0x2002>;
++ bosch,gpio-int2 = <&msm_gpio 65 0x2002>;
++ };
++ };
++
++ hall {
++ compatible = "hall-switch";
++ pinctrl-names = "default";
++ pinctrl-0 = <&hall_sensor_int_default>;
++ interrupt-parent = <&msm_gpio>;
++ interrupts = <36 0x2003>;
++ vddio-supply = <&pm8909_l5>;
++ linux,gpio-int = <&msm_gpio 36 0x1>;
++ linux,wakeup;
++ linux,min-uv = <1650000>;
++ linux,max-uv = <3300000>;
++ };
++
++ sound {
++ compatible = "qcom,msm8952-audio-codec";
++ qcom,model = "msm8909-skue-snd-card";
++ reg = <0x7702000 0x4>,
++ <0x7702004 0x4>,
++ <0x7702008 0x4>;
++ reg-names =
++ "csr_gp_io_mux_mic_ctl",
++ "csr_gp_io_mux_spkr_ctl",
++ "csr_gp_io_lpaif_pri_pcm_pri_mode_muxsel";
++ qcom,msm-snd-card-id = <0>;
++ qcom,msm-codec-type = "internal";
++ qcom,msm-ext-pa = "primary";
++ qcom,msm-mclk-freq = <9600000>;
++ qcom,msm-mbhc-hphl-swh = <1>;
++ qcom,msm-mbhc-gnd-swh = <0>;
++ qcom,msm-hs-micbias-type = "internal";
++ qcom,msm-micbias1-ext-cap;
++ qcom,msm-micbias2-ext-cap;
++ qcom,audio-routing =
++ "RX_BIAS", "MCLK",
++ "SPK_RX_BIAS", "MCLK",
++ "INT_LDO_H", "MCLK",
++ "MIC BIAS Internal1", "Handset Mic",
++ "MIC BIAS Internal2", "Headset Mic",
++ "AMIC1", "MIC BIAS Internal1",
++ "AMIC2", "MIC BIAS Internal2";
++ qcom,msm-gpios =
++ "pri_i2s",
++ "us_eu_gpio";
++ qcom,pinctrl-names =
++ "all_off",
++ "pri_i2s_act",
++ "us_eu_gpio_act",
++ "pri_i2s_us_eu_gpio_act";
++ pinctrl-names =
++ "all_off",
++ "pri_i2s_act",
++ "us_eu_gpio_act",
++ "pri_i2s_us_eu_gpio_act";
++ pinctrl-0 = <&cdc_pdm_lines_sus &cross_conn_det_sus
++ &vdd_spkdrv_sus>;
++ pinctrl-1 = <&cdc_pdm_lines_act &cross_conn_det_sus
++ &vdd_spkdrv_act>;
++ pinctrl-2 = <&cdc_pdm_lines_sus &cross_conn_det_act
++ &vdd_spkdrv_sus>;
++ pinctrl-3 = <&cdc_pdm_lines_act &cross_conn_det_act
++ &vdd_spkdrv_act>;
++ asoc-platform = <&pcm0>, <&pcm1>, <&pcm2>, <&voip>, <&voice>,
++ <&loopback>, <&compress>, <&hostless>,
++ <&afe>, <&lsm>, <&routing>, <&lpa>,
++ <&voice_svc>;
++ asoc-platform-names = "msm-pcm-dsp.0", "msm-pcm-dsp.1",
++ "msm-pcm-dsp.2", "msm-voip-dsp",
++ "msm-pcm-voice", "msm-pcm-loopback",
++ "msm-compress-dsp", "msm-pcm-hostless",
++ "msm-pcm-afe", "msm-lsm-client",
++ "msm-pcm-routing", "msm-pcm-lpa",
++ "msm-voice-svc";
++ asoc-cpu = <&dai_pri_auxpcm>, <&dai_hdmi>,
++ <&dai_mi2s0>, <&dai_mi2s1>,
++ <&dai_mi2s2>, <&dai_mi2s3>,
++ <&dai_mi2s4>, <&dai_mi2s5>,
++ <&sb_0_rx>, <&sb_0_tx>, <&sb_1_rx>, <&sb_1_tx>,
++ <&sb_3_rx>, <&sb_3_tx>, <&sb_4_rx>, <&sb_4_tx>,
++ <&bt_sco_rx>, <&bt_sco_tx>,
++ <&int_fm_rx>, <&int_fm_tx>,
++ <&afe_pcm_rx>, <&afe_pcm_tx>,
++ <&afe_proxy_rx>, <&afe_proxy_tx>,
++ <&incall_record_rx>, <&incall_record_tx>,
++ <&incall_music_rx>, <&incall_music_2_rx>;
++ asoc-cpu-names = "msm-dai-q6-auxpcm.1", "msm-dai-q6-hdmi.8",
++ "msm-dai-q6-mi2s.0", "msm-dai-q6-mi2s.1",
++ "msm-dai-q6-mi2s.2", "msm-dai-q6-mi2s.3",
++ "msm-dai-q6-mi2s.5", "msm-dai-q6-mi2s.6",
++ "msm-dai-q6-dev.16384", "msm-dai-q6-dev.16385",
++ "msm-dai-q6-dev.16386", "msm-dai-q6-dev.16387",
++ "msm-dai-q6-dev.16390", "msm-dai-q6-dev.16391",
++ "msm-dai-q6-dev.16392", "msm-dai-q6-dev.16393",
++ "msm-dai-q6-dev.12288", "msm-dai-q6-dev.12289",
++ "msm-dai-q6-dev.12292", "msm-dai-q6-dev.12293",
++ "msm-dai-q6-dev.224", "msm-dai-q6-dev.225",
++ "msm-dai-q6-dev.241", "msm-dai-q6-dev.240",
++ "msm-dai-q6-dev.32771", "msm-dai-q6-dev.32772",
++ "msm-dai-q6-dev.32773", "msm-dai-q6-dev.32770";
++ asoc-codec = <&stub_codec>, <&pm8909_conga_dig>;
++ asoc-codec-names = "msm-stub-codec.1", "cajon_codec";
++ };
++};
++
++&spmi_bus {
++ qcom,pm8909@0 {
++ qcom,leds@a300 {
++ status = "okay";
++ qcom,led_mpp_4 {
++ label = "mpp";
++ linux,name = "button-backlight";
++ linux,default-trigger = "none";
++ qcom,default-state = "off";
++ qcom,max-current = <40>;
++ qcom,current-setting = <5>;
++ qcom,id = <6>;
++ qcom,mode = "manual";
++ qcom,source-sel = <1>;
++ qcom,mode-ctrl = <0x60>;
++ };
++ };
++ };
++};
++
++&sdc2_cd_on {
++ /delete-property/ bias-pull-up;
++ bias-pull-down;
++};
++
++&sdc2_cd_off {
++ /delete-property/ bias-disable;
++ bias-pull-down;
++};
++
++&sdhc_2 {
++ qcom,nonremovable;
++
++ interrupts = <0 1>;
++ interrupt-map = <0 &intc 0 125 0
++ 1 &intc 0 221 0>;
++ interrupt-names = "hc_irq", "pwr_irq";
++ /delete-property/ cd-gpios;
++ pinctrl-names = "active", "sleep";
++ pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
++ pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
++};
++
++&pm8909_mpps {
++ mpp@a000 { /* MPP 1 */
++ /* VDD_PX */
++ status = "disabled";
++ };
++
++ mpp@a100 { /* MPP 2 */
++ /* Backlight PWM */
++ qcom,mode = <1>; /* Digital output */
++ qcom,invert = <0>; /* Disable invert */
++ qcom,src-sel = <4>; /* DTEST1 */
++ qcom,vin-sel = <0>; /* VPH_PWR */
++ qcom,master-en = <1>; /* Enable MPP */
++ };
++
++ mpp@a200 { /* MPP 3 */
++ /* VREF DAC */
++ status = "disabled";
++ };
++
++ mpp@a300 { /* MPP 4 */
++ /* HR LED */
++ status = "disabled";
++ };
++};
++
++&mdss_mdp {
++ qcom,mdss-pref-prim-intf = "dsi";
++};
++
++&vendor_fstab {
++ status = "ok";
++};
++
++&system_fstab {
++ status = "disabled";
++};
++
++&dsi_hx8379c_fwvga_video {
++ qcom,cont-splash-enabled;
++ qcom,mdss-dsi-pwm-gpio = <&pm8909_mpps 2 0>;
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++};
++
++&msm_gpio {
++ pmx_mdss {
++ mdss_dsi_active: mdss_dsi_active {
++ mux {
++ pins = "gpio25";
++ };
++ config {
++ pins = "gpio25";
++ };
++ };
++ mdss_dsi_suspend: mdss_dsi_suspend {
++ mux {
++ pins = "gpio25";
++ };
++ config {
++ pins = "gpio25";
++ };
++ };
++ };
++ pmx_mdss_te {
++ mdss_te_active: mdss_te_active {
++ mux {
++ pins = "gpio24";
++ };
++ config {
++ pins = "gpio24";
++ };
++ };
++ mdss_te_suspend: mdss_te_suspend {
++ mux {
++ pins = "gpio24";
++ };
++ config {
++ pins = "gpio24";
++ };
++ };
++ };
++ bma2x2_int1_pin {
++ bma2x2_int1_default: int1_default {
++ mux {
++ pins = "gpio96";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio96";
++ drive-dtrength = <6>;
++ bias-pull-up;
++ };
++ };
++ };
++ bma2x2_int2_pin {
++ bma2x2_int2_default: int2_default {
++ mux {
++ pins = "gpio65";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio65";
++ drive-dtrength = <6>;
++ bias-pull-up;
++ };
++ };
++ };
++ ltr553_int_pin {
++ ltr553_default: ltr553_default {
++ mux {
++ pins = "gpio94";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio94";
++ drive-dtrength = <6>;
++ bias-pull-up;
++ };
++ };
++ ltr553_sleep: ltr553_sleep {
++ mux {
++ pins = "gpio94";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio94";
++ drive-dtrength = <2>;
++ bias-pull-down;
++ };
++ };
++ };
++ hall_int_pin {
++ hall_sensor_int_default: hall_sensor_int_default {
++ mux {
++ pins = "gpio36";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio36";
++ drive-dtrength = <6>;
++ bias-pull-up;
++ };
++ };
++ };
++};
++
++&mdss_dsi0 {
++ qcom,dsi-pref-prim-pan = <&dsi_hx8379c_fwvga_video>;
++ pinctrl-names = "mdss_default", "mdss_sleep";
++ pinctrl-0 = <&mdss_dsi_active &mdss_te_active>;
++ pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>;
++
++ qcom,platform-reset-gpio = <&msm_gpio 25 0>;
++};
++
++&pm8909_vadc {
++ chan@30 {
++ qcom,scale-function = <13>;
++ };
++};
++
++&pm8909_adc_tm {
++ chan@30 {
++ qcom,scale-function = <8>;
++ };
++};
++
++&pm8909_chg {
++ qcom,vddmax-mv = <4350>;
++ qcom,vddsafe-mv = <4380>;
++ qcom,vinmin-mv = <4470>;
++ qcom,batt-hot-percentage = <25>;
++ qcom,batt-cold-percentage = <80>;
++ qcom,tchg-mins = <360>;
++ qcom,disable-vbatdet-based-recharge;
++ status = "okay";
++};
++
++/ {
++ qrd_batterydata: qcom,battery-data {
++ qcom,rpull-up-kohm = <0>;
++ qcom,vref-batt-therm = <1800000>;
++
++ #include "batterydata-qrd-skue-4v35-2000mah.dtsi"
++ };
++};
++
++&pm8909_bms {
++ status = "okay";
++ qcom,resume-soc = <95>;
++ qcom,use-reported-soc;
++ qcom,force-bms-active-on-charger;
++ qcom,battery-data = <&qrd_batterydata>;
++};
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-qrd.dtsi b/arch/arm64/boot/dts/qcom/msm8909-qrd.dtsi
+index 2ab9a8e31e13..4d5e3dadb8a9 100644
+--- a/arch/arm64/boot/dts/qcom/msm8909-qrd.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8909-qrd.dtsi
+@@ -149,3 +149,12 @@
+ &android_usb {
+ qcom,android-usb-cdrom;
+ };
++
++&mdss_dsi {
++ vdda-supply = <&pm8909_l2>;
++ vddio-supply = <&pm8909_l6>;
++ qcom,mdss_dsi_ctrl0@1ac8000 {
++ vdd-supply = <&pm8909_l17>;
++ vddio-supply = <&pm8909_l6>;
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/msm8909-vidc.dtsi b/arch/arm64/boot/dts/qcom/msm8909-vidc.dtsi
+index 5eeaa210be62..b6239fbd3f8e 100644
+--- a/arch/arm64/boot/dts/qcom/msm8909-vidc.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8909-vidc.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2015-2018, 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -26,6 +26,8 @@
+ qcom,clock-configs = <0x1 0x0 0x0 0x0>;
+ qcom,sw-power-collapse;
+ qcom,slave-side-cp;
++ qcom,qos-type-all-cores;
++ qcom,pm-qos-latency-us = <2>;
+ qcom,hfi = "venus";
+ qcom,reg-presets = <0xe0020 0x05555556>,
+ <0xe0024 0x05555556>,
+diff --git a/arch/arm64/boot/dts/qcom/msm8909.dtsi b/arch/arm64/boot/dts/qcom/msm8909.dtsi
+index 7d968c2e79f1..57206388ab81 100644
+--- a/arch/arm64/boot/dts/qcom/msm8909.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8909.dtsi
+@@ -1665,6 +1665,16 @@
+ qcom,msm-dai-q6-dev-id = <240>;
+ };
+
++ proxy_rx: qcom,msm-dai-q6-proxy-rx {
++ compatible = "qcom,msm-dai-q6-dev";
++ qcom,msm-dai-q6-dev-id = <8194>;
++ };
++
++ proxy_tx: qcom,msm-dai-q6-proxy-tx {
++ compatible = "qcom,msm-dai-q6-dev";
++ qcom,msm-dai-q6-dev-id = <8195>;
++ };
++
+ afe_loopback_tx: qcom,msm-dai-q6-afe-loopback-tx {
+ compatible = "qcom,msm-dai-q6-dev";
+ qcom,msm-dai-q6-dev-id = <24577>;
+diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+index 10c83e11c272..1f9ff2cea215 100644
+--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+@@ -542,7 +542,7 @@
+ pins = "gpio63", "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68";
+ drive-strength = <8>;
+- bias-pull-none;
++ bias-disable;
+ };
+ };
+ cdc_pdm_lines_sus: pdm_lines_off {
+@@ -555,7 +555,7 @@
+ pins = "gpio63", "gpio64", "gpio65", "gpio66",
+ "gpio67", "gpio68";
+ drive-strength = <2>;
+- bias-disable;
++ bias-pull-down;
+ };
+ };
+ };
+@@ -571,7 +571,7 @@
+ pins = "gpio113", "gpio114", "gpio115",
+ "gpio116";
+ drive-strength = <8>;
+- bias-pull-none;
++ bias-disable;
+ };
+ };
+
+@@ -599,7 +599,7 @@
+ pinconf {
+ pins = "gpio110";
+ drive-strength = <8>;
+- bias-pull-none;
++ bias-disable;
+ };
+ };
+
+@@ -625,7 +625,7 @@
+ pinconf {
+ pins = "gpio116";
+ drive-strength = <8>;
+- bias-pull-none;
++ bias-disable;
+ };
+ };
+ ext_mclk_tlmm_lines_sus: mclk_lines_off {
+@@ -653,7 +653,7 @@
+ pins = "gpio112", "gpio117", "gpio118",
+ "gpio119";
+ drive-strength = <8>;
+- bias-pull-none;
++ bias-disable;
+ };
+ };
+ ext_sec_tlmm_lines_sus: tlmm_lines_off {
+diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
+index 08b88f6791be..c2557cf43b3d 100644
+--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
++++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
+@@ -62,7 +62,7 @@
+ no-map;
+ };
+
+- reserved@8668000 {
++ reserved@86680000 {
+ reg = <0x0 0x86680000 0x0 0x80000>;
+ no-map;
+ };
+@@ -72,7 +72,7 @@
+ no-map;
+ };
+
+- rfsa@867e00000 {
++ rfsa@867e0000 {
+ reg = <0x0 0x867e0000 0x0 0x20000>;
+ no-map;
+ };
+@@ -715,7 +715,7 @@
+ reg-names = "mdp_phys";
+
+ interrupt-parent = <&mdss>;
+- interrupts = <0 0>;
++ interrupts = <0>;
+
+ clocks = <&gcc GCC_MDSS_AHB_CLK>,
+ <&gcc GCC_MDSS_AXI_CLK>,
+@@ -745,7 +745,7 @@
+ reg-names = "dsi_ctrl";
+
+ interrupt-parent = <&mdss>;
+- interrupts = <4 0>;
++ interrupts = <4>;
+
+ assigned-clocks = <&gcc BYTE0_CLK_SRC>,
+ <&gcc PCLK0_CLK_SRC>;
+diff --git a/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi b/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi
+index 8efb7c1948d1..7fc81cab5a87 100644
+--- a/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi
++++ b/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2017-2018, 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -134,7 +134,7 @@
+ qcom,set = ;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1200000>;
+- qcom,init-voltage = <1000000>;
++ qcom,init-voltage = <1128000>;
+ };
+ };
+
+diff --git a/arch/arm64/boot/dts/qcom/qcs605.dtsi b/arch/arm64/boot/dts/qcom/qcs605.dtsi
+index b6bc964347b1..fad4b595dcd4 100644
+--- a/arch/arm64/boot/dts/qcom/qcs605.dtsi
++++ b/arch/arm64/boot/dts/qcom/qcs605.dtsi
+@@ -435,3 +435,20 @@
+ &kgsl_smmu {
+ /delete-property/qcom,deferred-regulator-disable-delay;
+ };
++
++&usb0 {
++ qcom,core-clk-rate = <200000000>;
++ qcom,msm-bus,vectors-KBps =
++ ,
++ ,
++ ,
++ ,
++ ,
++ ;
++
++ dwc3@a600000 {
++ snps,usb3-u1u2-disable;
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/qm215.dtsi b/arch/arm64/boot/dts/qcom/qm215.dtsi
+index 172af2692918..7dfafd726aa1 100644
+--- a/arch/arm64/boot/dts/qcom/qm215.dtsi
++++ b/arch/arm64/boot/dts/qcom/qm215.dtsi
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
++ * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -258,3 +258,23 @@
+ };
+ };
+ };
++
++&other_ext_mem {
++ reg = <0x0 0x86000000 0x0 0x800000>;
++};
++
++&modem_mem {
++ reg = <0x0 0x86800000 0x0 0x4900000>;
++};
++
++&adsp_fw_mem {
++ reg = <0x0 0x8b100000 0x0 0x1100000>;
++};
++
++&wcnss_fw_mem {
++ reg = <0x0 0x8c200000 0x0 0x700000>;
++};
++
++&qcom_seecom {
++ reg = <0x86000000 0x300000>;
++};
+diff --git a/arch/arm64/boot/dts/qcom/sdm429-bg-soc.dtsi b/arch/arm64/boot/dts/qcom/sdm429-bg-soc.dtsi
+index 44bc91c73d23..7a420ffd52f1 100644
+--- a/arch/arm64/boot/dts/qcom/sdm429-bg-soc.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm429-bg-soc.dtsi
+@@ -103,6 +103,8 @@
+
+ spi_3: spi@78b7000 { /* BLSP1 QUP3*/
+ status = "ok";
++ qcom,shared_ee;
++
+ qcom,bg-spi {
+ compatible = "qcom,bg-spi";
+ reg = <0>;
+diff --git a/arch/arm64/boot/dts/qcom/sdm429-spyro.dtsi b/arch/arm64/boot/dts/qcom/sdm429-spyro.dtsi
+index d83cc5f3dd3e..68e4515aa5f4 100644
+--- a/arch/arm64/boot/dts/qcom/sdm429-spyro.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm429-spyro.dtsi
+@@ -51,4 +51,5 @@
+
+ &usb_otg {
+ qcom,enumeration-check-for-sdp;
++ qcom,hsusb-otg-mode = <1>; /* DEVICE mode */
+ };
+diff --git a/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-arglass.dtsi b/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-arglass.dtsi
+new file mode 100644
+index 000000000000..abceb23c6ed0
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-arglass.dtsi
+@@ -0,0 +1,431 @@
++/*
++ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++&soc {
++ led_flash_rear: qcom,camera-flash@0 {
++ cell-index = <0>;
++ reg = <0x00 0x00>;
++ compatible = "qcom,camera-flash";
++ flash-source = <&pm660l_flash0 &pm660l_flash1>;
++ torch-source = <&pm660l_torch0 &pm660l_torch1>;
++ switch-source = <&pm660l_switch0>;
++ status = "disabled";
++ };
++
++ led_flash_rear_aux: qcom,camera-flash@1 {
++ cell-index = <1>;
++ reg = <0x01 0x00>;
++ compatible = "qcom,camera-flash";
++ flash-source = <&pm660l_flash0 &pm660l_flash1>;
++ torch-source = <&pm660l_torch0 &pm660l_torch1>;
++ switch-source = <&pm660l_switch0>;
++ status = "disabled";
++ };
++
++ led_flash_front: qcom,camera-flash@2 {
++ cell-index = <2>;
++ reg = <0x02 0x00>;
++ compatible = "qcom,camera-flash";
++ flash-source = <&pm660l_flash2>;
++ torch-source = <&pm660l_torch2>;
++ switch-source = <&pm660l_switch1>;
++ gpios = <&tlmm 0 0>,
++ <&tlmm 1 0>,
++ <&tlmm 23 0>;
++ gpio-req-tbl-num = <0 1 2>;
++ gpio-req-tbl-flags = <0 0 0>;
++ gpio-req-tbl-label = "TCKING_LED_3V3_EN",
++ "TCKING_LED_1V2_EN",
++ "TCKing_LED_EN";
++ gpio-req-tbl-delay = <20 20 20>;
++ status = "ok";
++ };
++
++ actuator_regulator: gpio-regulator@0 {
++ compatible = "regulator-fixed";
++ reg = <0x00 0x00>;
++ regulator-name = "actuator_regulator";
++ regulator-min-microvolt = <2800000>;
++ regulator-max-microvolt = <2800000>;
++ regulator-enable-ramp-delay = <100>;
++ enable-active-high;
++ gpio = <&tlmm 27 0>;
++ status = "disabled";
++ };
++
++ camera_ldo: gpio-regulator@2 {
++ compatible = "regulator-fixed";
++ reg = <0x02 0x00>;
++ regulator-name = "camera_ldo";
++ regulator-min-microvolt = <1352000>;
++ regulator-max-microvolt = <1352000>;
++ regulator-enable-ramp-delay = <233>;
++ enable-active-high;
++ gpio = <&pm660l_gpios 3 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&camera_dvdd_en_default>;
++ vin-supply = <&pm660_s6>;
++ status = "disabled";
++ };
++
++ camera_rear_ldo: gpio-regulator@1 {
++ compatible = "regulator-fixed";
++ reg = <0x01 0x00>;
++ regulator-name = "camera_rear_ldo";
++ regulator-min-microvolt = <1352000>;
++ regulator-max-microvolt = <1352000>;
++ regulator-enable-ramp-delay = <135>;
++ enable-active-high;
++ gpio = <&pm660l_gpios 4 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&camera_rear_dvdd_en_default>;
++ vin-supply = <&pm660_s6>;
++ status = "disabled";
++ };
++
++ camera_vio_ldo: gpio-regulator@3 {
++ compatible = "regulator-fixed";
++ reg = <0x03 0x00>;
++ regulator-name = "camera_vio_ldo";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ regulator-enable-ramp-delay = <233>;
++ enable-active-high;
++ gpio = <&tlmm 29 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&cam_sensor_rear_vio>;
++ vin-supply = <&pm660_s4>;
++ status = "disabled";
++ };
++
++ camera_vana_ldo: gpio-regulator@4 {
++ compatible = "regulator-fixed";
++ reg = <0x04 0x00>;
++ regulator-name = "camera_vana_ldo";
++ regulator-min-microvolt = <2850000>;
++ regulator-max-microvolt = <2850000>;
++ regulator-enable-ramp-delay = <233>;
++ enable-active-high;
++ gpio = <&tlmm 8 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&cam_sensor_rear_vana>;
++ vin-supply = <&pm660l_bob>;
++ status = "disabled";
++ };
++};
++
++&cam_cci {
++ qcom,cam-res-mgr {
++ compatible = "qcom,cam-res-mgr";
++ status = "ok";
++ shared-gpios = <144>;
++ pinctrl-names = "cam_res_mgr_default", "cam_res_mgr_suspend";
++ pinctrl-0 = <&cam_sensor_6dof_vdig_active>;
++ pinctrl-1 = <&cam_sensor_6dof_vdig_suspend>;
++ };
++
++ actuator_rear: qcom,actuator@0 {
++ cell-index = <0>;
++ reg = <0x0>;
++ compatible = "qcom,actuator";
++ cci-master = <0>;
++ cam_vaf-supply = <&actuator_regulator>;
++ regulator-names = "cam_vaf";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <2800000>;
++ rgltr-max-voltage = <2800000>;
++ rgltr-load-current = <0>;
++ };
++
++ actuator_rear_aux: qcom,actuator@1 {
++ cell-index = <1>;
++ reg = <0x1>;
++ compatible = "qcom,actuator";
++ cci-master = <1>;
++ cam_vaf-supply = <&actuator_regulator>;
++ regulator-names = "cam_vaf";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <2800000>;
++ rgltr-max-voltage = <2800000>;
++ rgltr-load-current = <0>;
++ };
++
++ actuator_front: qcom,actuator@2 {
++ cell-index = <2>;
++ reg = <0x2>;
++ compatible = "qcom,actuator";
++ cci-master = <1>;
++ cam_vaf-supply = <&actuator_regulator>;
++ regulator-names = "cam_vaf";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <2800000>;
++ rgltr-max-voltage = <2800000>;
++ rgltr-load-current = <0>;
++ };
++
++ ois_rear: qcom,ois@0 {
++ cell-index = <0>;
++ reg = <0x0>;
++ compatible = "qcom,ois";
++ cci-master = <0>;
++ cam_vaf-supply = <&actuator_regulator>;
++ regulator-names = "cam_vaf";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <2800000>;
++ rgltr-max-voltage = <2800000>;
++ rgltr-load-current = <0>;
++ status = "disabled";
++ };
++
++ eeprom_rear: qcom,eeprom@0 {
++ cell-index = <0>;
++ reg = <0>;
++ compatible = "qcom,eeprom";
++ cam_vio-supply = <&camera_vio_ldo>;
++ cam_vana-supply = <&camera_vana_ldo>;
++ cam_vdig-supply = <&camera_rear_ldo>;
++ cam_clk-supply = <&titan_top_gdsc>;
++ cam_vaf-supply = <&actuator_regulator>;
++ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
++ "cam_clk", "cam_vaf";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <1800000 2850000 1352000 0 2800000>;
++ rgltr-max-voltage = <1800000 2850000 1352000 0 2800000>;
++ rgltr-load-current = <0 80000 105000 0 0>;
++ gpio-no-mux = <0>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk0_active
++ &cam_sensor_rear2_active>;
++ pinctrl-1 = <&cam_sensor_mclk0_suspend
++ &cam_sensor_rear2_suspend>;
++ gpios = <&tlmm 13 0>,
++ <&tlmm 28 0>;
++ gpio-reset = <1>;
++ gpio-req-tbl-num = <0 1>;
++ gpio-req-tbl-flags = <1 0>;
++ gpio-req-tbl-label = "CAMIF_MCLK0",
++ "CAM_RESET0";
++ sensor-mode = <0>;
++ cci-master = <0>;
++ status = "disabled";
++ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
++ clock-names = "cam_clk";
++ clock-cntl-level = "turbo";
++ clock-rates = <24000000>;
++ };
++
++ eeprom_rear_aux: qcom,eeprom@1 {
++ cell-index = <1>;
++ reg = <0x1>;
++ compatible = "qcom,eeprom";
++ cam_vio-supply = <&camera_vio_ldo>;
++ cam_vana-supply = <&camera_vana_ldo>;
++ cam_vdig-supply = <&camera_ldo>;
++ cam_clk-supply = <&titan_top_gdsc>;
++ cam_vaf-supply = <&actuator_regulator>;
++ regulator-names = "cam_vdig", "cam_vio", "cam_vana",
++ "cam_clk", "cam_vaf";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <1352000 1800000 2850000 0 2800000>;
++ rgltr-max-voltage = <1352000 1800000 2850000 0 2800000>;
++ rgltr-load-current = <105000 0 80000 0 0>;
++ gpio-no-mux = <0>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk1_active
++ &cam_sensor_rear2_active>;
++ pinctrl-1 = <&cam_sensor_mclk1_suspend
++ &cam_sensor_rear2_suspend>;
++ gpios = <&tlmm 14 0>,
++ <&tlmm 28 0>;
++ gpio-reset = <1>;
++ gpio-req-tbl-num = <0 1>;
++ gpio-req-tbl-flags = <1 0>;
++ gpio-req-tbl-label = "CAMIF_MCLK1",
++ "CAM_RESET1";
++ sensor-position = <0>;
++ sensor-mode = <0>;
++ cci-master = <1>;
++ status = "disabled";
++ clock-names = "cam_clk";
++ clock-cntl-level = "turbo";
++ clock-rates = <24000000>;
++ };
++
++ eeprom_front: qcom,eeprom@2 {
++ cell-index = <2>;
++ reg = <0x2>;
++ compatible = "qcom,eeprom";
++ cam_vio-supply = <&camera_vio_ldo>;
++ cam_vana-supply = <&camera_vana_ldo>;
++ cam_vdig-supply = <&camera_ldo>;
++ cam_clk-supply = <&titan_top_gdsc>;
++ cam_vaf-supply = <&actuator_regulator>;
++ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
++ "cam_clk", "cam_vaf";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <1800000 2850000 1352000 0 2800000>;
++ rgltr-max-voltage = <1800000 2850000 1352000 0 2800000>;
++ rgltr-load-current = <0 80000 105000 0 0>;
++ gpio-no-mux = <0>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk2_active
++ &cam_sensor_front_active>;
++ pinctrl-1 = <&cam_sensor_mclk2_suspend
++ &cam_sensor_front_suspend>;
++ gpios = <&tlmm 15 0>,
++ <&tlmm 9 0>;
++ gpio-reset = <1>;
++ gpio-req-tbl-num = <0 1>;
++ gpio-req-tbl-flags = <1 0>;
++ gpio-req-tbl-label = "CAMIF_MCLK2",
++ "CAM_RESET2";
++ sensor-mode = <0>;
++ cci-master = <1>;
++ status = "disabled";
++ clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
++ clock-names = "cam_clk";
++ clock-cntl-level = "turbo";
++ clock-rates = <24000000>;
++ };
++
++ /* RGB R RGB R- MCLK0(GPIO13), RESET(GPIO 27) CCI1*/
++ qcom,cam-sensor@0 {
++ cell-index = <0>;
++ compatible = "qcom,cam-sensor";
++ reg = <0x0>;
++ csiphy-sd-index = <0>;
++ sensor-position-roll = <270>;
++ sensor-position-pitch = <0>;
++ sensor-position-yaw = <180>;
++ cam_vio-supply = <&pm660_l9>;
++ cam_vana-supply = <&pm660_l16>;
++ cam_vdig-supply = <&pm660_l7>;
++ cam_clk-supply = <&titan_top_gdsc>;
++ regulator-names = "cam_vio", "cam_vana", "cam_vdig","cam_clk";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <1800000 2700000 1200000 0>;
++ rgltr-max-voltage = <1800000 2700000 1200000 0>;
++ rgltr-load-current = <150000 600000 1200000 0>;
++ gpio-no-mux = <0>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk0_active
++ &cam_sensor_rgbr_active>;
++ pinctrl-1 = <&cam_sensor_mclk0_suspend
++ &cam_sensor_rgbr_suspend>;
++ gpios = <&tlmm 13 0>,
++ <&tlmm 27 0>,
++ <&tlmm 29 0>;
++ gpio-reset = <1>;
++ gpio-vio = <2>;
++ gpio-req-tbl-num = <0 1 2>;
++ gpio-req-tbl-flags = <1 0 0>;
++ gpio-req-tbl-label = "CAMIF_MCLK",
++ "CAM_RESET",
++ "CAM_VIO";
++ sensor-mode = <0>;
++ cci-master = <1>;
++ status = "ok";
++ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
++ clock-names = "cam_clk";
++ clock-cntl-level = "turbo";
++ clock-rates = <24000000>;
++ };
++
++ /* 6DOF Left */
++ qcom,cam-sensor@1 {
++ cell-index = <1>;
++ compatible = "qcom,cam-sensor";
++ reg = <0x1>;
++ csiphy-sd-index = <1>;
++ sensor-position-roll = <270>;
++ sensor-position-pitch = <0>;
++ sensor-position-yaw = <180>;
++ cam_vio-supply = <&pm660_l11>;
++ cam_vana-supply = <&pm660l_l3>;
++ cam_vdig-supply = <&pm660_l7>;
++ cam_clk-supply = <&titan_top_gdsc>;
++ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
++ "cam_clk";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <1800000 2800000 1200000 0>;
++ rgltr-max-voltage = <1800000 2800000 1200000 0>;
++ rgltr-load-current = <300000 600000 300000 0>;
++ gpio-no-mux = <0>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk1_active
++ &cam_sensor_6dof_active>;
++ pinctrl-1 = <&cam_sensor_mclk1_suspend
++ &cam_sensor_6dof_suspend>;
++ gpios = <&tlmm 14 0>,
++ <&tlmm 24 0>,
++ <&tlmm 144 0>;
++ gpio-reset = <1>;
++ gpio-vdig = <2>;
++ gpio-req-tbl-num = <0 1 2>;
++ gpio-req-tbl-flags = <1 0 0>;
++ gpio-req-tbl-label = "CAMIF_MCLK1",
++ "CAM_RESET1",
++ "CAM_VDIG1";
++ sensor-mode = <0>;
++ cci-master = <0>;
++ status = "ok";
++ clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
++ clock-names = "cam_clk";
++ clock-cntl-level = "turbo";
++ clock-rates = <24000000>;
++ };
++
++ /* 6DOF Right */
++ qcom,cam-sensor@2 {
++ cell-index = <2>;
++ compatible = "qcom,cam-sensor";
++ reg = <0x02>;
++ csiphy-sd-index = <2>;
++ sensor-position-roll = <270>;
++ sensor-position-pitch = <0>;
++ sensor-position-yaw = <0>;
++ cam_vio-supply = <&pm660_l11>;
++ cam_vana-supply = <&pm660l_l3>;
++ cam_vdig-supply = <&pm660_l7>;
++ cam_clk-supply = <&titan_top_gdsc>;
++ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
++ "cam_clk";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <1800000 2800000 1200000 0>;
++ rgltr-max-voltage = <1800000 2800000 1200000 0>;
++ rgltr-load-current = <150000 600000 1200000 0>;
++ gpio-no-mux = <0>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk2_active
++ &cam_sensor_eyet_active>;
++ pinctrl-1 = <&cam_sensor_mclk2_suspend
++ &cam_sensor_eyet_suspend>;
++ gpios = <&tlmm 15 0>,
++ <&tlmm 25 0>,
++ <&tlmm 144 0>;
++ gpio-reset = <1>;
++ gpio-vdig = <2>;
++ gpio-req-tbl-num = <0 1 2>;
++ gpio-req-tbl-flags = <1 0 0>;
++ gpio-req-tbl-label = "CAMIF_MCLK2",
++ "CAM_RESET2",
++ "CAM_VDIG2";
++ sensor-mode = <0>;
++ cci-master = <0>;
++ status = "ok";
++ clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
++ clock-names = "cam_clk";
++ clock-cntl-level = "turbo";
++ clock-rates = <24000000>;
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-svr.dtsi b/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-svr.dtsi
+index f4aaad2a345c..34b87ff3ad6a 100644
+--- a/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-svr.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-svr.dtsi
+@@ -374,7 +374,7 @@
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1800000 2800000 1800000 0>;
+ rgltr-max-voltage = <1800000 2800000 1800000 0>;
+- rgltr-load-current = <300000 600000 300000 0>;
++ rgltr-load-current = <300000 600000 105000 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk3_active
+diff --git a/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi b/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
+index 5324581504c5..9063f1ff320f 100644
+--- a/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2017-2018, 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -725,10 +725,11 @@
+ clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>,
+ <&clock_gpucc GPU_CC_CXO_CLK>,
+ <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>,
+- <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>;
++ <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
++ <&clock_aop QDSS_CLK>;
+
+ clock-names = "gmu_clk", "cxo_clk", "axi_clk",
+- "memnoc_clk";
++ "memnoc_clk", "apb_pclk";
+
+ qcom,gmu-pwrlevels {
+ #address-cells = <1>;
+diff --git a/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi b/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
+index 9747adca69e2..0bb1d8b26c3a 100644
+--- a/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -31,6 +31,7 @@
+ #include "dsi-panel-hx8399-truly-singlemipi-fhd-video.dtsi"
+ #include "dsi-panel-hx83112a-truly-singlemipi-fhd-video.dtsi"
+ #include "dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi"
++#include "dsi-panel-arglass-boe-dual-1080p-video.dtsi"
+ #include
+
+ &soc {
+@@ -623,6 +624,26 @@
+ ibb-supply = <&lcdb_ncp_vreg>;
+ };
+
++ dsi_dual_arglass_boe_dual_1080p_video_display: qcom,dsi-display@22 {
++ compatible = "qcom,dsi-display";
++ label = "dsi_dual_arglass_boe_dual_1080p_video_display";
++ qcom,display-type = "primary";
++
++ qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
++ qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
++ clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
++ <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
++ clock-names = "mux_byte_clk", "mux_pixel_clk";
++
++ pinctrl-names = "panel_active", "panel_suspend";
++ pinctrl-0 = <&sde_dsi_active &sde_te_active>;
++ pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,dsi-panel = <&dsi_dual_arglass_boe_dual_1080p_video>;
++
++ vddio-supply = <&pm660_l13>;
++ };
++
+ sde_wb: qcom,wb-display@0 {
+ compatible = "qcom,wb-display";
+ cell-index = <0>;
+@@ -654,6 +675,28 @@
+ connectors = <&sde_rscc &sde_wb &sde_dp>;
+ };
+
++&dsi_dual_arglass_boe_dual_1080p_video {
++ qcom,mdss-dsi-t-clk-post = <0x10>;
++ qcom,mdss-dsi-t-clk-pre = <0x3D>;
++ qcom,mdss-dsi-min-refresh-rate = <60>;
++ qcom,mdss-dsi-max-refresh-rate = <90>;
++ qcom,esd-check-enabled;
++ qcom,mdss-dsi-panel-status-check-mode = "te_signal_check";
++ qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
++ qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
++ qcom,mdss-dsi-panel-status-value = <0x9c>;
++ qcom,mdss-dsi-panel-on-check-value = <0x9c>;
++ qcom,mdss-dsi-panel-status-read-length = <1>;
++ qcom,mdss-dsi-display-timings {
++ timing@0{
++ qcom,mdss-dsi-panel-phy-timings = [00 29 0A 0B 27 26
++ 0A 0B 07 02 04 00];
++ qcom,display-topology = <2 0 2>;
++ qcom,default-topology-index = <0>;
++ };
++ };
++};
++
+ &dsi_dual_xrsmrtvwr_jdi_video {
+ qcom,mdss-dsi-t-clk-post = <0x10>;
+ qcom,mdss-dsi-t-clk-pre = <0x3D>;
+diff --git a/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi b/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
+index d956c8f44307..52613085b76d 100644
+--- a/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -349,10 +349,11 @@
+ clocks = <&clock_gpucc GPU_CC_CX_GMU_CLK>,
+ <&clock_gpucc GPU_CC_CXO_CLK>,
+ <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>,
+- <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>;
++ <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
++ <&clock_aop QDSS_CLK>;
+
+ clock-names = "gmu_clk", "cxo_clk", "axi_clk",
+- "memnoc_clk";
++ "memnoc_clk", "apb_pclk";
+
+ qcom,gmu-pwrlevels {
+ #address-cells = <1>;
+diff --git a/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi b/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi
+index 7ebc146f4aa2..018e2bb2cf1f 100644
+--- a/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm845-v2.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2017-2018, 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -51,6 +51,7 @@
+ mem_client_3_size: qcom,client_3 {
+ compatible = "qcom,memshare-peripheral";
+ qcom,peripheral-size = <0x500000>;
++ memory-region = <&memshare_mem>;
+ qcom,client-id = <1>;
+ qcom,allocate-on-request;
+ label = "modem";
+diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
+index 8bc98dd5654c..03c165741808 100644
+--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
++++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -655,6 +655,14 @@
+ size = <0 0x2400000>;
+ };
+
++ memshare_mem: memshare_region {
++ compatible = "shared-dma-pool";
++ no-map;
++ alloc-ranges = <0x0 0x00000000 0x0 0xdfffffff>;
++ alignment = <0x0 0x100000>;
++ size = <0x0 0x800000>;
++ };
++
+ /* global autoconfigured region for contiguous allocations */
+ linux,cma {
+ compatible = "shared-dma-pool";
+diff --git a/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-alpha.dts b/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-alpha.dts
+index 63638fc58cba..c9d17005d8c5 100644
+--- a/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-alpha.dts
++++ b/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-alpha.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
++ * Copyright (c) 2017-2018, 2020 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -128,6 +128,8 @@
+
+ spi@78B8000 { /* BLSP1 QUP4 */
+ status = "ok";
++ qcom,shared_ee;
++
+ qcom,bg-spi {
+ compatible = "qcom,bg-spi";
+ reg = <0>;
+diff --git a/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-wtp.dts b/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-wtp.dts
+index e23d1a6e19d4..21686c3762b6 100644
+--- a/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-wtp.dts
++++ b/arch/arm64/boot/dts/qcom/sdw3100-apq8009w-wtp.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
++ * Copyright (c) 2017-2018, 2020 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -148,6 +148,8 @@
+
+ spi@78B8000 { /* BLSP1 QUP4 */
+ status = "ok";
++ qcom,shared_ee;
++
+ qcom,bg-spi {
+ compatible = "qcom,bg-spi";
+ reg = <0>;
+diff --git a/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-1gb-wtp.dts b/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-1gb-wtp.dts
+index 8d180443b087..35dae8d1e9b6 100644
+--- a/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-1gb-wtp.dts
++++ b/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-1gb-wtp.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
++ * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -149,6 +149,8 @@
+
+ spi@78B8000 { /* BLSP1 QUP4 */
+ status = "ok";
++ qcom,shared_ee;
++
+ qcom,bg-spi {
+ compatible = "qcom,bg-spi";
+ reg = <0>;
+diff --git a/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-wtp.dts b/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-wtp.dts
+index 607b3542d92d..b640e64cc77b 100644
+--- a/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-wtp.dts
++++ b/arch/arm64/boot/dts/qcom/sdw3100-msm8909w-wtp.dts
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
++ * Copyright (c) 2017-2018, 2020 The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -148,6 +148,8 @@
+
+ spi@78B8000 { /* BLSP1 QUP4 */
+ status = "ok";
++ qcom,shared_ee;
++
+ qcom,bg-spi {
+ compatible = "qcom,bg-spi";
+ reg = <0>;
+diff --git a/arch/arm64/boot/dts/qcom/sxr1130-arglass-overlay.dts b/arch/arm64/boot/dts/qcom/sxr1130-arglass-overlay.dts
+new file mode 100644
+index 000000000000..3df0ea7efa11
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/sxr1130-arglass-overlay.dts
+@@ -0,0 +1,35 @@
++/*
++ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++/dts-v1/;
++/plugin/;
++
++#include
++#include
++#include
++#include
++#include
++
++#include "sdm670-audio-overlay.dtsi"
++#include "sxr1130-arglass.dtsi"
++
++/ {
++ model = "Qualcomm Technologies, Inc. SXR1130 AR GLASS";
++ compatible = "qcom,sxr1130-arglass", "qcom,sxr1130", "qcom,xr-arglass";
++ qcom,msm-id = <371 0x0>;
++ qcom,board-id = <8 0x0B>;
++ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
++ <0x0001001b 0x0102001a 0x0 0x0>,
++ <0x0001001b 0x0201011a 0x0 0x0>;
++};
++
+diff --git a/arch/arm64/boot/dts/qcom/sxr1130-arglass-pinctrl-overlay.dtsi b/arch/arm64/boot/dts/qcom/sxr1130-arglass-pinctrl-overlay.dtsi
+new file mode 100644
+index 000000000000..9551e73a4a7a
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/sxr1130-arglass-pinctrl-overlay.dtsi
+@@ -0,0 +1,150 @@
++/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++&cam_sensor_mclk0_active {
++ /* MCLK0 */
++ mux {
++ pins = "gpio13";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio13";
++ bias-disable; /* No PULL */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&cam_sensor_mclk0_suspend {
++ /* MCLK0 */
++ mux {
++ pins = "gpio13";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio13";
++ bias-pull-down; /* PULL DOWN */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&cam_sensor_mclk1_active {
++ /* MCLK1 */
++ mux {
++ pins = "gpio14";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio14";
++ bias-disable; /* No PULL */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&cam_sensor_mclk1_suspend {
++ /* MCLK1 */
++ mux {
++ pins = "gpio14";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio14";
++ bias-pull-down; /* PULL DOWN */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&cam_sensor_mclk2_active {
++ /* MCLK2 */
++ mux {
++ pins = "gpio15";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio15";
++ bias-disable; /* No PULL */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&cam_sensor_mclk2_suspend {
++ /* MCLK2 */
++ mux {
++ pins = "gpio15";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio15";
++ bias-pull-down; /* PULL DOWN */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&cam_sensor_mclk3_active {
++ /* MCLK3 */
++ mux {
++ pins = "gpio16";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio16";
++ bias-disable; /* No PULL */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&cam_sensor_mclk3_suspend {
++ /* MCLK3 */
++ mux {
++ pins = "gpio16";
++ function = "cam_mclk";
++ };
++
++ config {
++ pins = "gpio16";
++ bias-pull-down; /* PULL DOWN */
++ drive-strength = <16>; /* 16 MA */
++ };
++};
++
++&sde_dsi_active {
++ mux {
++ pins = "gpio75", "gpio26";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio75", "gpio26";
++ bias-disable = <0>; /* PULL DOWN */
++ drive-strength = <2>; /* 2 MA */
++ };
++};
++
++&sde_dsi_suspend {
++ mux {
++ pins = "gpio75", "gpio26";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio75", "gpio26";
++ bias-pull-down; /* PULL DOWN */
++ drive-strength = <2>; /* 2 MA */
++ };
++};
++
+diff --git a/arch/arm64/boot/dts/qcom/sxr1130-arglass.dts b/arch/arm64/boot/dts/qcom/sxr1130-arglass.dts
+new file mode 100644
+index 000000000000..8b5cc580bb64
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/sxr1130-arglass.dts
+@@ -0,0 +1,72 @@
++/*
++ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++
++/dts-v1/;
++
++#include "sxr1130.dtsi"
++#include "sdm670-audio-overlay.dtsi"
++#include "sxr1130-arglass.dtsi"
++
++/ {
++ model = "Qualcomm Technologies, Inc. SXR1130 AR Glass";
++ compatible = "qcom,sxr1130-arglass", "qcom,sxr1130", "qcom,xr-arglass";
++ qcom,board-id = <8 0xB>;
++ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
++ <0x0001001b 0x0102001a 0x0 0x0>,
++ <0x0001001b 0x0201011a 0x0 0x0>;
++};
++
++&cam_cci {
++ /delete-node/ qcom,cam-sensor@1;
++ qcom,cam-sensor@1 {
++ cell-index = <1>;
++ compatible = "qcom,cam-sensor";
++ reg = <0x1>;
++ csiphy-sd-index = <1>;
++ sensor-position-roll = <90>;
++ sensor-position-pitch = <0>;
++ sensor-position-yaw = <180>;
++ eeprom-src = <&eeprom_rear_aux>;
++ cam_vio-supply = <&camera_vio_ldo>;
++ cam_vana-supply = <&camera_vana_ldo>;
++ cam_vdig-supply = <&camera_ldo>;
++ cam_clk-supply = <&titan_top_gdsc>;
++ regulator-names = "cam_vdig", "cam_vio", "cam_vana",
++ "cam_clk";
++ rgltr-cntrl-support;
++ rgltr-min-voltage = <1352000 1800000 2850000 0>;
++ rgltr-max-voltage = <1352000 1800000 2850000 0>;
++ rgltr-load-current = <105000 0 80000 0>;
++ gpio-no-mux = <0>;
++ pinctrl-names = "cam_default", "cam_suspend";
++ pinctrl-0 = <&cam_sensor_mclk0_active
++ &cam_sensor_rear2_active>;
++ pinctrl-1 = <&cam_sensor_mclk0_suspend
++ &cam_sensor_rear2_suspend>;
++ gpios = <&tlmm 13 0>,
++ <&tlmm 28 0>;
++ gpio-reset = <1>;
++ gpio-req-tbl-num = <0 1>;
++ gpio-req-tbl-flags = <1 0>;
++ gpio-req-tbl-label = "CAMIF_MCLK0",
++ "CAM_RESET1";
++ sensor-mode = <0>;
++ cci-master = <1>;
++ status = "ok";
++ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
++ clock-names = "cam_clk";
++ clock-cntl-level = "turbo";
++ clock-rates = <24000000>;
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/sxr1130-arglass.dtsi b/arch/arm64/boot/dts/qcom/sxr1130-arglass.dtsi
+new file mode 100644
+index 000000000000..7d90c5576f9f
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/sxr1130-arglass.dtsi
+@@ -0,0 +1,536 @@
++/* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 and
++ * only version 2 as published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ */
++
++#include
++#include "sxr1130-arglass-pinctrl-overlay.dtsi"
++#include "sdm670-pmic-overlay.dtsi"
++#include "sdm670-sde-display.dtsi"
++#include "sdm670-camera-sensor-arglass.dtsi"
++#include
++
++&qupv3_se10_i2c {
++#include "smb1355.dtsi"
++};
++
++&tlmm {
++ mag_rst_gpio_default: mag_rst_gpio_default {
++ mux {
++ pins = "gpio116";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio116";
++ drive-streangth = <8>;
++ bias-disable = <0>;
++ output-high;
++ };
++ };
++
++ mag_rst_gpio_sleep: mag_rst_gpio_sleep {
++ mux {
++ pins = "gpio116";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio116";
++ drive-streangth = <8>;
++ bias-pull-down;
++ input-enable;
++ };
++ };
++
++ arglass_psp_gpio: arglass_psp_gpio {
++ mux {
++ pins = "gpio78";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio78";
++ bias-disable;
++ input-enable;
++ };
++ };
++
++ arglass_pv_gpio: arglass_pv_gpio {
++ mux {
++ pins = "gpio77";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio77";
++ bias-pull-down;
++ drive-strength = <16>;
++ };
++ };
++
++ arglass_nv_gpio: arglass_nv_gpio {
++ mux {
++ pins = "gpio76";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio76";
++ bias-pull-down;
++ drive-strength = <16>;
++ };
++ };
++
++ cam_sensor_6dof_vdig_active: cam_sensor_6dof_vdig_active {
++ /* VDIG Shared GPIO */
++ mux {
++ pins = "gpio144";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio144";
++ bias-disable; /* No PULL */
++ drive-strength = <2>; /* 2 MA */
++ };
++ };
++
++ cam_sensor_6dof_vdig_suspend: cam_sensor_6dof_vdig_suspend {
++ /* VDIG Shared GPIO */
++ mux {
++ pins = "gpio144";
++ function = "gpio";
++ };
++
++ config {
++ pins = "gpio144";
++ bias-pull-down; /* PULL DOWN */
++ drive-strength = <2>; /* 2 MA */
++ output-low;
++ };
++ };
++};
++
++&ufsphy_mem {
++ compatible = "qcom,ufs-phy-qmp-v3";
++
++ vdda-phy-supply = <&pm660l_l1>; /* 0.88v */
++ vdda-pll-supply = <&pm660_l1>; /* 1.2v */
++ vdda-phy-max-microamp = <62900>;
++ vdda-pll-max-microamp = <18300>;
++
++ status = "ok";
++};
++
++&ufshc_mem {
++ vdd-hba-supply = <&ufs_phy_gdsc>;
++ vdd-hba-fixed-regulator;
++ vcc-supply = <&pm660l_l4>;
++ vcc-voltage-level = <2960000 2960000>;
++ vccq2-supply = <&pm660_l8>;
++ vcc-max-microamp = <600000>;
++ vccq2-max-microamp = <600000>;
++
++ qcom,vddp-ref-clk-supply = <&pm660_l1>;
++ qcom,vddp-ref-clk-max-microamp = <100>;
++
++ status = "ok";
++};
++
++&pm660l_switch1 {
++ pinctrl-names = "led_enable", "led_disable";
++ pinctrl-0 = <&flash_led3_front_en>;
++ pinctrl-1 = <&flash_led3_front_dis>;
++};
++
++&qupv3_se9_2uart {
++ status = "disabled";
++};
++
++&qupv3_se12_2uart {
++ status = "ok";
++};
++
++&qupv3_se8_spi {
++ status = "disabled";
++};
++
++&qupv3_se3_i2c {
++ status = "disabled";
++ nq@28 {
++ compatible = "qcom,nq-nci";
++ reg = <0x28>;
++ qcom,nq-irq = <&tlmm 44 0x00>;
++ qcom,nq-ven = <&tlmm 12 0x00>;
++ qcom,nq-firm = <&tlmm 43 0x00>;
++ qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
++ qcom,nq-esepwr = <&tlmm 116 0x00>;
++ interrupt-parent = <&tlmm>;
++ interrupts = <44 0>;
++ interrupt-names = "nfc_irq";
++ pinctrl-names = "nfc_active", "nfc_suspend";
++ pinctrl-0 = <&nfc_int_active
++ &nfc_enable_active
++ &nfc_clk_default>;
++ pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
++ };
++};
++
++&qupv3_se9_i2c {
++ status = "ok";
++};
++
++
++&qupv3_se10_i2c {
++ status = "ok";
++};
++
++&qupv3_se6_4uart {
++ status = "ok";
++};
++
++&sdhc_1 {
++ vdd-supply = <&pm660l_l4>;
++ qcom,vdd-voltage-level = <2960000 2960000>;
++ qcom,vdd-current-level = <0 570000>;
++
++ vdd-io-supply = <&pm660_l8>;
++ qcom,vdd-io-always-on;
++ qcom,vdd-io-lpm-sup;
++ qcom,vdd-io-voltage-level = <1800000 1800000>;
++ qcom,vdd-io-current-level = <0 325000>;
++
++ pinctrl-names = "active", "sleep";
++ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
++ pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
++
++ status = "ok";
++};
++
++&sdhc_2 {
++ vdd-supply = <&pm660l_l5>;
++ qcom,vdd-voltage-level = <2960000 2960000>;
++ qcom,vdd-current-level = <0 800000>;
++
++ vdd-io-supply = <&pm660l_l2>;
++ qcom,vdd-io-voltage-level = <1800000 2960000>;
++ qcom,vdd-io-current-level = <0 22000>;
++
++ pinctrl-names = "active", "sleep";
++ pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
++ pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
++
++ cd-gpios = <&tlmm 96 0x1>;
++
++ status = "disabled";
++};
++
++&vendor {
++ ar_batterydata: qcom,battery-data {
++ qcom,batt-id-range-pct = <15>;
++ #include "fg-gen3-batterydata-goertek-merlin-230mah.dtsi"
++ };
++};
++
++&pm660_fg {
++ qcom,battery-data = <&ar_batterydata>;
++};
++
++&pm660_charger {
++ qcom,battery-data = <&ar_batterydata>;
++};
++
++&tlmm {
++ smb_int_default: smb_int_default {
++ mux {
++ pins = "gpio54";
++ function = "gpio";
++ };
++ config {
++ pins = "gpio54";
++ drive-strength = <2>;
++ bias-pull-up;
++ input-enable;
++ };
++ };
++};
++
++&smb1355_0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&smb_int_default
++ &smb_shutdown_default>;
++ interrupt-parent = <&tlmm>;
++ interrupts = <54 IRQ_TYPE_LEVEL_LOW>;
++ smb1355_charger_0: qcom,smb1355-charger@1000 {
++ io-channels = <&pm660_rradc 2>,
++ <&pm660_rradc 12>;
++ io-channel-names = "charger_temp",
++ "charger_temp_max";
++ status ="ok";
++ };
++};
++
++&smb1355_1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&smb_int_default
++ &smb_shutdown_default>;
++ interrupt-parent = <&tlmm>;
++ interrupts = <54 IRQ_TYPE_LEVEL_LOW>;
++ smb1355_charger_1: qcom,smb1355-charger@1000 {
++ io-channels = <&pm660_rradc 2>,
++ <&pm660_rradc 12>;
++ io-channel-names = "charger_temp",
++ "charger_temp_max";
++ status ="ok";
++ };
++};
++
++&soc {
++ qcom,xr-smrtvwr-misc {
++ compatible = "qcom,xr-smrtvwr-misc";
++ /* Manetometer gpio */
++ mag_rst_gpio = <&tlmm 116 0>;
++ enable-active-high;
++ pinctrl-names = "default", "sleep";
++ pinctrl-0 = <&mag_rst_gpio_default>;
++ pinctrl-1 = <&mag_rst_gpio_sleep>;
++ };
++
++ rpmh-regulator-ldoa14 {
++ pm660_l14: regulator-pm660-l14 {
++ qcom,init-mode = ;
++ };
++ };
++};
++
++&dsi_dual_arglass_boe_dual_1080p_video {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <255>;
++ /*Restricting max brightness to 127 */
++ qcom,mdss-brightness-max-level = <255>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
++ qcom,platform-reset-gpio = <&tlmm 77 0>;
++ qcom,1p8-en-gpio = <&tlmm 76 0>; /*AVDD GPIO */
++ qcom,switch-power-gpio = <&tlmm 75 20>; /* AVEE GPIO */
++ qcom,led-5v-en-gpio = <&tlmm 134 0>;
++ qcom,selab-gpio = <&tlmm 105 0>;/* High for DSI */
++ qcom,oenab-gpio = <&tlmm 106 0>; /*Low for DSI */
++ qcom,led-driver-en1-gpio = <&tlmm 110 0>;
++ qcom,led-driver-en2-gpio = <&tlmm 111 0>;
++};
++
++&dsi_dual_xrsmrtvwr_jdi_video {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
++ qcom,panel-mode-gpio = <&tlmm 79 0>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,led-5v-en-gpio = <&tlmm 134 0>;
++ qcom,selab-gpio = <&tlmm 105 0>;/* High for DSI */
++ qcom,oenab-gpio = <&tlmm 106 0>; /*Low for DSI */
++ qcom,1p8-en-gpio = <&tlmm 2 0>;
++ qcom,led-driver-en1-gpio = <&tlmm 110 0>;
++ qcom,led-driver-en2-gpio = <&tlmm 111 0>;
++ qcom,switch-power-gpio = <&tlmm 112 0>;
++};
++
++
++&dsi_dual_nt35597_truly_video {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
++ qcom,panel-mode-gpio = <&tlmm 76 0>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_dual_nt35597_truly_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
++ qcom,panel-mode-gpio = <&tlmm 76 0>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,platform-te-gpio = <&tlmm 10 0>;
++};
++
++&dsi_nt35597_truly_dsc_video {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
++ qcom,panel-mode-gpio = <&tlmm 76 0>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_nt35597_truly_dsc_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
++ qcom,panel-mode-gpio = <&tlmm 76 0>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,platform-te-gpio = <&tlmm 10 0>;
++};
++
++&dsi_sim_vid {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,platform-reset-gpio = <&tlmm 90 0>;
++};
++
++&dsi_dual_sim_vid {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_sim_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_dual_sim_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_sim_dsc_375_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_dual_sim_dsc_375_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_dual_nt35597_video {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
++ qcom,panel-mode-gpio = <&tlmm 76 0>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_dual_nt35597_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
++ qcom,panel-mode-gpio = <&tlmm 76 0>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,platform-te-gpio = <&tlmm 10 0>;
++};
++
++&dsi_rm67195_amoled_fhd_cmd {
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,platform-te-gpio = <&tlmm 10 0>;
++};
++
++&dsi_nt35695b_truly_fhd_video {
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++};
++
++&dsi_nt35695b_truly_fhd_cmd {
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,platform-te-gpio = <&tlmm 10 0>;
++};
++
++&dsi_hx8399_truly_cmd {
++ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-min-level = <1>;
++ qcom,mdss-dsi-bl-max-level = <4095>;
++ qcom,platform-reset-gpio = <&tlmm 75 0>;
++ qcom,platform-te-gpio = <&tlmm 10 0>;
++ qcom,panel-mode-gpio = <&tlmm 76 0>;
++ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
++};
++
++&pm660l_wled {
++ status = "disabled";
++ qcom,led-strings-list = [01 02];
++};
++
++&mdss_mdp {
++ #cooling-cells = <2>;
++};
++
++&thermal_zones {
++ xo-therm-step {
++ status = "disabled";
++ };
++};
++
++&dsi_dual_arglass_boe_dual_1080p_video_display {
++ qcom,dsi-display-active;
++};
++
++&pm660_charger {
++ qcom,ufp-only-mode;
++ qcom,shutdown-enable;
++};
++
++&pm660_pdphy {
++ qcom,sxr1130-sxr-dp-sink;
++};
++
++&bluetooth {
++ qca,bt-disable;
++};
++
++&icnss {
++ qcom,icnss-disable;
++};
++
++&usb0 {
++ qcom,shutdown-enable;
++};
++
++&mdss_dsi_phy0 {
++ qcom,phy-supply-entries {
++ qcom,phy-supply-entry@0 {
++ qcom,supply-post-on-sleep = <20>;
++ };
++ };
++};
++
++&mdss_dsi_phy1 {
++ qcom,phy-supply-entries {
++ qcom,phy-supply-entry@0 {
++ qcom,supply-post-on-sleep = <20>;
++ };
++ };
++};
+diff --git a/arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi b/arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi
+index 16ed7648dc20..00d08fbccc14 100644
+--- a/arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi
++++ b/arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi
+@@ -1,4 +1,4 @@
+-/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
++/* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+@@ -284,7 +284,7 @@
+
+ &dsi_dual_xrsmrtvwr_jdi_video {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+- qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
+@@ -344,7 +344,7 @@
+
+ &dsi_sim_vid {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+- qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
++ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+ qcom,platform-reset-gpio = <&tlmm 90 0>;
+ };
+
+@@ -435,8 +435,7 @@
+ };
+
+ &pm660l_wled {
+- status = "okay";
+- qcom,led-strings-list = [01 02];
++ status = "disabled";
+ };
+
+ &mdss_mdp {
+@@ -532,3 +531,22 @@
+ &pm660_pdphy {
+ qcom,sxr1130-sxr-dp-sink;
+ };
++
++/*Adding delays so that display power settles down properly*/
++&mdss_dsi_phy0 {
++ qcom,phy-supply-entries {
++ qcom,phy-supply-entry@0 {
++ qcom,supply-pre-on-sleep = <40>;
++ qcom,supply-post-on-sleep = <40>;
++ };
++ };
++};
++
++&mdss_dsi_phy1 {
++ qcom,phy-supply-entries {
++ qcom,phy-supply-entry@0 {
++ qcom,supply-pre-on-sleep = <40>;
++ qcom,supply-post-on-sleep = <40>;
++ };
++ };
++};
+diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+index 7afbfb0f96a3..dd211dbdaaae 100644
+--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+@@ -65,6 +65,9 @@
+ i2c6 = &i2c6;
+ i2c7 = &i2c7;
+ i2c8 = &i2c8;
++ mmc0 = &sdio0;
++ mmc1 = &sdmmc;
++ mmc2 = &sdhci;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+index 54dc28351c8c..b9ff69798733 100644
+--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
++++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+@@ -175,7 +175,7 @@
+ };
+
+ i2c0: i2c@ff020000 {
+- compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
++ compatible = "cdns,i2c-r1p14";
+ status = "disabled";
+ interrupt-parent = <&gic>;
+ interrupts = <0 17 4>;
+@@ -185,7 +185,7 @@
+ };
+
+ i2c1: i2c@ff030000 {
+- compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
++ compatible = "cdns,i2c-r1p14";
+ status = "disabled";
+ interrupt-parent = <&gic>;
+ interrupts = <0 18 4>;
+diff --git a/arch/arm64/configs/cuttlefish_defconfig b/arch/arm64/configs/cuttlefish_defconfig
+index f1b3aa19524f..54b9b78a673d 100644
+--- a/arch/arm64/configs/cuttlefish_defconfig
++++ b/arch/arm64/configs/cuttlefish_defconfig
+@@ -16,6 +16,7 @@ CONFIG_CGROUP_CPUACCT=y
+ CONFIG_CGROUP_SCHEDTUNE=y
+ CONFIG_MEMCG=y
+ CONFIG_MEMCG_SWAP=y
++CONFIG_BLK_CGROUP=y
+ CONFIG_RT_GROUP_SCHED=y
+ CONFIG_CGROUP_BPF=y
+ CONFIG_NAMESPACES=y
+@@ -48,7 +49,6 @@ CONFIG_PCI_HOST_GENERIC=y
+ CONFIG_PREEMPT=y
+ CONFIG_HZ_100=y
+ # CONFIG_SPARSEMEM_VMEMMAP is not set
+-CONFIG_KSM=y
+ CONFIG_ZSMALLOC=y
+ CONFIG_SECCOMP=y
+ CONFIG_PARAVIRT=y
+diff --git a/arch/arm64/configs/sdm670-perf_defconfig b/arch/arm64/configs/sdm670-perf_defconfig
+index b8cf9736fe95..ceab0c9c24f9 100755
+--- a/arch/arm64/configs/sdm670-perf_defconfig
++++ b/arch/arm64/configs/sdm670-perf_defconfig
+@@ -22,7 +22,6 @@ CONFIG_CPUSETS=y
+ CONFIG_CGROUP_CPUACCT=y
+ CONFIG_CGROUP_SCHEDTUNE=y
+ CONFIG_BLK_CGROUP=y
+-CONFIG_RT_GROUP_SCHED=y
+ CONFIG_CGROUP_BPF=y
+ CONFIG_SCHED_CORE_CTL=y
+ CONFIG_NAMESPACES=y
+@@ -627,6 +626,8 @@ CONFIG_CPU_FREQ_SWITCH_PROFILER=y
+ CONFIG_DEBUG_ALIGN_RODATA=y
+ CONFIG_CORESIGHT=y
+ CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
++CONFIG_CORESIGHT_REMOTE_ETM=y
++CONFIG_CORESIGHT_REMOTE_ETM_DEFAULT_ENABLE=0
+ CONFIG_CORESIGHT_QCOM_REPLICATOR=y
+ CONFIG_CORESIGHT_STM=y
+ CONFIG_CORESIGHT_TPDA=y
+diff --git a/arch/arm64/configs/sdm670_defconfig b/arch/arm64/configs/sdm670_defconfig
+index 8c04ca5c09f5..57da388a6d88 100755
+--- a/arch/arm64/configs/sdm670_defconfig
++++ b/arch/arm64/configs/sdm670_defconfig
+@@ -24,7 +24,6 @@ CONFIG_CGROUP_CPUACCT=y
+ CONFIG_CGROUP_SCHEDTUNE=y
+ CONFIG_BLK_CGROUP=y
+ CONFIG_DEBUG_BLK_CGROUP=y
+-CONFIG_RT_GROUP_SCHED=y
+ CONFIG_CGROUP_BPF=y
+ CONFIG_SCHED_CORE_CTL=y
+ CONFIG_NAMESPACES=y
+diff --git a/arch/arm64/configs/sdm845-perf_defconfig b/arch/arm64/configs/sdm845-perf_defconfig
+index c9b3dda39168..e970e8962916 100755
+--- a/arch/arm64/configs/sdm845-perf_defconfig
++++ b/arch/arm64/configs/sdm845-perf_defconfig
+@@ -21,7 +21,6 @@ CONFIG_CGROUP_FREEZER=y
+ CONFIG_CPUSETS=y
+ CONFIG_CGROUP_CPUACCT=y
+ CONFIG_CGROUP_SCHEDTUNE=y
+-CONFIG_RT_GROUP_SCHED=y
+ CONFIG_CGROUP_BPF=y
+ CONFIG_SCHED_CORE_CTL=y
+ CONFIG_SCHED_CORE_ROTATE=y
+diff --git a/arch/arm64/configs/sdm845_defconfig b/arch/arm64/configs/sdm845_defconfig
+index 270075fed538..28d0031905e1 100644
+--- a/arch/arm64/configs/sdm845_defconfig
++++ b/arch/arm64/configs/sdm845_defconfig
+@@ -22,7 +22,6 @@ CONFIG_CGROUP_FREEZER=y
+ CONFIG_CPUSETS=y
+ CONFIG_CGROUP_CPUACCT=y
+ CONFIG_CGROUP_SCHEDTUNE=y
+-CONFIG_RT_GROUP_SCHED=y
+ CONFIG_CGROUP_BPF=y
+ CONFIG_SCHED_CORE_CTL=y
+ CONFIG_SCHED_CORE_ROTATE=y
+diff --git a/arch/arm64/include/asm/atomic_ll_sc.h b/arch/arm64/include/asm/atomic_ll_sc.h
+index f819fdcff1ac..1cc42441bc67 100644
+--- a/arch/arm64/include/asm/atomic_ll_sc.h
++++ b/arch/arm64/include/asm/atomic_ll_sc.h
+@@ -37,7 +37,7 @@
+ * (the optimize attribute silently ignores these options).
+ */
+
+-#define ATOMIC_OP(op, asm_op) \
++#define ATOMIC_OP(op, asm_op, constraint) \
+ __LL_SC_INLINE void \
+ __LL_SC_PREFIX(atomic_##op(int i, atomic_t *v)) \
+ { \
+@@ -51,11 +51,11 @@ __LL_SC_PREFIX(atomic_##op(int i, atomic_t *v)) \
+ " stxr %w1, %w0, %2\n" \
+ " cbnz %w1, 1b" \
+ : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \
+- : "Ir" (i)); \
++ : #constraint "r" (i)); \
+ } \
+ __LL_SC_EXPORT(atomic_##op);
+
+-#define ATOMIC_OP_RETURN(name, mb, acq, rel, cl, op, asm_op) \
++#define ATOMIC_OP_RETURN(name, mb, acq, rel, cl, op, asm_op, constraint)\
+ __LL_SC_INLINE int \
+ __LL_SC_PREFIX(atomic_##op##_return##name(int i, atomic_t *v)) \
+ { \
+@@ -70,14 +70,14 @@ __LL_SC_PREFIX(atomic_##op##_return##name(int i, atomic_t *v)) \
+ " cbnz %w1, 1b\n" \
+ " " #mb \
+ : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \
+- : "Ir" (i) \
++ : #constraint "r" (i) \
+ : cl); \
+ \
+ return result; \
+ } \
+ __LL_SC_EXPORT(atomic_##op##_return##name);
+
+-#define ATOMIC_FETCH_OP(name, mb, acq, rel, cl, op, asm_op) \
++#define ATOMIC_FETCH_OP(name, mb, acq, rel, cl, op, asm_op, constraint) \
+ __LL_SC_INLINE int \
+ __LL_SC_PREFIX(atomic_fetch_##op##name(int i, atomic_t *v)) \
+ { \
+@@ -92,7 +92,7 @@ __LL_SC_PREFIX(atomic_fetch_##op##name(int i, atomic_t *v)) \
+ " cbnz %w2, 1b\n" \
+ " " #mb \
+ : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Q" (v->counter) \
+- : "Ir" (i) \
++ : #constraint "r" (i) \
+ : cl); \
+ \
+ return result; \
+@@ -110,8 +110,8 @@ __LL_SC_EXPORT(atomic_fetch_##op##name);
+ ATOMIC_FETCH_OP (_acquire, , a, , "memory", __VA_ARGS__)\
+ ATOMIC_FETCH_OP (_release, , , l, "memory", __VA_ARGS__)
+
+-ATOMIC_OPS(add, add)
+-ATOMIC_OPS(sub, sub)
++ATOMIC_OPS(add, add, I)
++ATOMIC_OPS(sub, sub, J)
+
+ #undef ATOMIC_OPS
+ #define ATOMIC_OPS(...) \
+@@ -121,17 +121,17 @@ ATOMIC_OPS(sub, sub)
+ ATOMIC_FETCH_OP (_acquire, , a, , "memory", __VA_ARGS__)\
+ ATOMIC_FETCH_OP (_release, , , l, "memory", __VA_ARGS__)
+
+-ATOMIC_OPS(and, and)
+-ATOMIC_OPS(andnot, bic)
+-ATOMIC_OPS(or, orr)
+-ATOMIC_OPS(xor, eor)
++ATOMIC_OPS(and, and, )
++ATOMIC_OPS(andnot, bic, )
++ATOMIC_OPS(or, orr, )
++ATOMIC_OPS(xor, eor, )
+
+ #undef ATOMIC_OPS
+ #undef ATOMIC_FETCH_OP
+ #undef ATOMIC_OP_RETURN
+ #undef ATOMIC_OP
+
+-#define ATOMIC64_OP(op, asm_op) \
++#define ATOMIC64_OP(op, asm_op, constraint) \
+ __LL_SC_INLINE void \
+ __LL_SC_PREFIX(atomic64_##op(long i, atomic64_t *v)) \
+ { \
+@@ -145,11 +145,11 @@ __LL_SC_PREFIX(atomic64_##op(long i, atomic64_t *v)) \
+ " stxr %w1, %0, %2\n" \
+ " cbnz %w1, 1b" \
+ : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \
+- : "Ir" (i)); \
++ : #constraint "r" (i)); \
+ } \
+ __LL_SC_EXPORT(atomic64_##op);
+
+-#define ATOMIC64_OP_RETURN(name, mb, acq, rel, cl, op, asm_op) \
++#define ATOMIC64_OP_RETURN(name, mb, acq, rel, cl, op, asm_op, constraint)\
+ __LL_SC_INLINE long \
+ __LL_SC_PREFIX(atomic64_##op##_return##name(long i, atomic64_t *v)) \
+ { \
+@@ -164,14 +164,14 @@ __LL_SC_PREFIX(atomic64_##op##_return##name(long i, atomic64_t *v)) \
+ " cbnz %w1, 1b\n" \
+ " " #mb \
+ : "=&r" (result), "=&r" (tmp), "+Q" (v->counter) \
+- : "Ir" (i) \
++ : #constraint "r" (i) \
+ : cl); \
+ \
+ return result; \
+ } \
+ __LL_SC_EXPORT(atomic64_##op##_return##name);
+
+-#define ATOMIC64_FETCH_OP(name, mb, acq, rel, cl, op, asm_op) \
++#define ATOMIC64_FETCH_OP(name, mb, acq, rel, cl, op, asm_op, constraint)\
+ __LL_SC_INLINE long \
+ __LL_SC_PREFIX(atomic64_fetch_##op##name(long i, atomic64_t *v)) \
+ { \
+@@ -186,7 +186,7 @@ __LL_SC_PREFIX(atomic64_fetch_##op##name(long i, atomic64_t *v)) \
+ " cbnz %w2, 1b\n" \
+ " " #mb \
+ : "=&r" (result), "=&r" (val), "=&r" (tmp), "+Q" (v->counter) \
+- : "Ir" (i) \
++ : #constraint "r" (i) \
+ : cl); \
+ \
+ return result; \
+@@ -204,8 +204,8 @@ __LL_SC_EXPORT(atomic64_fetch_##op##name);
+ ATOMIC64_FETCH_OP (_acquire,, a, , "memory", __VA_ARGS__) \
+ ATOMIC64_FETCH_OP (_release,, , l, "memory", __VA_ARGS__)
+
+-ATOMIC64_OPS(add, add)
+-ATOMIC64_OPS(sub, sub)
++ATOMIC64_OPS(add, add, I)
++ATOMIC64_OPS(sub, sub, J)
+
+ #undef ATOMIC64_OPS
+ #define ATOMIC64_OPS(...) \
+@@ -215,10 +215,10 @@ ATOMIC64_OPS(sub, sub)
+ ATOMIC64_FETCH_OP (_acquire,, a, , "memory", __VA_ARGS__) \
+ ATOMIC64_FETCH_OP (_release,, , l, "memory", __VA_ARGS__)
+
+-ATOMIC64_OPS(and, and)
+-ATOMIC64_OPS(andnot, bic)
+-ATOMIC64_OPS(or, orr)
+-ATOMIC64_OPS(xor, eor)
++ATOMIC64_OPS(and, and, L)
++ATOMIC64_OPS(andnot, bic, )
++ATOMIC64_OPS(or, orr, L)
++ATOMIC64_OPS(xor, eor, L)
+
+ #undef ATOMIC64_OPS
+ #undef ATOMIC64_FETCH_OP
+@@ -248,49 +248,54 @@ __LL_SC_PREFIX(atomic64_dec_if_positive(atomic64_t *v))
+ }
+ __LL_SC_EXPORT(atomic64_dec_if_positive);
+
+-#define __CMPXCHG_CASE(w, sz, name, mb, acq, rel, cl) \
+-__LL_SC_INLINE unsigned long \
+-__LL_SC_PREFIX(__cmpxchg_case_##name(volatile void *ptr, \
+- unsigned long old, \
+- unsigned long new)) \
++#define __CMPXCHG_CASE(w, sfx, name, sz, mb, acq, rel, cl, constraint) \
++__LL_SC_INLINE u##sz \
++__LL_SC_PREFIX(__cmpxchg_case_##name##sz(volatile void *ptr, \
++ unsigned long old, \
++ u##sz new)) \
+ { \
+- unsigned long tmp, oldval; \
++ unsigned long tmp; \
++ u##sz oldval; \
+ \
+ asm volatile( \
+ " prfm pstl1strm, %[v]\n" \
+- "1: ld" #acq "xr" #sz "\t%" #w "[oldval], %[v]\n" \
++ "1: ld" #acq "xr" #sfx "\t%" #w "[oldval], %[v]\n" \
+ " eor %" #w "[tmp], %" #w "[oldval], %" #w "[old]\n" \
+ " cbnz %" #w "[tmp], 2f\n" \
+- " st" #rel "xr" #sz "\t%w[tmp], %" #w "[new], %[v]\n" \
++ " st" #rel "xr" #sfx "\t%w[tmp], %" #w "[new], %[v]\n" \
+ " cbnz %w[tmp], 1b\n" \
+ " " #mb "\n" \
+- " mov %" #w "[oldval], %" #w "[old]\n" \
+ "2:" \
+ : [tmp] "=&r" (tmp), [oldval] "=&r" (oldval), \
+- [v] "+Q" (*(unsigned long *)ptr) \
+- : [old] "Lr" (old), [new] "r" (new) \
++ [v] "+Q" (*(u##sz *)ptr) \
++ : [old] #constraint "r" (old), [new] "r" (new) \
+ : cl); \
+ \
+ return oldval; \
+ } \
+-__LL_SC_EXPORT(__cmpxchg_case_##name);
++__LL_SC_EXPORT(__cmpxchg_case_##name##sz);
+
+-__CMPXCHG_CASE(w, b, 1, , , , )
+-__CMPXCHG_CASE(w, h, 2, , , , )
+-__CMPXCHG_CASE(w, , 4, , , , )
+-__CMPXCHG_CASE( , , 8, , , , )
+-__CMPXCHG_CASE(w, b, acq_1, , a, , "memory")
+-__CMPXCHG_CASE(w, h, acq_2, , a, , "memory")
+-__CMPXCHG_CASE(w, , acq_4, , a, , "memory")
+-__CMPXCHG_CASE( , , acq_8, , a, , "memory")
+-__CMPXCHG_CASE(w, b, rel_1, , , l, "memory")
+-__CMPXCHG_CASE(w, h, rel_2, , , l, "memory")
+-__CMPXCHG_CASE(w, , rel_4, , , l, "memory")
+-__CMPXCHG_CASE( , , rel_8, , , l, "memory")
+-__CMPXCHG_CASE(w, b, mb_1, dmb ish, , l, "memory")
+-__CMPXCHG_CASE(w, h, mb_2, dmb ish, , l, "memory")
+-__CMPXCHG_CASE(w, , mb_4, dmb ish, , l, "memory")
+-__CMPXCHG_CASE( , , mb_8, dmb ish, , l, "memory")
++/*
++ * Earlier versions of GCC (no later than 8.1.0) appear to incorrectly
++ * handle the 'K' constraint for the value 4294967295 - thus we use no
++ * constraint for 32 bit operations.
++ */
++__CMPXCHG_CASE(w, b, , 8, , , , , )
++__CMPXCHG_CASE(w, h, , 16, , , , , )
++__CMPXCHG_CASE(w, , , 32, , , , , )
++__CMPXCHG_CASE( , , , 64, , , , , L)
++__CMPXCHG_CASE(w, b, acq_, 8, , a, , "memory", )
++__CMPXCHG_CASE(w, h, acq_, 16, , a, , "memory", )
++__CMPXCHG_CASE(w, , acq_, 32, , a, , "memory", )
++__CMPXCHG_CASE( , , acq_, 64, , a, , "memory", L)
++__CMPXCHG_CASE(w, b, rel_, 8, , , l, "memory", )
++__CMPXCHG_CASE(w, h, rel_, 16, , , l, "memory", )
++__CMPXCHG_CASE(w, , rel_, 32, , , l, "memory", )
++__CMPXCHG_CASE( , , rel_, 64, , , l, "memory", L)
++__CMPXCHG_CASE(w, b, mb_, 8, dmb ish, , l, "memory", )
++__CMPXCHG_CASE(w, h, mb_, 16, dmb ish, , l, "memory", )
++__CMPXCHG_CASE(w, , mb_, 32, dmb ish, , l, "memory", )
++__CMPXCHG_CASE( , , mb_, 64, dmb ish, , l, "memory", L)
+
+ #undef __CMPXCHG_CASE
+
+diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h
+index d32a0160c89f..982fe05e5058 100644
+--- a/arch/arm64/include/asm/atomic_lse.h
++++ b/arch/arm64/include/asm/atomic_lse.h
+@@ -446,22 +446,22 @@ static inline long atomic64_dec_if_positive(atomic64_t *v)
+
+ #define __LL_SC_CMPXCHG(op) __LL_SC_CALL(__cmpxchg_case_##op)
+
+-#define __CMPXCHG_CASE(w, sz, name, mb, cl...) \
+-static inline unsigned long __cmpxchg_case_##name(volatile void *ptr, \
+- unsigned long old, \
+- unsigned long new) \
++#define __CMPXCHG_CASE(w, sfx, name, sz, mb, cl...) \
++static inline u##sz __cmpxchg_case_##name##sz(volatile void *ptr, \
++ unsigned long old, \
++ u##sz new) \
+ { \
+ register unsigned long x0 asm ("x0") = (unsigned long)ptr; \
+ register unsigned long x1 asm ("x1") = old; \
+- register unsigned long x2 asm ("x2") = new; \
++ register u##sz x2 asm ("x2") = new; \
+ \
+ asm volatile(ARM64_LSE_ATOMIC_INSN( \
+ /* LL/SC */ \
+- __LL_SC_CMPXCHG(name) \
++ __LL_SC_CMPXCHG(name##sz) \
+ __nops(2), \
+ /* LSE atomics */ \
+ " mov " #w "30, %" #w "[old]\n" \
+- " cas" #mb #sz "\t" #w "30, %" #w "[new], %[v]\n" \
++ " cas" #mb #sfx "\t" #w "30, %" #w "[new], %[v]\n" \
+ " mov %" #w "[ret], " #w "30") \
+ : [ret] "+r" (x0), [v] "+Q" (*(unsigned long *)ptr) \
+ : [old] "r" (x1), [new] "r" (x2) \
+@@ -470,22 +470,22 @@ static inline unsigned long __cmpxchg_case_##name(volatile void *ptr, \
+ return x0; \
+ }
+
+-__CMPXCHG_CASE(w, b, 1, )
+-__CMPXCHG_CASE(w, h, 2, )
+-__CMPXCHG_CASE(w, , 4, )
+-__CMPXCHG_CASE(x, , 8, )
+-__CMPXCHG_CASE(w, b, acq_1, a, "memory")
+-__CMPXCHG_CASE(w, h, acq_2, a, "memory")
+-__CMPXCHG_CASE(w, , acq_4, a, "memory")
+-__CMPXCHG_CASE(x, , acq_8, a, "memory")
+-__CMPXCHG_CASE(w, b, rel_1, l, "memory")
+-__CMPXCHG_CASE(w, h, rel_2, l, "memory")
+-__CMPXCHG_CASE(w, , rel_4, l, "memory")
+-__CMPXCHG_CASE(x, , rel_8, l, "memory")
+-__CMPXCHG_CASE(w, b, mb_1, al, "memory")
+-__CMPXCHG_CASE(w, h, mb_2, al, "memory")
+-__CMPXCHG_CASE(w, , mb_4, al, "memory")
+-__CMPXCHG_CASE(x, , mb_8, al, "memory")
++__CMPXCHG_CASE(w, b, , 8, )
++__CMPXCHG_CASE(w, h, , 16, )
++__CMPXCHG_CASE(w, , , 32, )
++__CMPXCHG_CASE(x, , , 64, )
++__CMPXCHG_CASE(w, b, acq_, 8, a, "memory")
++__CMPXCHG_CASE(w, h, acq_, 16, a, "memory")
++__CMPXCHG_CASE(w, , acq_, 32, a, "memory")
++__CMPXCHG_CASE(x, , acq_, 64, a, "memory")
++__CMPXCHG_CASE(w, b, rel_, 8, l, "memory")
++__CMPXCHG_CASE(w, h, rel_, 16, l, "memory")
++__CMPXCHG_CASE(w, , rel_, 32, l, "memory")
++__CMPXCHG_CASE(x, , rel_, 64, l, "memory")
++__CMPXCHG_CASE(w, b, mb_, 8, al, "memory")
++__CMPXCHG_CASE(w, h, mb_, 16, al, "memory")
++__CMPXCHG_CASE(w, , mb_, 32, al, "memory")
++__CMPXCHG_CASE(x, , mb_, 64, al, "memory")
+
+ #undef __LL_SC_CMPXCHG
+ #undef __CMPXCHG_CASE
+diff --git a/arch/arm64/include/asm/checksum.h b/arch/arm64/include/asm/checksum.h
+index 09f65339d66d..e6d66c508d81 100644
+--- a/arch/arm64/include/asm/checksum.h
++++ b/arch/arm64/include/asm/checksum.h
+@@ -30,16 +30,17 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+ {
+ __uint128_t tmp;
+ u64 sum;
++ int n = ihl; /* we want it signed */
+
+ tmp = *(const __uint128_t *)iph;
+ iph += 16;
+- ihl -= 4;
++ n -= 4;
+ tmp += ((tmp >> 64) | (tmp << 64));
+ sum = tmp >> 64;
+ do {
+ sum += *(const u32 *)iph;
+ iph += 4;
+- } while (--ihl);
++ } while (--n > 0);
+
+ sum += ((sum >> 32) | (sum << 32));
+ return csum_fold(sum >> 32);
+diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
+index 9b2e2e2e728a..ed6a1aae6fbb 100644
+--- a/arch/arm64/include/asm/cmpxchg.h
++++ b/arch/arm64/include/asm/cmpxchg.h
+@@ -29,46 +29,46 @@
+ * barrier case is generated as release+dmb for the former and
+ * acquire+release for the latter.
+ */
+-#define __XCHG_CASE(w, sz, name, mb, nop_lse, acq, acq_lse, rel, cl) \
+-static inline unsigned long __xchg_case_##name(unsigned long x, \
+- volatile void *ptr) \
+-{ \
+- unsigned long ret, tmp; \
+- \
+- asm volatile(ARM64_LSE_ATOMIC_INSN( \
+- /* LL/SC */ \
+- " prfm pstl1strm, %2\n" \
+- "1: ld" #acq "xr" #sz "\t%" #w "0, %2\n" \
+- " st" #rel "xr" #sz "\t%w1, %" #w "3, %2\n" \
+- " cbnz %w1, 1b\n" \
+- " " #mb, \
+- /* LSE atomics */ \
+- " swp" #acq_lse #rel #sz "\t%" #w "3, %" #w "0, %2\n" \
+- __nops(3) \
+- " " #nop_lse) \
+- : "=&r" (ret), "=&r" (tmp), "+Q" (*(unsigned long *)ptr) \
+- : "r" (x) \
+- : cl); \
+- \
+- return ret; \
++#define __XCHG_CASE(w, sfx, name, sz, mb, nop_lse, acq, acq_lse, rel, cl) \
++static inline u##sz __xchg_case_##name##sz(u##sz x, volatile void *ptr) \
++{ \
++ u##sz ret; \
++ unsigned long tmp; \
++ \
++ asm volatile(ARM64_LSE_ATOMIC_INSN( \
++ /* LL/SC */ \
++ " prfm pstl1strm, %2\n" \
++ "1: ld" #acq "xr" #sfx "\t%" #w "0, %2\n" \
++ " st" #rel "xr" #sfx "\t%w1, %" #w "3, %2\n" \
++ " cbnz %w1, 1b\n" \
++ " " #mb, \
++ /* LSE atomics */ \
++ " swp" #acq_lse #rel #sfx "\t%" #w "3, %" #w "0, %2\n" \
++ __nops(3) \
++ " " #nop_lse) \
++ : "=&r" (ret), "=&r" (tmp), "+Q" (*(u##sz *)ptr) \
++ : "r" (x) \
++ : cl); \
++ \
++ return ret; \
+ }
+
+-__XCHG_CASE(w, b, 1, , , , , , )
+-__XCHG_CASE(w, h, 2, , , , , , )
+-__XCHG_CASE(w, , 4, , , , , , )
+-__XCHG_CASE( , , 8, , , , , , )
+-__XCHG_CASE(w, b, acq_1, , , a, a, , "memory")
+-__XCHG_CASE(w, h, acq_2, , , a, a, , "memory")
+-__XCHG_CASE(w, , acq_4, , , a, a, , "memory")
+-__XCHG_CASE( , , acq_8, , , a, a, , "memory")
+-__XCHG_CASE(w, b, rel_1, , , , , l, "memory")
+-__XCHG_CASE(w, h, rel_2, , , , , l, "memory")
+-__XCHG_CASE(w, , rel_4, , , , , l, "memory")
+-__XCHG_CASE( , , rel_8, , , , , l, "memory")
+-__XCHG_CASE(w, b, mb_1, dmb ish, nop, , a, l, "memory")
+-__XCHG_CASE(w, h, mb_2, dmb ish, nop, , a, l, "memory")
+-__XCHG_CASE(w, , mb_4, dmb ish, nop, , a, l, "memory")
+-__XCHG_CASE( , , mb_8, dmb ish, nop, , a, l, "memory")
++__XCHG_CASE(w, b, , 8, , , , , , )
++__XCHG_CASE(w, h, , 16, , , , , , )
++__XCHG_CASE(w, , , 32, , , , , , )
++__XCHG_CASE( , , , 64, , , , , , )
++__XCHG_CASE(w, b, acq_, 8, , , a, a, , "memory")
++__XCHG_CASE(w, h, acq_, 16, , , a, a, , "memory")
++__XCHG_CASE(w, , acq_, 32, , , a, a, , "memory")
++__XCHG_CASE( , , acq_, 64, , , a, a, , "memory")
++__XCHG_CASE(w, b, rel_, 8, , , , , l, "memory")
++__XCHG_CASE(w, h, rel_, 16, , , , , l, "memory")
++__XCHG_CASE(w, , rel_, 32, , , , , l, "memory")
++__XCHG_CASE( , , rel_, 64, , , , , l, "memory")
++__XCHG_CASE(w, b, mb_, 8, dmb ish, nop, , a, l, "memory")
++__XCHG_CASE(w, h, mb_, 16, dmb ish, nop, , a, l, "memory")
++__XCHG_CASE(w, , mb_, 32, dmb ish, nop, , a, l, "memory")
++__XCHG_CASE( , , mb_, 64, dmb ish, nop, , a, l, "memory")
+
+ #undef __XCHG_CASE
+
+@@ -79,13 +79,13 @@ static __always_inline unsigned long __xchg##sfx(unsigned long x, \
+ { \
+ switch (size) { \
+ case 1: \
+- return __xchg_case##sfx##_1(x, ptr); \
++ return __xchg_case##sfx##_8(x, ptr); \
+ case 2: \
+- return __xchg_case##sfx##_2(x, ptr); \
++ return __xchg_case##sfx##_16(x, ptr); \
+ case 4: \
+- return __xchg_case##sfx##_4(x, ptr); \
++ return __xchg_case##sfx##_32(x, ptr); \
+ case 8: \
+- return __xchg_case##sfx##_8(x, ptr); \
++ return __xchg_case##sfx##_64(x, ptr); \
+ default: \
+ BUILD_BUG(); \
+ } \
+@@ -122,13 +122,13 @@ static __always_inline unsigned long __cmpxchg##sfx(volatile void *ptr, \
+ { \
+ switch (size) { \
+ case 1: \
+- return __cmpxchg_case##sfx##_1(ptr, (u8)old, new); \
++ return __cmpxchg_case##sfx##_8(ptr, (u8)old, new); \
+ case 2: \
+- return __cmpxchg_case##sfx##_2(ptr, (u16)old, new); \
++ return __cmpxchg_case##sfx##_16(ptr, (u16)old, new); \
+ case 4: \
+- return __cmpxchg_case##sfx##_4(ptr, old, new); \
++ return __cmpxchg_case##sfx##_32(ptr, old, new); \
+ case 8: \
+- return __cmpxchg_case##sfx##_8(ptr, old, new); \
++ return __cmpxchg_case##sfx##_64(ptr, old, new); \
+ default: \
+ BUILD_BUG(); \
+ } \
+@@ -222,16 +222,16 @@ __CMPXCHG_GEN(_mb)
+ __ret; \
+ })
+
+-#define __CMPWAIT_CASE(w, sz, name) \
+-static inline void __cmpwait_case_##name(volatile void *ptr, \
+- unsigned long val) \
++#define __CMPWAIT_CASE(w, sfx, sz) \
++static inline void __cmpwait_case_##sz(volatile void *ptr, \
++ unsigned long val) \
+ { \
+ unsigned long tmp; \
+ \
+ asm volatile( \
+ " sevl\n" \
+ " wfe\n" \
+- " ldxr" #sz "\t%" #w "[tmp], %[v]\n" \
++ " ldxr" #sfx "\t%" #w "[tmp], %[v]\n" \
+ " eor %" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \
+ " cbnz %" #w "[tmp], 1f\n" \
+ " wfe\n" \
+@@ -240,10 +240,10 @@ static inline void __cmpwait_case_##name(volatile void *ptr, \
+ : [val] "r" (val)); \
+ }
+
+-__CMPWAIT_CASE(w, b, 1);
+-__CMPWAIT_CASE(w, h, 2);
+-__CMPWAIT_CASE(w, , 4);
+-__CMPWAIT_CASE( , , 8);
++__CMPWAIT_CASE(w, b, 8);
++__CMPWAIT_CASE(w, h, 16);
++__CMPWAIT_CASE(w, , 32);
++__CMPWAIT_CASE( , , 64);
+
+ #undef __CMPWAIT_CASE
+
+@@ -254,13 +254,13 @@ static __always_inline void __cmpwait##sfx(volatile void *ptr, \
+ { \
+ switch (size) { \
+ case 1: \
+- return __cmpwait_case##sfx##_1(ptr, (u8)val); \
++ return __cmpwait_case##sfx##_8(ptr, (u8)val); \
+ case 2: \
+- return __cmpwait_case##sfx##_2(ptr, (u16)val); \
++ return __cmpwait_case##sfx##_16(ptr, (u16)val); \
+ case 4: \
+- return __cmpwait_case##sfx##_4(ptr, val); \
++ return __cmpwait_case##sfx##_32(ptr, val); \
+ case 8: \
+- return __cmpwait_case##sfx##_8(ptr, val); \
++ return __cmpwait_case##sfx##_64(ptr, val); \
+ default: \
+ BUILD_BUG(); \
+ } \
+diff --git a/arch/arm64/include/asm/debug-monitors.h b/arch/arm64/include/asm/debug-monitors.h
+index b71420a12f26..12e2f82341b9 100644
+--- a/arch/arm64/include/asm/debug-monitors.h
++++ b/arch/arm64/include/asm/debug-monitors.h
+@@ -116,6 +116,8 @@ void disable_debug_monitors(enum dbg_active_el el);
+
+ void user_rewind_single_step(struct task_struct *task);
+ void user_fastforward_single_step(struct task_struct *task);
++void user_regs_reset_single_step(struct user_pt_regs *regs,
++ struct task_struct *task);
+
+ void kernel_enable_single_step(struct pt_regs *regs);
+ void kernel_disable_single_step(void);
+diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h
+index e69df2816ae4..6b9e92db84ad 100755
+--- a/arch/arm64/include/asm/futex.h
++++ b/arch/arm64/include/asm/futex.h
+@@ -23,26 +23,34 @@
+
+ #include
+
++#define FUTEX_MAX_LOOPS 128 /* What's the largest number you can think of? */
++
+ #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
+ do { \
++ unsigned int loops = FUTEX_MAX_LOOPS; \
+ uaccess_enable(); \
++ \
+ asm volatile( \
+ " prfm pstl1strm, %2\n" \
+ "1: ldxr %w1, %2\n" \
+ insn "\n" \
+ "2: stlxr %w0, %w3, %2\n" \
+-" cbnz %w0, 1b\n" \
+-" dmb ish\n" \
++" cbz %w0, 3f\n" \
++" sub %w4, %w4, %w0\n" \
++" cbnz %w4, 1b\n" \
++" mov %w0, %w7\n" \
+ "3:\n" \
++" dmb ish\n" \
+ " .pushsection .fixup,\"ax\"\n" \
+ " .align 2\n" \
+-"4: mov %w0, %w5\n" \
++"4: mov %w0, %w6\n" \
+ " b 3b\n" \
+ " .popsection\n" \
+ _ASM_EXTABLE(1b, 4b) \
+ _ASM_EXTABLE(2b, 4b) \
+- : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
+- : "r" (oparg), "Ir" (-EFAULT) \
++ : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp), \
++ "+r" (loops) \
++ : "r" (oparg), "Ir" (-EFAULT), "Ir" (-EAGAIN) \
+ : "memory"); \
+ uaccess_disable(); \
+ } while (0)
+@@ -56,23 +64,23 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
+
+ switch (op) {
+ case FUTEX_OP_SET:
+- __futex_atomic_op("mov %w3, %w4",
++ __futex_atomic_op("mov %w3, %w5",
+ ret, oldval, uaddr, tmp, oparg);
+ break;
+ case FUTEX_OP_ADD:
+- __futex_atomic_op("add %w3, %w1, %w4",
++ __futex_atomic_op("add %w3, %w1, %w5",
+ ret, oldval, uaddr, tmp, oparg);
+ break;
+ case FUTEX_OP_OR:
+- __futex_atomic_op("orr %w3, %w1, %w4",
++ __futex_atomic_op("orr %w3, %w1, %w5",
+ ret, oldval, uaddr, tmp, oparg);
+ break;
+ case FUTEX_OP_ANDN:
+- __futex_atomic_op("and %w3, %w1, %w4",
++ __futex_atomic_op("and %w3, %w1, %w5",
+ ret, oldval, uaddr, tmp, ~oparg);
+ break;
+ case FUTEX_OP_XOR:
+- __futex_atomic_op("eor %w3, %w1, %w4",
++ __futex_atomic_op("eor %w3, %w1, %w5",
+ ret, oldval, uaddr, tmp, oparg);
+ break;
+ default:
+@@ -92,6 +100,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *_uaddr,
+ u32 oldval, u32 newval)
+ {
+ int ret = 0;
++ unsigned int loops = FUTEX_MAX_LOOPS;
+ u32 val, tmp;
+ u32 __user *uaddr;
+
+@@ -103,20 +112,24 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *_uaddr,
+ asm volatile("// futex_atomic_cmpxchg_inatomic\n"
+ " prfm pstl1strm, %2\n"
+ "1: ldxr %w1, %2\n"
+-" sub %w3, %w1, %w4\n"
+-" cbnz %w3, 3f\n"
+-"2: stlxr %w3, %w5, %2\n"
+-" cbnz %w3, 1b\n"
+-" dmb ish\n"
++" sub %w3, %w1, %w5\n"
++" cbnz %w3, 4f\n"
++"2: stlxr %w3, %w6, %2\n"
++" cbz %w3, 3f\n"
++" sub %w4, %w4, %w3\n"
++" cbnz %w4, 1b\n"
++" mov %w0, %w8\n"
+ "3:\n"
++" dmb ish\n"
++"4:\n"
+ " .pushsection .fixup,\"ax\"\n"
+-"4: mov %w0, %w6\n"
+-" b 3b\n"
++"5: mov %w0, %w7\n"
++" b 4b\n"
+ " .popsection\n"
+- _ASM_EXTABLE(1b, 4b)
+- _ASM_EXTABLE(2b, 4b)
+- : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
+- : "r" (oldval), "r" (newval), "Ir" (-EFAULT)
++ _ASM_EXTABLE(1b, 5b)
++ _ASM_EXTABLE(2b, 5b)
++ : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp), "+r" (loops)
++ : "r" (oldval), "r" (newval), "Ir" (-EFAULT), "Ir" (-EAGAIN)
+ : "memory");
+ uaccess_disable();
+
+diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
+index a11c8c2915c9..e8cb69b0cf4f 100644
+--- a/arch/arm64/include/asm/kvm_arm.h
++++ b/arch/arm64/include/asm/kvm_arm.h
+@@ -78,10 +78,11 @@
+ * IMO: Override CPSR.I and enable signaling with VI
+ * FMO: Override CPSR.F and enable signaling with VF
+ * SWIO: Turn set/way invalidates into set/way clean+invalidate
++ * PTW: Take a stage2 fault if a stage1 walk steps in device memory
+ */
+ #define HCR_GUEST_FLAGS (HCR_TSC | HCR_TSW | HCR_TWE | HCR_TWI | HCR_VM | \
+ HCR_TVM | HCR_BSU_IS | HCR_FB | HCR_TAC | \
+- HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW)
++ HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_PTW)
+ #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
+ #define HCR_INT_OVERRIDE (HCR_FMO | HCR_IMO)
+ #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)
+diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
+index 8f5cf83b2339..3d2fddac25b9 100644
+--- a/arch/arm64/include/asm/kvm_asm.h
++++ b/arch/arm64/include/asm/kvm_asm.h
+@@ -82,6 +82,34 @@ extern u32 __init_stage2_translation(void);
+ *__hyp_this_cpu_ptr(sym); \
+ })
+
++#define __KVM_EXTABLE(from, to) \
++ " .pushsection __kvm_ex_table, \"a\"\n" \
++ " .align 3\n" \
++ " .long (" #from " - .), (" #to " - .)\n" \
++ " .popsection\n"
++
++
++#define __kvm_at(at_op, addr) \
++( { \
++ int __kvm_at_err = 0; \
++ u64 spsr, elr; \
++ asm volatile( \
++ " mrs %1, spsr_el2\n" \
++ " mrs %2, elr_el2\n" \
++ "1: at "at_op", %3\n" \
++ " isb\n" \
++ " b 9f\n" \
++ "2: msr spsr_el2, %1\n" \
++ " msr elr_el2, %2\n" \
++ " mov %w0, %4\n" \
++ "9:\n" \
++ __KVM_EXTABLE(1b, 2b) \
++ : "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \
++ : "r" (addr), "i" (-EFAULT)); \
++ __kvm_at_err; \
++} )
++
++
+ #else /* __ASSEMBLY__ */
+
+ .macro hyp_adr_this_cpu reg, sym, tmp
+@@ -106,6 +134,21 @@ extern u32 __init_stage2_translation(void);
+ kern_hyp_va \vcpu
+ .endm
+
++/*
++ * KVM extable for unexpected exceptions.
++ * In the same format _asm_extable, but output to a different section so that
++ * it can be mapped to EL2. The KVM version is not sorted. The caller must
++ * ensure:
++ * x18 has the hypervisor value to allow any Shadow-Call-Stack instrumented
++ * code to write to it, and that SPSR_EL2 and ELR_EL2 are restored by the fixup.
++ */
++.macro _kvm_extable, from, to
++ .pushsection __kvm_ex_table, "a"
++ .align 3
++ .long (\from - .), (\to - .)
++ .popsection
++.endm
++
+ #endif
+
+ #endif /* __ARM_KVM_ASM_H__ */
+diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
+index 4cdfbd01b2de..a152a7bbc85a 100644
+--- a/arch/arm64/include/asm/kvm_host.h
++++ b/arch/arm64/include/asm/kvm_host.h
+@@ -161,6 +161,7 @@ enum vcpu_sysreg {
+ #define c2_TTBR1 (TTBR1_EL1 * 2) /* Translation Table Base Register 1 */
+ #define c2_TTBR1_high (c2_TTBR1 + 1) /* TTBR1 top 32 bits */
+ #define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */
++#define c2_TTBCR2 (c2_TTBCR + 1) /* Translation Table Base Control R. 2 */
+ #define c3_DACR (DACR32_EL2 * 2)/* Domain Access Control Register */
+ #define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */
+ #define c5_IFSR (IFSR32_EL2 * 2)/* Instruction Fault Status Register */
+@@ -188,6 +189,7 @@ enum vcpu_sysreg {
+ #define cp14_DBGWCR0 (DBGWCR0_EL1 * 2)
+ #define cp14_DBGWVR0 (DBGWVR0_EL1 * 2)
+ #define cp14_DBGDCCINT (MDCCINT_EL1 * 2)
++#define cp14_DBGVCR (DBGVCR32_EL2 * 2)
+
+ #define NR_COPRO_REGS (NR_SYS_REGS * 2)
+
+@@ -290,8 +292,10 @@ struct kvm_vcpu_arch {
+ * CP14 and CP15 live in the same array, as they are backed by the
+ * same system registers.
+ */
+-#define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r)])
+-#define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r)])
++#define CPx_BIAS IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)
++
++#define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r) ^ CPx_BIAS])
++#define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r) ^ CPx_BIAS])
+
+ #ifdef CONFIG_CPU_BIG_ENDIAN
+ #define vcpu_cp15_64_high(v,r) vcpu_cp15((v),(r))
+diff --git a/arch/arm64/include/asm/numa.h b/arch/arm64/include/asm/numa.h
+index 600887e491fd..496070f97c54 100644
+--- a/arch/arm64/include/asm/numa.h
++++ b/arch/arm64/include/asm/numa.h
+@@ -25,6 +25,9 @@ const struct cpumask *cpumask_of_node(int node);
+ /* Returns a pointer to the cpumask of CPUs on Node 'node'. */
+ static inline const struct cpumask *cpumask_of_node(int node)
+ {
++ if (node == NUMA_NO_NODE)
++ return cpu_all_mask;
++
+ return node_to_cpumask_map[node];
+ }
+ #endif
+diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
+index 5bc3de78306a..94f30e6c327c 100644
+--- a/arch/arm64/include/asm/pgtable-prot.h
++++ b/arch/arm64/include/asm/pgtable-prot.h
+@@ -65,7 +65,7 @@
+ #define PAGE_HYP __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN)
+ #define PAGE_HYP_EXEC __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY)
+ #define PAGE_HYP_RO __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN)
+-#define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
++#define PAGE_HYP_DEVICE __pgprot(_PROT_DEFAULT | PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_HYP | PTE_HYP_XN)
+
+ #define PAGE_S2 __pgprot(_PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
+ #define PAGE_S2_DEVICE __pgprot(_PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
+diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
+index d0eeb96c8407..46e95557b8c2 100644
+--- a/arch/arm64/include/asm/pgtable.h
++++ b/arch/arm64/include/asm/pgtable.h
+@@ -86,8 +86,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
+ #define pte_valid(pte) (!!(pte_val(pte) & PTE_VALID))
+ #define pte_valid_not_user(pte) \
+ ((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
+-#define pte_valid_young(pte) \
+- ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
+ #define pte_valid_user(pte) \
+ ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
+
+@@ -95,9 +93,12 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
+ * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
+ * so that we don't erroneously return false for pages that have been
+ * remapped as PROT_NONE but are yet to be flushed from the TLB.
++ * Note that we can't make any assumptions based on the state of the access
++ * flag, since ptep_clear_flush_young() elides a DSB when invalidating the
++ * TLB.
+ */
+ #define pte_accessible(mm, pte) \
+- (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
++ (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte))
+
+ /*
+ * p??_access_permitted() is true for valid user mappings (subject to the
+diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c
+index 9f1adca3c346..3101d1b61713 100644
+--- a/arch/arm64/kernel/debug-monitors.c
++++ b/arch/arm64/kernel/debug-monitors.c
+@@ -149,17 +149,20 @@ postcore_initcall(debug_monitors_init);
+ /*
+ * Single step API and exception handling.
+ */
+-static void set_regs_spsr_ss(struct pt_regs *regs)
++static void set_user_regs_spsr_ss(struct user_pt_regs *regs)
+ {
+ regs->pstate |= DBG_SPSR_SS;
+ }
+-NOKPROBE_SYMBOL(set_regs_spsr_ss);
++NOKPROBE_SYMBOL(set_user_regs_spsr_ss);
+
+-static void clear_regs_spsr_ss(struct pt_regs *regs)
++static void clear_user_regs_spsr_ss(struct user_pt_regs *regs)
+ {
+ regs->pstate &= ~DBG_SPSR_SS;
+ }
+-NOKPROBE_SYMBOL(clear_regs_spsr_ss);
++NOKPROBE_SYMBOL(clear_user_regs_spsr_ss);
++
++#define set_regs_spsr_ss(r) set_user_regs_spsr_ss(&(r)->user_regs)
++#define clear_regs_spsr_ss(r) clear_user_regs_spsr_ss(&(r)->user_regs)
+
+ /* EL1 Single Step Handler hooks */
+ static LIST_HEAD(step_hook);
+@@ -377,17 +380,26 @@ void user_rewind_single_step(struct task_struct *task)
+ * If single step is active for this thread, then set SPSR.SS
+ * to 1 to avoid returning to the active-pending state.
+ */
+- if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
++ if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
+ set_regs_spsr_ss(task_pt_regs(task));
+ }
+ NOKPROBE_SYMBOL(user_rewind_single_step);
+
+ void user_fastforward_single_step(struct task_struct *task)
+ {
+- if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
++ if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
+ clear_regs_spsr_ss(task_pt_regs(task));
+ }
+
++void user_regs_reset_single_step(struct user_pt_regs *regs,
++ struct task_struct *task)
++{
++ if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
++ set_user_regs_spsr_ss(regs);
++ else
++ clear_user_regs_spsr_ss(regs);
++}
++
+ /* Kernel API */
+ void kernel_enable_single_step(struct pt_regs *regs)
+ {
+diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
+index 9c32d0eab888..a064aa18fecb 100644
+--- a/arch/arm64/kernel/head.S
++++ b/arch/arm64/kernel/head.S
+@@ -847,6 +847,7 @@ __primary_switch:
+
+ tlbi vmalle1 // Remove any stale TLB entries
+ dsb nsh
++ isb
+
+ msr sctlr_el1, x19 // re-enable the MMU
+ isb
+diff --git a/arch/arm64/kernel/kgdb.c b/arch/arm64/kernel/kgdb.c
+index 72a660a74ff9..44d757308e47 100644
+--- a/arch/arm64/kernel/kgdb.c
++++ b/arch/arm64/kernel/kgdb.c
+@@ -256,7 +256,7 @@ static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned int esr)
+ if (user_mode(regs))
+ return DBG_HOOK_ERROR;
+
+- kgdb_handle_exception(1, SIGTRAP, 0, regs);
++ kgdb_handle_exception(0, SIGTRAP, 0, regs);
+ return DBG_HOOK_HANDLED;
+ }
+ NOKPROBE_SYMBOL(kgdb_step_brk_fn);
+diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
+index 64b892d9c7cd..e6f2efd67513 100644
+--- a/arch/arm64/kernel/perf_event.c
++++ b/arch/arm64/kernel/perf_event.c
+@@ -750,6 +750,28 @@ static void armv8pmu_disable_event(struct perf_event *event)
+ raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
+ }
+
++static void armv8pmu_start(struct arm_pmu *cpu_pmu)
++{
++ unsigned long flags;
++ struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
++
++ raw_spin_lock_irqsave(&events->pmu_lock, flags);
++ /* Enable all counters */
++ armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E);
++ raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
++}
++
++static void armv8pmu_stop(struct arm_pmu *cpu_pmu)
++{
++ unsigned long flags;
++ struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
++
++ raw_spin_lock_irqsave(&events->pmu_lock, flags);
++ /* Disable all counters */
++ armv8pmu_pmcr_write(armv8pmu_pmcr_read() & ~ARMV8_PMU_PMCR_E);
++ raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
++}
++
+ static irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev)
+ {
+ u32 pmovsr;
+@@ -775,6 +797,11 @@ static irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev)
+ */
+ regs = get_irq_regs();
+
++ /*
++ * Stop the PMU while processing the counter overflows
++ * to prevent skews in group events.
++ */
++ armv8pmu_stop(cpu_pmu);
+ for (idx = 0; idx < cpu_pmu->num_events; ++idx) {
+ struct perf_event *event = cpuc->events[idx];
+ struct hw_perf_event *hwc;
+@@ -799,6 +826,7 @@ static irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev)
+ if (perf_event_overflow(event, &data, regs))
+ cpu_pmu->disable(event);
+ }
++ armv8pmu_start(cpu_pmu);
+
+ /*
+ * Handle the pending perf events.
+@@ -812,28 +840,6 @@ static irqreturn_t armv8pmu_handle_irq(int irq_num, void *dev)
+ return IRQ_HANDLED;
+ }
+
+-static void armv8pmu_start(struct arm_pmu *cpu_pmu)
+-{
+- unsigned long flags;
+- struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
+-
+- raw_spin_lock_irqsave(&events->pmu_lock, flags);
+- /* Enable all counters */
+- armv8pmu_pmcr_write(armv8pmu_pmcr_read() | ARMV8_PMU_PMCR_E);
+- raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
+-}
+-
+-static void armv8pmu_stop(struct arm_pmu *cpu_pmu)
+-{
+- unsigned long flags;
+- struct pmu_hw_events *events = this_cpu_ptr(cpu_pmu->hw_events);
+-
+- raw_spin_lock_irqsave(&events->pmu_lock, flags);
+- /* Disable all counters */
+- armv8pmu_pmcr_write(armv8pmu_pmcr_read() & ~ARMV8_PMU_PMCR_E);
+- raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
+-}
+-
+ static int armv8pmu_get_event_idx(struct pmu_hw_events *cpuc,
+ struct perf_event *event)
+ {
+diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c
+index 3f62b35fb6f1..815c395a1076 100644
+--- a/arch/arm64/kernel/perf_regs.c
++++ b/arch/arm64/kernel/perf_regs.c
+@@ -13,15 +13,34 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
+ return 0;
+
+ /*
+- * Compat (i.e. 32 bit) mode:
+- * - PC has been set in the pt_regs struct in kernel_entry,
+- * - Handle SP and LR here.
++ * Our handling of compat tasks (PERF_SAMPLE_REGS_ABI_32) is weird, but
++ * we're stuck with it for ABI compatability reasons.
++ *
++ * For a 32-bit consumer inspecting a 32-bit task, then it will look at
++ * the first 16 registers (see arch/arm/include/uapi/asm/perf_regs.h).
++ * These correspond directly to a prefix of the registers saved in our
++ * 'struct pt_regs', with the exception of the PC, so we copy that down
++ * (x15 corresponds to SP_hyp in the architecture).
++ *
++ * So far, so good.
++ *
++ * The oddity arises when a 64-bit consumer looks at a 32-bit task and
++ * asks for registers beyond PERF_REG_ARM_MAX. In this case, we return
++ * SP_usr, LR_usr and PC in the positions where the AArch64 SP, LR and
++ * PC registers would normally live. The initial idea was to allow a
++ * 64-bit unwinder to unwind a 32-bit task and, although it's not clear
++ * how well that works in practice, somebody might be relying on it.
++ *
++ * At the time we make a sample, we don't know whether the consumer is
++ * 32-bit or 64-bit, so we have to cater for both possibilities.
+ */
+ if (compat_user_mode(regs)) {
+ if ((u32)idx == PERF_REG_ARM64_SP)
+ return regs->compat_sp;
+ if ((u32)idx == PERF_REG_ARM64_LR)
+ return regs->compat_lr;
++ if (idx == 15)
++ return regs->pc;
+ }
+
+ if ((u32)idx == PERF_REG_ARM64_SP)
+diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
+index 35e0e6464e62..884b8d5b1cdf 100755
+--- a/arch/arm64/kernel/psci.c
++++ b/arch/arm64/kernel/psci.c
+@@ -69,7 +69,6 @@ static int cpu_psci_cpu_disable(unsigned int cpu)
+
+ static void cpu_psci_cpu_die(unsigned int cpu)
+ {
+- int ret;
+ /*
+ * There are no known implementations of PSCI actually using the
+ * power state field, pass a sensible default for now.
+@@ -77,9 +76,7 @@ static void cpu_psci_cpu_die(unsigned int cpu)
+ u32 state = PSCI_POWER_STATE_TYPE_POWER_DOWN <<
+ PSCI_0_2_POWER_STATE_TYPE_SHIFT;
+
+- ret = psci_ops.cpu_off(state);
+-
+- pr_crit("unable to power off CPU%u (%d)\n", cpu, ret);
++ psci_ops.cpu_off(state);
+ }
+
+ static int cpu_psci_cpu_kill(unsigned int cpu)
+diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
+index a22161ccf447..7990377dbbbc 100644
+--- a/arch/arm64/kernel/ptrace.c
++++ b/arch/arm64/kernel/ptrace.c
+@@ -1448,8 +1448,8 @@ static int valid_native_regs(struct user_pt_regs *regs)
+ */
+ int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
+ {
+- if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
+- regs->pstate &= ~DBG_SPSR_SS;
++ /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */
++ user_regs_reset_single_step(regs, task);
+
+ if (is_compat_thread(task_thread_info(task)))
+ return valid_compat_regs(regs);
+diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
+index e5733cbd0c84..e8c9fe3753a2 100755
+--- a/arch/arm64/kernel/traps.c
++++ b/arch/arm64/kernel/traps.c
+@@ -737,14 +737,6 @@ asmlinkage long do_ni_syscall(struct pt_regs *regs)
+ }
+ #endif
+
+- if (show_unhandled_signals_ratelimited()) {
+- pr_info("%s[%d]: syscall %d\n", current->comm,
+- task_pid_nr(current), (int)regs->syscallno);
+- dump_instr("", regs);
+- if (user_mode(regs))
+- __show_regs(regs);
+- }
+-
+ return sys_ni_syscall();
+ }
+
+diff --git a/arch/arm64/kernel/vdso/vdso.lds.S b/arch/arm64/kernel/vdso/vdso.lds.S
+index beca249bc2f3..b3e6c4d5b75c 100644
+--- a/arch/arm64/kernel/vdso/vdso.lds.S
++++ b/arch/arm64/kernel/vdso/vdso.lds.S
+@@ -39,6 +39,13 @@ SECTIONS
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+
++ /*
++ * Discard .note.gnu.property sections which are unused and have
++ * different alignment requirement from vDSO note sections.
++ */
++ /DISCARD/ : {
++ *(.note.GNU-stack .note.gnu.property)
++ }
+ .note : { *(.note.*) } :text :note
+
+ . = ALIGN(16);
+@@ -59,7 +66,6 @@ SECTIONS
+ PROVIDE(end = .);
+
+ /DISCARD/ : {
+- *(.note.GNU-stack)
+ *(.data .data.* .gnu.linkonce.d.* .sdata*)
+ *(.bss .sbss .dynbss .dynsbss)
+ }
+diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
+index 402a62165d40..ad1142a7780c 100644
+--- a/arch/arm64/kernel/vmlinux.lds.S
++++ b/arch/arm64/kernel/vmlinux.lds.S
+@@ -23,6 +23,13 @@ ENTRY(_text)
+
+ jiffies = jiffies_64;
+
++
++#define HYPERVISOR_EXTABLE \
++ . = ALIGN(SZ_8); \
++ VMLINUX_SYMBOL(__start___kvm_ex_table) = .; \
++ *(__kvm_ex_table) \
++ VMLINUX_SYMBOL(__stop___kvm_ex_table) = .;
++
+ #define HYPERVISOR_TEXT \
+ /* \
+ * Align to 4 KB so that \
+@@ -38,6 +45,7 @@ jiffies = jiffies_64;
+ VMLINUX_SYMBOL(__hyp_idmap_text_end) = .; \
+ VMLINUX_SYMBOL(__hyp_text_start) = .; \
+ *(.hyp.text) \
++ HYPERVISOR_EXTABLE \
+ VMLINUX_SYMBOL(__hyp_text_end) = .;
+
+ #define IDMAP_TEXT \
+diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S
+index a360ac6e89e9..4e0eac361f87 100644
+--- a/arch/arm64/kvm/hyp/entry.S
++++ b/arch/arm64/kvm/hyp/entry.S
+@@ -17,6 +17,7 @@
+
+ #include
+
++#include
+ #include
+ #include
+ #include
+@@ -62,6 +63,15 @@ ENTRY(__guest_enter)
+ // Store the host regs
+ save_callee_saved_regs x1
+
++ // Now the host state is stored if we have a pending RAS SError it must
++ // affect the host. If any asynchronous exception is pending we defer
++ // the guest entry.
++ mrs x1, isr_el1
++ cbz x1, 1f
++ mov x0, #ARM_EXCEPTION_IRQ
++ ret
++
++1:
+ add x18, x0, #VCPU_CONTEXT
+
+ // Restore guest regs x0-x17
+@@ -135,18 +145,22 @@ ENTRY(__guest_exit)
+ // This is our single instruction exception window. A pending
+ // SError is guaranteed to occur at the earliest when we unmask
+ // it, and at the latest just after the ISB.
+- .global abort_guest_exit_start
+ abort_guest_exit_start:
+
+ isb
+
+- .global abort_guest_exit_end
+ abort_guest_exit_end:
++ msr daifset, #4 // Mask aborts
++ ret
++
++ _kvm_extable abort_guest_exit_start, 9997f
++ _kvm_extable abort_guest_exit_end, 9997f
++9997:
++ msr daifset, #4 // Mask aborts
++ mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
+
+- // If the exception took place, restore the EL1 exception
+- // context so that we can report some information.
+- // Merge the exception code with the SError pending bit.
+- tbz x0, #ARM_EXIT_WITH_SERROR_BIT, 1f
++ // restore the EL1 exception context so that we can report some
++ // information. Merge the exception code with the SError pending bit.
+ msr elr_el2, x2
+ msr esr_el2, x3
+ msr spsr_el2, x4
+diff --git a/arch/arm64/kvm/hyp/hyp-entry.S b/arch/arm64/kvm/hyp/hyp-entry.S
+index bf4988f9dae8..7ced1fb93d07 100644
+--- a/arch/arm64/kvm/hyp/hyp-entry.S
++++ b/arch/arm64/kvm/hyp/hyp-entry.S
+@@ -25,6 +25,30 @@
+ #include
+ #include
+
++.macro save_caller_saved_regs_vect
++ stp x0, x1, [sp, #-16]!
++ stp x2, x3, [sp, #-16]!
++ stp x4, x5, [sp, #-16]!
++ stp x6, x7, [sp, #-16]!
++ stp x8, x9, [sp, #-16]!
++ stp x10, x11, [sp, #-16]!
++ stp x12, x13, [sp, #-16]!
++ stp x14, x15, [sp, #-16]!
++ stp x16, x17, [sp, #-16]!
++.endm
++
++.macro restore_caller_saved_regs_vect
++ ldp x16, x17, [sp], #16
++ ldp x14, x15, [sp], #16
++ ldp x12, x13, [sp], #16
++ ldp x10, x11, [sp], #16
++ ldp x8, x9, [sp], #16
++ ldp x6, x7, [sp], #16
++ ldp x4, x5, [sp], #16
++ ldp x2, x3, [sp], #16
++ ldp x0, x1, [sp], #16
++.endm
++
+ .text
+ .pushsection .hyp.text, "ax"
+
+@@ -177,26 +201,24 @@ el1_error:
+ mov x0, #ARM_EXCEPTION_EL1_SERROR
+ b __guest_exit
+
++el2_sync:
++ save_caller_saved_regs_vect
++ stp x29, x30, [sp, #-16]!
++ bl kvm_unexpected_el2_exception
++ ldp x29, x30, [sp], #16
++ restore_caller_saved_regs_vect
++
++ eret
++
+ el2_error:
+- /*
+- * Only two possibilities:
+- * 1) Either we come from the exit path, having just unmasked
+- * PSTATE.A: change the return code to an EL2 fault, and
+- * carry on, as we're already in a sane state to handle it.
+- * 2) Or we come from anywhere else, and that's a bug: we panic.
+- *
+- * For (1), x0 contains the original return code and x1 doesn't
+- * contain anything meaningful at that stage. We can reuse them
+- * as temp registers.
+- * For (2), who cares?
+- */
+- mrs x0, elr_el2
+- adr x1, abort_guest_exit_start
+- cmp x0, x1
+- adr x1, abort_guest_exit_end
+- ccmp x0, x1, #4, ne
+- b.ne __hyp_panic
+- mov x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
++ save_caller_saved_regs_vect
++ stp x29, x30, [sp, #-16]!
++
++ bl kvm_unexpected_el2_exception
++
++ ldp x29, x30, [sp], #16
++ restore_caller_saved_regs_vect
++
+ eret
+
+ ENTRY(__hyp_do_panic)
+@@ -225,7 +247,6 @@ ENDPROC(\label)
+ invalid_vector el2t_irq_invalid
+ invalid_vector el2t_fiq_invalid
+ invalid_vector el2t_error_invalid
+- invalid_vector el2h_sync_invalid
+ invalid_vector el2h_irq_invalid
+ invalid_vector el2h_fiq_invalid
+ invalid_vector el1_sync_invalid
+@@ -242,7 +263,7 @@ ENTRY(__kvm_hyp_vector)
+ ventry el2t_fiq_invalid // FIQ EL2t
+ ventry el2t_error_invalid // Error EL2t
+
+- ventry el2h_sync_invalid // Synchronous EL2h
++ ventry el2_sync // Synchronous EL2h
+ ventry el2h_irq_invalid // IRQ EL2h
+ ventry el2h_fiq_invalid // FIQ EL2h
+ ventry el2_error // Error EL2h
+diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
+index 993d7ad96acd..37b3fd8137e1 100644
+--- a/arch/arm64/kvm/hyp/switch.c
++++ b/arch/arm64/kvm/hyp/switch.c
+@@ -25,6 +25,10 @@
+ #include
+ #include
+ #include
++#include
++
++extern struct exception_table_entry __start___kvm_ex_table;
++extern struct exception_table_entry __stop___kvm_ex_table;
+
+ static bool __hyp_text __fpsimd_enabled_nvhe(void)
+ {
+@@ -202,10 +206,10 @@ static bool __hyp_text __translate_far_to_hpfar(u64 far, u64 *hpfar)
+ * saved the guest context yet, and we may return early...
+ */
+ par = read_sysreg(par_el1);
+- asm volatile("at s1e1r, %0" : : "r" (far));
+- isb();
+-
+- tmp = read_sysreg(par_el1);
++ if (!__kvm_at("s1e1r", far))
++ tmp = read_sysreg(par_el1);
++ else
++ tmp = 1; /* back to the guest */
+ write_sysreg(par, par_el1);
+
+ if (unlikely(tmp & 1))
+@@ -426,7 +430,7 @@ static void __hyp_text __hyp_call_panic_nvhe(u64 spsr, u64 elr, u64 par,
+ * making sure it is a kernel address and not a PC-relative
+ * reference.
+ */
+- asm volatile("ldr %0, =__hyp_panic_string" : "=r" (str_va));
++ asm volatile("ldr %0, =%1" : "=r" (str_va) : "S" (__hyp_panic_string));
+
+ __hyp_do_panic(str_va,
+ spsr, elr,
+@@ -468,3 +472,30 @@ void __hyp_text __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt)
+
+ unreachable();
+ }
++
++asmlinkage void __hyp_text kvm_unexpected_el2_exception(void)
++{
++ unsigned long addr, fixup;
++ struct kvm_cpu_context *host_ctxt;
++ struct exception_table_entry *entry, *end;
++ unsigned long elr_el2 = read_sysreg(elr_el2);
++
++ entry = hyp_symbol_addr(__start___kvm_ex_table);
++ end = hyp_symbol_addr(__stop___kvm_ex_table);
++ host_ctxt = __hyp_this_cpu_ptr(kvm_host_cpu_state);
++
++ while (entry < end) {
++ addr = (unsigned long)&entry->insn + entry->insn;
++ fixup = (unsigned long)&entry->fixup + entry->fixup;
++
++ if (addr != elr_el2) {
++ entry++;
++ continue;
++ }
++
++ write_sysreg(fixup, elr_el2);
++ return;
++ }
++
++ hyp_panic(host_ctxt);
++}
+diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
+index 7cee552ce0bf..10d80456f38f 100644
+--- a/arch/arm64/kvm/sys_regs.c
++++ b/arch/arm64/kvm/sys_regs.c
+@@ -450,6 +450,10 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
+ {
+ u64 pmcr, val;
+
++ /* No PMU available, PMCR_EL0 may UNDEF... */
++ if (!kvm_arm_support_pmu_v3())
++ return;
++
+ pmcr = read_sysreg(pmcr_el0);
+ /*
+ * Writable bits of PMCR_EL0 (ARMV8_PMU_PMCR_MASK) are reset to UNKNOWN
+@@ -1207,9 +1211,9 @@ static const struct sys_reg_desc cp14_regs[] = {
+ { Op1( 0), CRn( 0), CRm( 1), Op2( 0), trap_raz_wi },
+ DBG_BCR_BVR_WCR_WVR(1),
+ /* DBGDCCINT */
+- { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug32 },
++ { Op1( 0), CRn( 0), CRm( 2), Op2( 0), trap_debug32, NULL, cp14_DBGDCCINT },
+ /* DBGDSCRext */
+- { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug32 },
++ { Op1( 0), CRn( 0), CRm( 2), Op2( 2), trap_debug32, NULL, cp14_DBGDSCRext },
+ DBG_BCR_BVR_WCR_WVR(2),
+ /* DBGDTR[RT]Xint */
+ { Op1( 0), CRn( 0), CRm( 3), Op2( 0), trap_raz_wi },
+@@ -1224,7 +1228,7 @@ static const struct sys_reg_desc cp14_regs[] = {
+ { Op1( 0), CRn( 0), CRm( 6), Op2( 2), trap_raz_wi },
+ DBG_BCR_BVR_WCR_WVR(6),
+ /* DBGVCR */
+- { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug32 },
++ { Op1( 0), CRn( 0), CRm( 7), Op2( 0), trap_debug32, NULL, cp14_DBGVCR },
+ DBG_BCR_BVR_WCR_WVR(7),
+ DBG_BCR_BVR_WCR_WVR(8),
+ DBG_BCR_BVR_WCR_WVR(9),
+@@ -1315,6 +1319,7 @@ static const struct sys_reg_desc cp15_regs[] = {
+ { Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, c2_TTBR0 },
+ { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, c2_TTBR1 },
+ { Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, c2_TTBCR },
++ { Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, c2_TTBCR2 },
+ { Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, c3_DACR },
+ { Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR },
+ { Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, c5_IFSR },
+diff --git a/arch/arm64/mm/numa.c b/arch/arm64/mm/numa.c
+index b1e42bad69ac..fddae9b8e1bf 100644
+--- a/arch/arm64/mm/numa.c
++++ b/arch/arm64/mm/numa.c
+@@ -58,7 +58,11 @@ EXPORT_SYMBOL(node_to_cpumask_map);
+ */
+ const struct cpumask *cpumask_of_node(int node)
+ {
+- if (WARN_ON(node >= nr_node_ids))
++
++ if (node == NUMA_NO_NODE)
++ return cpu_all_mask;
++
++ if (WARN_ON(node < 0 || node >= nr_node_ids))
+ return cpu_none_mask;
+
+ if (WARN_ON(node_to_cpumask_map[node] == NULL))
+diff --git a/arch/h8300/kernel/asm-offsets.c b/arch/h8300/kernel/asm-offsets.c
+index dc2d16ce8a0d..3e33a9844d99 100644
+--- a/arch/h8300/kernel/asm-offsets.c
++++ b/arch/h8300/kernel/asm-offsets.c
+@@ -62,6 +62,9 @@ int main(void)
+ OFFSET(TI_FLAGS, thread_info, flags);
+ OFFSET(TI_CPU, thread_info, cpu);
+ OFFSET(TI_PRE, thread_info, preempt_count);
++#ifdef CONFIG_PREEMPTION
++ DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
++#endif
+
+ return 0;
+ }
+diff --git a/arch/hexagon/kernel/vmlinux.lds.S b/arch/hexagon/kernel/vmlinux.lds.S
+index ec87e67feb19..22c10102712a 100644
+--- a/arch/hexagon/kernel/vmlinux.lds.S
++++ b/arch/hexagon/kernel/vmlinux.lds.S
+@@ -71,13 +71,8 @@ SECTIONS
+
+ _end = .;
+
+- /DISCARD/ : {
+- EXIT_TEXT
+- EXIT_DATA
+- EXIT_CALL
+- }
+-
+ STABS_DEBUG
+ DWARF_DEBUG
+
++ DISCARDS
+ }
+diff --git a/arch/ia64/include/asm/ptrace.h b/arch/ia64/include/asm/ptrace.h
+index 845143990a1d..9d3d4fb87a7a 100644
+--- a/arch/ia64/include/asm/ptrace.h
++++ b/arch/ia64/include/asm/ptrace.h
+@@ -53,8 +53,7 @@
+
+ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
+ {
+- /* FIXME: should this be bspstore + nr_dirty regs? */
+- return regs->ar_bspstore;
++ return regs->r12;
+ }
+
+ static inline int is_syscall_success(struct pt_regs *regs)
+@@ -78,11 +77,6 @@ static inline long regs_return_value(struct pt_regs *regs)
+ unsigned long __ip = instruction_pointer(regs); \
+ (__ip & ~3UL) + ((__ip & 3UL) << 2); \
+ })
+-/*
+- * Why not default? Because user_stack_pointer() on ia64 gives register
+- * stack backing store instead...
+- */
+-#define current_user_stack_pointer() (current_pt_regs()->r12)
+
+ /* given a pointer to a task_struct, return the user's pt_regs */
+ # define task_pt_regs(t) (((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1)
+diff --git a/arch/ia64/include/asm/syscall.h b/arch/ia64/include/asm/syscall.h
+index 1d0b875fec44..ec909eec0b4c 100644
+--- a/arch/ia64/include/asm/syscall.h
++++ b/arch/ia64/include/asm/syscall.h
+@@ -35,7 +35,7 @@ static inline void syscall_rollback(struct task_struct *task,
+ static inline long syscall_get_error(struct task_struct *task,
+ struct pt_regs *regs)
+ {
+- return regs->r10 == -1 ? regs->r8:0;
++ return regs->r10 == -1 ? -regs->r8:0;
+ }
+
+ static inline long syscall_get_return_value(struct task_struct *task,
+diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile
+index 9edda5466020..bcd3668f1bb8 100644
+--- a/arch/ia64/kernel/Makefile
++++ b/arch/ia64/kernel/Makefile
+@@ -42,7 +42,7 @@ endif
+ obj-$(CONFIG_INTEL_IOMMU) += pci-dma.o
+ obj-$(CONFIG_SWIOTLB) += pci-swiotlb.o
+
+-obj-$(CONFIG_BINFMT_ELF) += elfcore.o
++obj-$(CONFIG_ELF_CORE) += elfcore.o
+
+ # fp_emulate() expects f2-f5,f16-f31 to contain the user-level state.
+ CFLAGS_traps.o += -mfixed-range=f2-f5,f16-f31
+diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
+index 9509cc73b9c6..64ae9cde8bdb 100644
+--- a/arch/ia64/kernel/mca.c
++++ b/arch/ia64/kernel/mca.c
+@@ -1858,7 +1858,7 @@ ia64_mca_cpu_init(void *cpu_data)
+ data = mca_bootmem();
+ first_time = 0;
+ } else
+- data = (void *)__get_free_pages(GFP_KERNEL,
++ data = (void *)__get_free_pages(GFP_ATOMIC,
+ get_order(sz));
+ if (!data)
+ panic("Could not allocate MCA memory for cpu %d\n",
+diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c
+index 94f8bf777afa..3503d488e9b3 100644
+--- a/arch/ia64/kernel/mca_drv.c
++++ b/arch/ia64/kernel/mca_drv.c
+@@ -343,7 +343,7 @@ init_record_index_pools(void)
+
+ /* - 2 - */
+ sect_min_size = sal_log_sect_min_sizes[0];
+- for (i = 1; i < sizeof sal_log_sect_min_sizes/sizeof(size_t); i++)
++ for (i = 1; i < ARRAY_SIZE(sal_log_sect_min_sizes); i++)
+ if (sect_min_size > sal_log_sect_min_sizes[i])
+ sect_min_size = sal_log_sect_min_sizes[i];
+
+diff --git a/arch/ia64/kernel/ptrace.c b/arch/ia64/kernel/ptrace.c
+index 36f660da8124..56007258c014 100644
+--- a/arch/ia64/kernel/ptrace.c
++++ b/arch/ia64/kernel/ptrace.c
+@@ -2144,27 +2144,39 @@ static void syscall_get_set_args_cb(struct unw_frame_info *info, void *data)
+ {
+ struct syscall_get_set_args *args = data;
+ struct pt_regs *pt = args->regs;
+- unsigned long *krbs, cfm, ndirty;
++ unsigned long *krbs, cfm, ndirty, nlocals, nouts;
+ int i, count;
+
+ if (unw_unwind_to_user(info) < 0)
+ return;
+
++ /*
++ * We get here via a few paths:
++ * - break instruction: cfm is shared with caller.
++ * syscall args are in out= regs, locals are non-empty.
++ * - epsinstruction: cfm is set by br.call
++ * locals don't exist.
++ *
++ * For both cases argguments are reachable in cfm.sof - cfm.sol.
++ * CFM: [ ... | sor: 17..14 | sol : 13..7 | sof : 6..0 ]
++ */
+ cfm = pt->cr_ifs;
++ nlocals = (cfm >> 7) & 0x7f; /* aka sol */
++ nouts = (cfm & 0x7f) - nlocals; /* aka sof - sol */
+ krbs = (unsigned long *)info->task + IA64_RBS_OFFSET/8;
+ ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
+
+ count = 0;
+ if (in_syscall(pt))
+- count = min_t(int, args->n, cfm & 0x7f);
++ count = min_t(int, args->n, nouts);
+
++ /* Iterate over outs. */
+ for (i = 0; i < count; i++) {
++ int j = ndirty + nlocals + i + args->i;
+ if (args->rw)
+- *ia64_rse_skip_regs(krbs, ndirty + i + args->i) =
+- args->args[i];
++ *ia64_rse_skip_regs(krbs, j) = args->args[i];
+ else
+- args->args[i] = *ia64_rse_skip_regs(krbs,
+- ndirty + i + args->i);
++ args->args[i] = *ia64_rse_skip_regs(krbs, j);
+ }
+
+ if (!args->rw) {
+diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c
+index 878626805369..3b0c892953ab 100644
+--- a/arch/ia64/mm/discontig.c
++++ b/arch/ia64/mm/discontig.c
+@@ -99,7 +99,7 @@ static int __init build_node_maps(unsigned long start, unsigned long len,
+ * acpi_boot_init() (which builds the node_to_cpu_mask array) hasn't been
+ * called yet. Note that node 0 will also count all non-existent cpus.
+ */
+-static int __meminit early_nr_cpus_node(int node)
++static int early_nr_cpus_node(int node)
+ {
+ int cpu, n = 0;
+
+@@ -114,7 +114,7 @@ static int __meminit early_nr_cpus_node(int node)
+ * compute_pernodesize - compute size of pernode data
+ * @node: the node id.
+ */
+-static unsigned long __meminit compute_pernodesize(int node)
++static unsigned long compute_pernodesize(int node)
+ {
+ unsigned long pernodesize = 0, cpus;
+
+@@ -411,7 +411,7 @@ static void __init reserve_pernode_space(void)
+ }
+ }
+
+-static void __meminit scatter_node_data(void)
++static void scatter_node_data(void)
+ {
+ pg_data_t **dst;
+ int node;
+diff --git a/arch/ia64/scripts/unwcheck.py b/arch/ia64/scripts/unwcheck.py
+index 2bfd941ff7c7..c27849889e19 100644
+--- a/arch/ia64/scripts/unwcheck.py
++++ b/arch/ia64/scripts/unwcheck.py
+@@ -1,4 +1,4 @@
+-#!/usr/bin/python
++#!/usr/bin/env python
+ #
+ # Usage: unwcheck.py FILE
+ #
+diff --git a/arch/m68k/include/asm/m53xxacr.h b/arch/m68k/include/asm/m53xxacr.h
+index 3177ce8331d6..baee0c77b981 100644
+--- a/arch/m68k/include/asm/m53xxacr.h
++++ b/arch/m68k/include/asm/m53xxacr.h
+@@ -88,9 +88,9 @@
+ * coherency though in all cases. And for copyback caches we will need
+ * to push cached data as well.
+ */
+-#define CACHE_INIT CACR_CINVA
+-#define CACHE_INVALIDATE CACR_CINVA
+-#define CACHE_INVALIDATED CACR_CINVA
++#define CACHE_INIT (CACHE_MODE + CACR_CINVA - CACR_EC)
++#define CACHE_INVALIDATE (CACHE_MODE + CACR_CINVA)
++#define CACHE_INVALIDATED (CACHE_MODE + CACR_CINVA)
+
+ #define ACR0_MODE ((CONFIG_RAMBASE & 0xff000000) + \
+ (0x000f0000) + \
+diff --git a/arch/m68k/include/asm/mac_via.h b/arch/m68k/include/asm/mac_via.h
+index 53c632c85b03..dff6db19ae4d 100644
+--- a/arch/m68k/include/asm/mac_via.h
++++ b/arch/m68k/include/asm/mac_via.h
+@@ -256,6 +256,7 @@ extern int rbv_present,via_alt_mapping;
+
+ struct irq_desc;
+
++extern void via_l2_flush(int writeback);
+ extern void via_register_interrupts(void);
+ extern void via_irq_enable(int);
+ extern void via_irq_disable(int);
+diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
+index e46895316eb0..dcf18e1ca0bb 100644
+--- a/arch/m68k/mac/config.c
++++ b/arch/m68k/mac/config.c
+@@ -61,7 +61,6 @@ extern void iop_preinit(void);
+ extern void iop_init(void);
+ extern void via_init(void);
+ extern void via_init_clock(irq_handler_t func);
+-extern void via_flush_cache(void);
+ extern void oss_init(void);
+ extern void psc_init(void);
+ extern void baboon_init(void);
+@@ -132,21 +131,6 @@ int __init mac_parse_bootinfo(const struct bi_record *record)
+ return unknown;
+ }
+
+-/*
+- * Flip into 24bit mode for an instant - flushes the L2 cache card. We
+- * have to disable interrupts for this. Our IRQ handlers will crap
+- * themselves if they take an IRQ in 24bit mode!
+- */
+-
+-static void mac_cache_card_flush(int writeback)
+-{
+- unsigned long flags;
+-
+- local_irq_save(flags);
+- via_flush_cache();
+- local_irq_restore(flags);
+-}
+-
+ void __init config_mac(void)
+ {
+ if (!MACH_IS_MAC)
+@@ -179,9 +163,8 @@ void __init config_mac(void)
+ * not.
+ */
+
+- if (macintosh_config->ident == MAC_MODEL_IICI
+- || macintosh_config->ident == MAC_MODEL_IIFX)
+- mach_l2_flush = mac_cache_card_flush;
++ if (macintosh_config->ident == MAC_MODEL_IICI)
++ mach_l2_flush = via_l2_flush;
+ }
+
+
+diff --git a/arch/m68k/mac/iop.c b/arch/m68k/mac/iop.c
+index 7990b6f50105..cb516cacc819 100644
+--- a/arch/m68k/mac/iop.c
++++ b/arch/m68k/mac/iop.c
+@@ -173,7 +173,7 @@ static __inline__ void iop_writeb(volatile struct mac_iop *iop, __u16 addr, __u8
+
+ static __inline__ void iop_stop(volatile struct mac_iop *iop)
+ {
+- iop->status_ctrl &= ~IOP_RUN;
++ iop->status_ctrl = IOP_AUTOINC;
+ }
+
+ static __inline__ void iop_start(volatile struct mac_iop *iop)
+@@ -181,14 +181,9 @@ static __inline__ void iop_start(volatile struct mac_iop *iop)
+ iop->status_ctrl = IOP_RUN | IOP_AUTOINC;
+ }
+
+-static __inline__ void iop_bypass(volatile struct mac_iop *iop)
+-{
+- iop->status_ctrl |= IOP_BYPASS;
+-}
+-
+ static __inline__ void iop_interrupt(volatile struct mac_iop *iop)
+ {
+- iop->status_ctrl |= IOP_IRQ;
++ iop->status_ctrl = IOP_IRQ | IOP_RUN | IOP_AUTOINC;
+ }
+
+ static int iop_alive(volatile struct mac_iop *iop)
+@@ -239,7 +234,6 @@ void __init iop_preinit(void)
+ } else {
+ iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_QUADRA;
+ }
+- iop_base[IOP_NUM_SCC]->status_ctrl = 0x87;
+ iop_scc_present = 1;
+ } else {
+ iop_base[IOP_NUM_SCC] = NULL;
+@@ -251,7 +245,7 @@ void __init iop_preinit(void)
+ } else {
+ iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_QUADRA;
+ }
+- iop_base[IOP_NUM_ISM]->status_ctrl = 0;
++ iop_stop(iop_base[IOP_NUM_ISM]);
+ iop_ism_present = 1;
+ } else {
+ iop_base[IOP_NUM_ISM] = NULL;
+@@ -416,7 +410,8 @@ static void iop_handle_send(uint iop_num, uint chan)
+ iop_free_msg(msg2);
+
+ iop_send_queue[iop_num][chan] = msg;
+- if (msg) iop_do_send(msg);
++ if (msg && iop_readb(iop, IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE)
++ iop_do_send(msg);
+ }
+
+ /*
+@@ -497,16 +492,12 @@ int iop_send_message(uint iop_num, uint chan, void *privdata,
+
+ if (!(q = iop_send_queue[iop_num][chan])) {
+ iop_send_queue[iop_num][chan] = msg;
++ iop_do_send(msg);
+ } else {
+ while (q->next) q = q->next;
+ q->next = msg;
+ }
+
+- if (iop_readb(iop_base[iop_num],
+- IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE) {
+- iop_do_send(msg);
+- }
+-
+ return 0;
+ }
+
+diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
+index a435aced6e43..35382c1b563f 100644
+--- a/arch/m68k/mac/via.c
++++ b/arch/m68k/mac/via.c
+@@ -299,10 +299,14 @@ void via_debug_dump(void)
+ * the system into 24-bit mode for an instant.
+ */
+
+-void via_flush_cache(void)
++void via_l2_flush(int writeback)
+ {
++ unsigned long flags;
++
++ local_irq_save(flags);
+ via2[gBufB] &= ~VIA2B_vMode32;
+ via2[gBufB] |= VIA2B_vMode32;
++ local_irq_restore(flags);
+ }
+
+ /*
+diff --git a/arch/m68k/q40/config.c b/arch/m68k/q40/config.c
+index ea89a24f4600..cc0f924bbdd2 100644
+--- a/arch/m68k/q40/config.c
++++ b/arch/m68k/q40/config.c
+@@ -303,6 +303,7 @@ static int q40_get_rtc_pll(struct rtc_pll_info *pll)
+ {
+ int tmp = Q40_RTC_CTRL;
+
++ pll->pll_ctrl = 0;
+ pll->pll_value = tmp & Q40_RTC_PLL_MASK;
+ if (tmp & Q40_RTC_PLL_SIGN)
+ pll->pll_value = -pll->pll_value;
+diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
+index f8a529c85279..24eb7fe7922e 100644
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -848,6 +848,7 @@ config SNI_RM
+ select I8253
+ select I8259
+ select ISA
++ select MIPS_L1_CACHE_SHIFT_6
+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN
+ select SYS_HAS_CPU_R4X00
+ select SYS_HAS_CPU_R5000
+diff --git a/arch/mips/Makefile b/arch/mips/Makefile
+index 1a6bac7b076f..af4eff7d22ec 100644
+--- a/arch/mips/Makefile
++++ b/arch/mips/Makefile
+@@ -256,12 +256,23 @@ ifdef CONFIG_64BIT
+ endif
+ endif
+
++# When linking a 32-bit executable the LLVM linker cannot cope with a
++# 32-bit load address that has been sign-extended to 64 bits. Simply
++# remove the upper 32 bits then, as it is safe to do so with other
++# linkers.
++ifdef CONFIG_64BIT
++ load-ld = $(load-y)
++else
++ load-ld = $(subst 0xffffffff,0x,$(load-y))
++endif
++
+ KBUILD_AFLAGS += $(cflags-y)
+ KBUILD_CFLAGS += $(cflags-y)
+-KBUILD_CPPFLAGS += -DVMLINUX_LOAD_ADDRESS=$(load-y)
++KBUILD_CPPFLAGS += -DVMLINUX_LOAD_ADDRESS=$(load-y) -DLINKER_LOAD_ADDRESS=$(load-ld)
+ KBUILD_CPPFLAGS += -DDATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)
+
+ bootvars-y = VMLINUX_LOAD_ADDRESS=$(load-y) \
++ LINKER_LOAD_ADDRESS=$(load-ld) \
+ VMLINUX_ENTRY_ADDRESS=$(entry-y) \
+ PLATFORM="$(platform-y)"
+ ifdef CONFIG_32BIT
+@@ -275,7 +286,7 @@ LDFLAGS += -m $(ld-emul)
+
+ ifdef CONFIG_MIPS
+ CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
+- egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \
++ egrep -vw '__GNUC_(MINOR_|PATCHLEVEL_)?_' | \
+ sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/" -e 's/\$$/&&/g')
+ ifdef CONFIG_64BIT
+ CHECKFLAGS += -m64
+diff --git a/arch/mips/alchemy/board-xxs1500.c b/arch/mips/alchemy/board-xxs1500.c
+index 0fc53e08a894..c05f7376148a 100644
+--- a/arch/mips/alchemy/board-xxs1500.c
++++ b/arch/mips/alchemy/board-xxs1500.c
+@@ -30,6 +30,7 @@
+ #include
+ #include
+ #include
++#include
+ #include
+
+ const char *get_system_type(void)
+diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
+index 7ba7ea0a22f8..e6d0044393b0 100644
+--- a/arch/mips/alchemy/common/clock.c
++++ b/arch/mips/alchemy/common/clock.c
+@@ -151,6 +151,7 @@ static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name,
+ {
+ struct clk_init_data id;
+ struct clk_hw *h;
++ struct clk *clk;
+
+ h = kzalloc(sizeof(*h), GFP_KERNEL);
+ if (!h)
+@@ -163,7 +164,13 @@ static struct clk __init *alchemy_clk_setup_cpu(const char *parent_name,
+ id.ops = &alchemy_clkops_cpu;
+ h->init = &id;
+
+- return clk_register(NULL, h);
++ clk = clk_register(NULL, h);
++ if (IS_ERR(clk)) {
++ pr_err("failed to register clock\n");
++ kfree(h);
++ }
++
++ return clk;
+ }
+
+ /* AUXPLLs ************************************************************/
+diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
+index e970fd9cf769..7ca7384fd5c9 100644
+--- a/arch/mips/bcm47xx/Kconfig
++++ b/arch/mips/bcm47xx/Kconfig
+@@ -26,6 +26,7 @@ config BCM47XX_BCMA
+ select BCMA
+ select BCMA_HOST_SOC
+ select BCMA_DRIVER_MIPS
++ select BCMA_DRIVER_PCI if PCI
+ select BCMA_DRIVER_PCI_HOSTMODE if PCI
+ select BCMA_DRIVER_GPIO
+ default y
+diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile
+index 2f77e250b91d..3e93eea5a5f5 100644
+--- a/arch/mips/boot/compressed/Makefile
++++ b/arch/mips/boot/compressed/Makefile
+@@ -33,7 +33,7 @@ KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \
+ KCOV_INSTRUMENT := n
+
+ # decompressor objects (linked with vmlinuz)
+-vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o
++vmlinuzobjs-y := $(obj)/head.o $(obj)/decompress.o $(obj)/string.o $(obj)/bswapsi.o
+
+ ifdef CONFIG_DEBUG_ZBOOT
+ vmlinuzobjs-$(CONFIG_DEBUG_ZBOOT) += $(obj)/dbg.o
+@@ -47,7 +47,7 @@ extra-y += uart-ath79.c
+ $(obj)/uart-ath79.c: $(srctree)/arch/mips/ath79/early_printk.c
+ $(call cmd,shipped)
+
+-vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o $(obj)/bswapsi.o
++vmlinuzobjs-$(CONFIG_KERNEL_XZ) += $(obj)/ashldi3.o
+
+ extra-y += ashldi3.c bswapsi.c
+ $(obj)/ashldi3.o $(obj)/bswapsi.o: KBUILD_CFLAGS += -I$(srctree)/arch/mips/lib
+@@ -87,7 +87,7 @@ ifneq ($(zload-y),)
+ VMLINUZ_LOAD_ADDRESS := $(zload-y)
+ else
+ VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
+- $(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
++ $(obj)/vmlinux.bin $(LINKER_LOAD_ADDRESS))
+ endif
+
+ vmlinuzobjs-y += $(obj)/piggy.o
+diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c
+index fdf99e9dd4c3..66096c766a60 100644
+--- a/arch/mips/boot/compressed/decompress.c
++++ b/arch/mips/boot/compressed/decompress.c
+@@ -11,12 +11,15 @@
+ * option) any later version.
+ */
+
++#define DISABLE_BRANCH_PROFILING
++
+ #include
+ #include
+ #include
+ #include
+
+ #include
++#include
+
+ /*
+ * These two variables specify the free mem region
+@@ -124,7 +127,7 @@ void decompress_kernel(unsigned long boot_heap_start)
+ dtb_size = fdt_totalsize((void *)&__appended_dtb);
+
+ /* last four bytes is always image size in little endian */
+- image_size = le32_to_cpup((void *)&__image_end - 4);
++ image_size = get_unaligned_le32((void *)&__image_end - 4);
+
+ /* copy dtb to where the booted kernel will expect it */
+ memcpy((void *)VMLINUX_LOAD_ADDRESS_ULL + image_size,
+diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
+index bdd6dc18e65c..941efd878334 100644
+--- a/arch/mips/include/asm/cpu-type.h
++++ b/arch/mips/include/asm/cpu-type.h
+@@ -47,6 +47,7 @@ static inline int __pure __get_cpu_type(const int cpu_type)
+ case CPU_34K:
+ case CPU_1004K:
+ case CPU_74K:
++ case CPU_1074K:
+ case CPU_M14KC:
+ case CPU_M14KEC:
+ case CPU_INTERAPTIV:
+diff --git a/arch/mips/include/asm/div64.h b/arch/mips/include/asm/div64.h
+index dc5ea5736440..ceece76fc971 100644
+--- a/arch/mips/include/asm/div64.h
++++ b/arch/mips/include/asm/div64.h
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright (C) 2000, 2004 Maciej W. Rozycki
++ * Copyright (C) 2000, 2004, 2021 Maciej W. Rozycki
+ * Copyright (C) 2003, 07 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+@@ -9,25 +9,18 @@
+ #ifndef __ASM_DIV64_H
+ #define __ASM_DIV64_H
+
+-#include
+-
+-#if BITS_PER_LONG == 64
++#include
+
+-#include
++#if BITS_PER_LONG == 32
+
+ /*
+ * No traps on overflows for any of these...
+ */
+
+-#define __div64_32(n, base) \
+-({ \
++#define do_div64_32(res, high, low, base) ({ \
+ unsigned long __cf, __tmp, __tmp2, __i; \
+ unsigned long __quot32, __mod32; \
+- unsigned long __high, __low; \
+- unsigned long long __n; \
+ \
+- __high = *__n >> 32; \
+- __low = __n; \
+ __asm__( \
+ " .set push \n" \
+ " .set noat \n" \
+@@ -51,18 +44,48 @@
+ " subu %0, %0, %z6 \n" \
+ " addiu %2, %2, 1 \n" \
+ "3: \n" \
+- " bnez %4, 0b\n\t" \
+- " srl %5, %1, 0x1f\n\t" \
++ " bnez %4, 0b \n" \
++ " srl %5, %1, 0x1f \n" \
+ " .set pop" \
+ : "=&r" (__mod32), "=&r" (__tmp), \
+ "=&r" (__quot32), "=&r" (__cf), \
+ "=&r" (__i), "=&r" (__tmp2) \
+- : "Jr" (base), "0" (__high), "1" (__low)); \
++ : "Jr" (base), "0" (high), "1" (low)); \
+ \
+- (__n) = __quot32; \
++ (res) = __quot32; \
+ __mod32; \
+ })
+
+-#endif /* BITS_PER_LONG == 64 */
++#define __div64_32(n, base) ({ \
++ unsigned long __upper, __low, __high, __radix; \
++ unsigned long long __quot; \
++ unsigned long long __div; \
++ unsigned long __mod; \
++ \
++ __div = (*n); \
++ __radix = (base); \
++ \
++ __high = __div >> 32; \
++ __low = __div; \
++ \
++ if (__high < __radix) { \
++ __upper = __high; \
++ __high = 0; \
++ } else { \
++ __upper = __high % __radix; \
++ __high /= __radix; \
++ } \
++ \
++ __mod = do_div64_32(__low, __upper, __low, __radix); \
++ \
++ __quot = __high; \
++ __quot = __quot << 32 | __low; \
++ (*n) = __quot; \
++ __mod; \
++})
++
++#endif /* BITS_PER_LONG == 32 */
++
++#include
+
+ #endif /* __ASM_DIV64_H */
+diff --git a/arch/mips/include/asm/hugetlb.h b/arch/mips/include/asm/hugetlb.h
+index 982bc0685330..4747a4694669 100644
+--- a/arch/mips/include/asm/hugetlb.h
++++ b/arch/mips/include/asm/hugetlb.h
+@@ -67,7 +67,13 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
+ static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
+ unsigned long addr, pte_t *ptep)
+ {
+- flush_tlb_page(vma, addr & huge_page_mask(hstate_vma(vma)));
++ /*
++ * clear the huge pte entry firstly, so that the other smp threads will
++ * not get old pte entry after finishing flush_tlb_page and before
++ * setting new huge pte entry
++ */
++ huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
++ flush_tlb_page(vma, addr);
+ }
+
+ static inline int huge_pte_none(pte_t pte)
+diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h
+index bebec370324f..22573b4f25b6 100644
+--- a/arch/mips/include/asm/kvm_host.h
++++ b/arch/mips/include/asm/kvm_host.h
+@@ -243,8 +243,12 @@ enum emulation_result {
+ #define MIPS3_PG_SHIFT 6
+ #define MIPS3_PG_FRAME 0x3fffffc0
+
++#if defined(CONFIG_64BIT)
++#define VPN2_MASK GENMASK(cpu_vmbits - 1, 13)
++#else
+ #define VPN2_MASK 0xffffe000
+-#define KVM_ENTRYHI_ASID MIPS_ENTRYHI_ASID
++#endif
++#define KVM_ENTRYHI_ASID cpu_asid_mask(&boot_cpu_data)
+ #define TLB_IS_GLOBAL(x) ((x).tlb_lo[0] & (x).tlb_lo[1] & ENTRYLO_G)
+ #define TLB_VPN2(x) ((x).tlb_hi & VPN2_MASK)
+ #define TLB_ASID(x) ((x).tlb_hi & KVM_ENTRYHI_ASID)
+diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
+index ae810da4d499..59ed811eb32a 100644
+--- a/arch/mips/kernel/genex.S
++++ b/arch/mips/kernel/genex.S
+@@ -429,20 +429,20 @@ NESTED(nmi_handler, PT_SIZE, sp)
+ .endm
+
+ .macro __build_clear_fpe
++ CLI
++ TRACE_IRQS_OFF
+ .set push
+ /* gas fails to assemble cfc1 for some archs (octeon).*/ \
+ .set mips1
+ SET_HARDFLOAT
+ cfc1 a1, fcr31
+ .set pop
+- CLI
+- TRACE_IRQS_OFF
+ .endm
+
+ .macro __build_clear_msa_fpe
+- _cfcmsa a1, MSA_CSR
+ CLI
+ TRACE_IRQS_OFF
++ _cfcmsa a1, MSA_CSR
+ .endm
+
+ .macro __build_clear_ade
+diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c
+index 60177a612cb1..df65516778a2 100644
+--- a/arch/mips/kernel/mips-cm.c
++++ b/arch/mips/kernel/mips-cm.c
+@@ -123,9 +123,9 @@ static char *cm2_causes[32] = {
+ "COH_RD_ERR", "MMIO_WR_ERR", "MMIO_RD_ERR", "0x07",
+ "0x08", "0x09", "0x0a", "0x0b",
+ "0x0c", "0x0d", "0x0e", "0x0f",
+- "0x10", "0x11", "0x12", "0x13",
+- "0x14", "0x15", "0x16", "INTVN_WR_ERR",
+- "INTVN_RD_ERR", "0x19", "0x1a", "0x1b",
++ "0x10", "INTVN_WR_ERR", "INTVN_RD_ERR", "0x13",
++ "0x14", "0x15", "0x16", "0x17",
++ "0x18", "0x19", "0x1a", "0x1b",
+ "0x1c", "0x1d", "0x1e", "0x1f"
+ };
+
+diff --git a/arch/mips/kernel/relocate.c b/arch/mips/kernel/relocate.c
+index 1958910b75c0..b4a7c303019b 100644
+--- a/arch/mips/kernel/relocate.c
++++ b/arch/mips/kernel/relocate.c
+@@ -175,8 +175,14 @@ static int __init relocate_exception_table(long offset)
+ static inline __init unsigned long rotate_xor(unsigned long hash,
+ const void *area, size_t size)
+ {
+- size_t i;
+- unsigned long *ptr = (unsigned long *)area;
++ const typeof(hash) *ptr = PTR_ALIGN(area, sizeof(hash));
++ size_t diff, i;
++
++ diff = (void *)ptr - area;
++ if (unlikely(size < diff + sizeof(hash)))
++ return hash;
++
++ size = ALIGN_DOWN(size - diff, sizeof(hash));
+
+ for (i = 0; i < size / sizeof(hash); i++) {
+ /* Rotate by odd number of bits and XOR. */
+diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
+index 7cc1d29334ee..2c3b89a65317 100644
+--- a/arch/mips/kernel/setup.c
++++ b/arch/mips/kernel/setup.c
+@@ -847,7 +847,17 @@ static void __init arch_mem_init(char **cmdline_p)
+ BOOTMEM_DEFAULT);
+ #endif
+ device_tree_init();
++
++ /*
++ * In order to reduce the possibility of kernel panic when failed to
++ * get IO TLB memory under CONFIG_SWIOTLB, it is better to allocate
++ * low memory as small as possible before plat_swiotlb_setup(), so
++ * make sparse_init() using top-down allocation.
++ */
++ memblock_set_bottom_up(false);
+ sparse_init();
++ memblock_set_bottom_up(true);
++
+ plat_swiotlb_setup();
+
+ dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
+diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
+index 416d53f587e7..6e3671752775 100644
+--- a/arch/mips/kernel/smp-bmips.c
++++ b/arch/mips/kernel/smp-bmips.c
+@@ -236,6 +236,8 @@ static void bmips_boot_secondary(int cpu, struct task_struct *idle)
+ */
+ static void bmips_init_secondary(void)
+ {
++ bmips_cpu_setup();
++
+ switch (current_cpu_type()) {
+ case CPU_BMIPS4350:
+ case CPU_BMIPS4380:
+diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
+index a7f81261c781..b15ee1258668 100644
+--- a/arch/mips/kernel/time.c
++++ b/arch/mips/kernel/time.c
+@@ -22,12 +22,77 @@
+ #include
+ #include
+ #include
++#include
++#include
+
+ #include
+ #include
+ #include
+ #include
+
++#ifdef CONFIG_CPU_FREQ
++
++static DEFINE_PER_CPU(unsigned long, pcp_lpj_ref);
++static DEFINE_PER_CPU(unsigned long, pcp_lpj_ref_freq);
++static unsigned long glb_lpj_ref;
++static unsigned long glb_lpj_ref_freq;
++
++static int cpufreq_callback(struct notifier_block *nb,
++ unsigned long val, void *data)
++{
++ int cpu;
++ struct cpufreq_freqs *freq = data;
++
++ /*
++ * Skip lpj numbers adjustment if the CPU-freq transition is safe for
++ * the loops delay. (Is this possible?)
++ */
++ if (freq->flags & CPUFREQ_CONST_LOOPS)
++ return NOTIFY_OK;
++
++ /* Save the initial values of the lpjes for future scaling. */
++ if (!glb_lpj_ref) {
++ glb_lpj_ref = boot_cpu_data.udelay_val;
++ glb_lpj_ref_freq = freq->old;
++
++ for_each_online_cpu(cpu) {
++ per_cpu(pcp_lpj_ref, cpu) =
++ cpu_data[cpu].udelay_val;
++ per_cpu(pcp_lpj_ref_freq, cpu) = freq->old;
++ }
++ }
++
++ cpu = freq->cpu;
++ /*
++ * Adjust global lpj variable and per-CPU udelay_val number in
++ * accordance with the new CPU frequency.
++ */
++ if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
++ (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
++ loops_per_jiffy = cpufreq_scale(glb_lpj_ref,
++ glb_lpj_ref_freq,
++ freq->new);
++
++ cpu_data[cpu].udelay_val = cpufreq_scale(per_cpu(pcp_lpj_ref, cpu),
++ per_cpu(pcp_lpj_ref_freq, cpu), freq->new);
++ }
++
++ return NOTIFY_OK;
++}
++
++static struct notifier_block cpufreq_notifier = {
++ .notifier_call = cpufreq_callback,
++};
++
++static int __init register_cpufreq_notifier(void)
++{
++ return cpufreq_register_notifier(&cpufreq_notifier,
++ CPUFREQ_TRANSITION_NOTIFIER);
++}
++core_initcall(register_cpufreq_notifier);
++
++#endif /* CONFIG_CPU_FREQ */
++
+ /*
+ * forward reference
+ */
+diff --git a/arch/mips/kernel/topology.c b/arch/mips/kernel/topology.c
+index cf3eb61fad12..68da7613874a 100644
+--- a/arch/mips/kernel/topology.c
++++ b/arch/mips/kernel/topology.c
+@@ -19,7 +19,7 @@ static int __init topology_init(void)
+ for_each_present_cpu(i) {
+ struct cpu *c = &per_cpu(cpu_devices, i);
+
+- c->hotpluggable = 1;
++ c->hotpluggable = !!i;
+ ret = register_cpu(c, i);
+ if (ret)
+ printk(KERN_WARNING "topology_init: register_cpu %d "
+diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
+index 8e0749665934..5f717473d08e 100644
+--- a/arch/mips/kernel/traps.c
++++ b/arch/mips/kernel/traps.c
+@@ -2137,6 +2137,7 @@ static void configure_status(void)
+
+ change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
+ status_set);
++ back_to_back_c0_hazard();
+ }
+
+ unsigned int hwrena;
+diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
+index 2d965d91fee4..23c5509f3b51 100644
+--- a/arch/mips/kernel/vmlinux.lds.S
++++ b/arch/mips/kernel/vmlinux.lds.S
+@@ -49,7 +49,7 @@ SECTIONS
+ /* . = 0xa800000000300000; */
+ . = 0xffffffff80300000;
+ #endif
+- . = VMLINUX_LOAD_ADDRESS;
++ . = LINKER_LOAD_ADDRESS;
+ /* read-only */
+ _text = .; /* Text and read-only data */
+ .text : {
+@@ -92,6 +92,7 @@ SECTIONS
+
+ INIT_TASK_DATA(THREAD_SIZE)
+ NOSAVE_DATA
++ PAGE_ALIGNED_DATA(PAGE_SIZE)
+ CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
+ READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
+ DATA_DATA
+diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c
+index 7c6f75c2aa4d..e64f678ca12c 100644
+--- a/arch/mips/lantiq/irq.c
++++ b/arch/mips/lantiq/irq.c
+@@ -245,7 +245,7 @@ static void ltq_hw_irqdispatch(int module)
+ do_IRQ((int)irq + MIPS_CPU_IRQ_CASCADE + (INT_NUM_IM_OFFSET * module));
+
+ /* if this is a EBU irq, we need to ack it or get a deadlock */
+- if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT)
++ if (irq == LTQ_ICU_EBU_IRQ && !module && LTQ_EBU_PCC_ISTAT != 0)
+ ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_ISTAT) | 0x10,
+ LTQ_EBU_PCC_ISTAT);
+ }
+diff --git a/arch/mips/lib/mips-atomic.c b/arch/mips/lib/mips-atomic.c
+index 5530070e0d05..57497a26e79c 100644
+--- a/arch/mips/lib/mips-atomic.c
++++ b/arch/mips/lib/mips-atomic.c
+@@ -37,7 +37,7 @@
+ */
+ notrace void arch_local_irq_disable(void)
+ {
+- preempt_disable();
++ preempt_disable_notrace();
+
+ __asm__ __volatile__(
+ " .set push \n"
+@@ -53,7 +53,7 @@ notrace void arch_local_irq_disable(void)
+ : /* no inputs */
+ : "memory");
+
+- preempt_enable();
++ preempt_enable_notrace();
+ }
+ EXPORT_SYMBOL(arch_local_irq_disable);
+
+@@ -61,7 +61,7 @@ notrace unsigned long arch_local_irq_save(void)
+ {
+ unsigned long flags;
+
+- preempt_disable();
++ preempt_disable_notrace();
+
+ __asm__ __volatile__(
+ " .set push \n"
+@@ -78,7 +78,7 @@ notrace unsigned long arch_local_irq_save(void)
+ : /* no inputs */
+ : "memory");
+
+- preempt_enable();
++ preempt_enable_notrace();
+
+ return flags;
+ }
+@@ -88,7 +88,7 @@ notrace void arch_local_irq_restore(unsigned long flags)
+ {
+ unsigned long __tmp1;
+
+- preempt_disable();
++ preempt_disable_notrace();
+
+ __asm__ __volatile__(
+ " .set push \n"
+@@ -106,7 +106,7 @@ notrace void arch_local_irq_restore(unsigned long flags)
+ : "0" (flags)
+ : "memory");
+
+- preempt_enable();
++ preempt_enable_notrace();
+ }
+ EXPORT_SYMBOL(arch_local_irq_restore);
+
+diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
+index 0ff379f0cc4a..b9dea4ce290c 100644
+--- a/arch/mips/mm/c-r4k.c
++++ b/arch/mips/mm/c-r4k.c
+@@ -1630,7 +1630,7 @@ static int probe_scache(void)
+ return 1;
+ }
+
+-static void __init loongson2_sc_init(void)
++static void loongson2_sc_init(void)
+ {
+ struct cpuinfo_mips *c = ¤t_cpu_data;
+
+@@ -1746,7 +1746,11 @@ static void setup_scache(void)
+ printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
+ scache_size >> 10,
+ way_string[c->scache.ways], c->scache.linesz);
++
++ if (current_cpu_type() == CPU_BMIPS5000)
++ c->options |= MIPS_CPU_INCLUSIVE_CACHES;
+ }
++
+ #else
+ if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
+ panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
+diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
+index 0596505770db..11985399c469 100644
+--- a/arch/mips/mm/tlb-r4k.c
++++ b/arch/mips/mm/tlb-r4k.c
+@@ -424,6 +424,7 @@ int has_transparent_hugepage(void)
+ }
+ return mask == PM_HUGE_MASK;
+ }
++EXPORT_SYMBOL(has_transparent_hugepage);
+
+ #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
+
+diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c
+index 516e1233d771..0e51db7ac172 100644
+--- a/arch/mips/mti-malta/malta-platform.c
++++ b/arch/mips/mti-malta/malta-platform.c
+@@ -48,7 +48,8 @@ static struct plat_serial8250_port uart8250_data[] = {
+ .mapbase = 0x1f000900, /* The CBUS UART */
+ .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
+ .uartclk = 3686400, /* Twice the usual clk! */
+- .iotype = UPIO_MEM32,
++ .iotype = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ?
++ UPIO_MEM32BE : UPIO_MEM32,
+ .flags = CBUS_UART_FLAGS,
+ .regshift = 3,
+ },
+diff --git a/arch/mips/pci/pci-legacy.c b/arch/mips/pci/pci-legacy.c
+index 2d6886f09ba3..009b840ee5ef 100644
+--- a/arch/mips/pci/pci-legacy.c
++++ b/arch/mips/pci/pci-legacy.c
+@@ -158,8 +158,13 @@ void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node)
+ res = hose->mem_resource;
+ break;
+ }
+- if (res != NULL)
+- of_pci_range_to_resource(&range, node, res);
++ if (res != NULL) {
++ res->name = node->full_name;
++ res->flags = range.flags;
++ res->start = range.cpu_addr;
++ res->end = range.cpu_addr + range.size - 1;
++ res->parent = res->child = res->sibling = NULL;
++ }
+ }
+ }
+
+diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c
+index 0aa67a2d0ae6..6b7226830354 100644
+--- a/arch/mips/ralink/of.c
++++ b/arch/mips/ralink/of.c
+@@ -10,6 +10,7 @@
+
+ #include
+ #include
++#include
+ #include
+ #include
+ #include
+@@ -27,6 +28,7 @@
+
+ __iomem void *rt_sysc_membase;
+ __iomem void *rt_memc_membase;
++EXPORT_SYMBOL_GPL(rt_sysc_membase);
+
+ __iomem void *plat_of_remap_node(const char *node)
+ {
+diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
+index f9407e170476..c6af7047eb0d 100644
+--- a/arch/mips/sni/a20r.c
++++ b/arch/mips/sni/a20r.c
+@@ -143,7 +143,10 @@ static struct platform_device sc26xx_pdev = {
+ },
+ };
+
+-static u32 a20r_ack_hwint(void)
++/*
++ * Trigger chipset to update CPU's CAUSE IP field
++ */
++static u32 a20r_update_cause_ip(void)
+ {
+ u32 status = read_c0_status();
+
+@@ -205,12 +208,14 @@ static void a20r_hwint(void)
+ int irq;
+
+ clear_c0_status(IE_IRQ0);
+- status = a20r_ack_hwint();
++ status = a20r_update_cause_ip();
+ cause = read_c0_cause();
+
+ irq = ffs(((cause & status) >> 8) & 0xf8);
+ if (likely(irq > 0))
+ do_IRQ(SNI_A20R_IRQ_BASE + irq - 1);
++
++ a20r_update_cause_ip();
+ set_c0_status(IE_IRQ0);
+ }
+
+diff --git a/arch/mips/vdso/genvdso.c b/arch/mips/vdso/genvdso.c
+index 530a36f465ce..afcc86726448 100644
+--- a/arch/mips/vdso/genvdso.c
++++ b/arch/mips/vdso/genvdso.c
+@@ -126,6 +126,7 @@ static void *map_vdso(const char *path, size_t *_size)
+ if (fstat(fd, &stat) != 0) {
+ fprintf(stderr, "%s: Failed to stat '%s': %s\n", program_name,
+ path, strerror(errno));
++ close(fd);
+ return NULL;
+ }
+
+@@ -134,6 +135,7 @@ static void *map_vdso(const char *path, size_t *_size)
+ if (addr == MAP_FAILED) {
+ fprintf(stderr, "%s: Failed to map '%s': %s\n", program_name,
+ path, strerror(errno));
++ close(fd);
+ return NULL;
+ }
+
+@@ -143,6 +145,7 @@ static void *map_vdso(const char *path, size_t *_size)
+ if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG) != 0) {
+ fprintf(stderr, "%s: '%s' is not an ELF file\n", program_name,
+ path);
++ close(fd);
+ return NULL;
+ }
+
+@@ -154,6 +157,7 @@ static void *map_vdso(const char *path, size_t *_size)
+ default:
+ fprintf(stderr, "%s: '%s' has invalid ELF class\n",
+ program_name, path);
++ close(fd);
+ return NULL;
+ }
+
+@@ -165,6 +169,7 @@ static void *map_vdso(const char *path, size_t *_size)
+ default:
+ fprintf(stderr, "%s: '%s' has invalid ELF data order\n",
+ program_name, path);
++ close(fd);
+ return NULL;
+ }
+
+@@ -172,15 +177,18 @@ static void *map_vdso(const char *path, size_t *_size)
+ fprintf(stderr,
+ "%s: '%s' has invalid ELF machine (expected EM_MIPS)\n",
+ program_name, path);
++ close(fd);
+ return NULL;
+ } else if (swap_uint16(ehdr->e_type) != ET_DYN) {
+ fprintf(stderr,
+ "%s: '%s' has invalid ELF type (expected ET_DYN)\n",
+ program_name, path);
++ close(fd);
+ return NULL;
+ }
+
+ *_size = stat.st_size;
++ close(fd);
+ return addr;
+ }
+
+@@ -284,10 +292,12 @@ int main(int argc, char **argv)
+ /* Calculate and write symbol offsets to