From 0ede89f29d17db900f49b611037fa851bb090e2c Mon Sep 17 00:00:00 2001 From: Omar Santos Date: Tue, 24 Jan 2023 20:58:01 -0500 Subject: [PATCH] Update registers.md --- buffer_overflow_example/registers.md | 50 ++++++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/buffer_overflow_example/registers.md b/buffer_overflow_example/registers.md index f92133d..6302ab0 100644 --- a/buffer_overflow_example/registers.md +++ b/buffer_overflow_example/registers.md @@ -1,8 +1,42 @@ -# Good Information about Registers +# What about Registers? + +In computer architecture, 32-bit registers are registers that can hold 32-bit (4-byte) values. These registers are used to temporarily store data that is being operated on by the CPU. The 32-bit registers are a subset of the general-purpose registers in a CPU and are used to store data that is being manipulated by the CPU. The most common use of 32-bit registers is to hold memory addresses, but they can also be used to hold data that is being operated on by the CPU. + +Some common 32-bit registers include: + +- EAX (extended accumulator register) +- EBX (base register) +- ECX (counter register) +- EDX (data register) +- EBP (base pointer register) +- ESP (stack pointer register) +- EIP (instruction pointer register) +- EFLAGS (flags register) + +These registers are used by the CPU to perform various operations and are typically used in conjunction with other registers and memory locations to perform more complex operations. - Refer to Intel's Architecture Documentation for latest information: https://software.intel.com/en-us/articles/intel-sdm -Additional Notes: The x64 architecture extends x86's 8 general-purpose registers to be 64-bit, and adds 8 new 64-bit registers. The 64-bit registers have names beginning with "r", so for example the 64-bit extension of **eax** is called **rax**. The lower 32 bits, 16 bits, and 8 bits of each register are directly addressable in operands. This includes registers, like **esi**, whose lower 8 bits were not previously addressable. The following table specifies the assembly-language names for the lower portions of 64-bit registers. +64-bit registers are registers that can hold 64-bit (8-byte) values. These registers are used to temporarily store data that is being operated on by the CPU. The 64-bit registers are a subset of the general-purpose registers in a CPU and are used to store data that is being manipulated by the CPU. The most common use of 64-bit registers is to hold memory addresses, but they can also be used to hold data that is being operated on by the CPU. + +Some common 64-bit registers include: + +- RAX (register A extended) +- RBX (register B extended) +- RCX (register C extended) +- RDX (register D extended) +- RBP (base pointer register) +- RSP (stack pointer register) +- RIP (instruction pointer register) +- RFLAGS (flags register) +- R8-R15 (additional general purpose registers) + +These registers are used by the CPU to perform various operations and are typically used in conjunction with other registers and memory locations to perform more complex operations. + +It's worth noting that, the registers may differ depending on the CPU architecture or instruction set architecture (ISA) used in the computer, some architectures may have more or less registers and different names. 64-bit architecture is more common in modern processors and operating systems, as it allows more memory addressability, and faster computation. + +### Additional Notes: +The x64 architecture extends x86's 8 general-purpose registers to be 64-bit, and adds 8 new 64-bit registers. The 64-bit registers have names beginning with "r", so for example the 64-bit extension of **eax** is called **rax**. The lower 32 bits, 16 bits, and 8 bits of each register are directly addressable in operands. This includes registers, like **esi**, whose lower 8 bits were not previously addressable. The following table specifies the assembly-language names for the lower portions of 64-bit registers. @@ -241,3 +275,15 @@ The addressing modes in 64-bit mode are similar to, but not identical to, x86. Note: Instructions, like **jmp**, **call**, **push**, and **pop**, that implicitly refer to the instruction pointer and the stack pointer treat them as 64 bits registers on x64. + +## ARM-based Registers + +In the ARM architecture, there are several different types of registers. These include: + +- General-purpose registers (GPRs): These are the main registers that are used for data manipulation and are also used to hold memory addresses. There are 16 GPRs in the ARM architecture, numbered R0-R15. +- Program Counter (PC): This register holds the address of the next instruction to be executed. It is also used to hold the return address when a subroutine is called. +- Stack Pointer (SP): This register holds the address of the top of the stack. +- Link Register (LR): This register holds the return address when a subroutine is called. +- Condition Code Registers (CCRs): These registers hold the current state of the processor's condition codes. They are used to determine the outcome of a comparison operation and to control the execution of instructions based on certain conditions. +- Floating-point registers: These registers are used to hold floating-point values. There are 32 single-precision registers and 16 double-precision registers in the ARM architecture. +- Vector registers: These registers are used to hold SIMD (Single Instruction, Multiple Data) data. There are 32 vector registers in the ARM architecture.